Patents by Inventor An-Sheng Fan
An-Sheng Fan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250105163Abstract: A semiconductor chiplet device includes a first die, a second die, a decoupling circuit and an interposer. The interposer includes a plurality of power traces and a plurality of ground traces. The first die and the second die are arranged on a first side of the interposer according to a configuration direction, and are coupled to the power traces and the ground traces. The decoupling circuit is arranged on a second side of the interposer, and is coupled to the power traces and the ground traces. The power traces and the ground traces are staggered with each other, and an extending direction of the ground traces and the power traces is the same as the configuration direction.Type: ApplicationFiled: March 20, 2024Publication date: March 27, 2025Inventors: Liang-Kai CHEN, Chih-Chiang HUNG, Wen-Yi JIAN, Yuan-Hung LIN, Sheng-Fan YANG
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Patent number: 12261012Abstract: Disclosed is a plasma treatment apparatus, a lower electrode assembly and a forming method thereof, wherein the lower electrode assembly includes: a base for carrying a substrate to be treated; a focus ring encircling a periphery of the base; a coupling loop disposed below the focus ring; a conductive layer disposed in the coupling loop; and a wire for electrically connecting the conductive layer and the base so that the base and the conducting layer are equipotential. The lower electrode assembly is less prone to cause arc discharge.Type: GrantFiled: February 24, 2022Date of Patent: March 25, 2025Assignee: ADVANCED MICRO-FABRICATION EQUIPMENT INC.Inventors: Tuqiang Ni, Sheng Guo, Xiang Sun, Guangwei Fan, Kuan Yang, Hongqing Wang, Xingjian Chen, Ruoxin Du
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Publication number: 20250081650Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a first epitaxial layer over the substrate, a first photodiode and a second photodiode in the first epitaxial layer, and a trench isolation structure between the first photodiode and the second photodiode. The first photodiode includes a first doped region having a first conductivity type. The first photodiode includes a second doped region, overlying the first doped region, having a second conductivity type different than the first conductivity type. The first photodiode includes a third doped region, overlying the first doped region, having the second conductivity type. A first distance between a sidewall of the third doped region and an uppermost surface of the first epitaxial layer is between about a hundredth to about a fifth of a second distance between a sidewall of the trench isolation structure and the uppermost surface of the first epitaxial layer.Type: ApplicationFiled: August 28, 2023Publication date: March 6, 2025Inventors: Wen-Sheng WANG, Yi-Hsuan Fan, Yen-Ting Chen
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Publication number: 20250063824Abstract: This disclosure is directed to a circuit that includes a substrate, a target device on the substrate, and an electrostatic discharge (ESD) device electrically coupled to the target device. The ESD device includes an ESD detection circuit electrically coupled to a first reference voltage supply and a second reference voltage supply, an inverter circuit electrically coupled to the ESD detection circuit and configured to trigger in response to an ESD event on the first or second reference voltage supply, a rectifier circuit electrically coupled to the inverter circuit and configured to rectify a current discharged from the inverter circuit, and a transistor electrically coupled to the rectifier circuit and configured to discharge a remaining current passing through the rectifier circuit.Type: ApplicationFiled: August 16, 2023Publication date: February 20, 2025Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Lin-Yu HUANG, Shih-Fan CHEN, Sheng-Fu HSU, Yi-An LAI, Chan-Hong CHERN, Cheng-Hsiang HSIEH
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Publication number: 20250062442Abstract: A thermal management assembly, including: a heat exchange plate, with a heat transfer fluid flowing in a flow channel of the heat exchange plate and exchanges heat with the outside; a fluid guide block installed on the heat exchange plate; an intermediate heat exchanger installed on the fluid guide block and having a first fluid path and a second fluid path, the heat transfer fluid in the first fluid path and that in the second fluid path exchanging heat; an expansion valve installed on a fluid guide block. The fluid guide block is further provided with a first opening, a second opening, and an installation chamber; the first opening is in fluid communication with the first fluid path; the installation chamber is in fluid communication with the first and second openings respectively; the expansion valve is installed in the installation chamber.Type: ApplicationFiled: December 26, 2022Publication date: February 20, 2025Applicant: VALEO SYSTEMES THERMIQUESInventors: Jianqi SUN, Wenchuan XIANG, Sheng ZUO, Jingyu NI, Changsheng FAN, Zhigang LIU
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Patent number: 12230578Abstract: A semiconductor chiplet device includes a package substrate, an interposer layer, a first die and a second die. The first die includes a first interface, and the second die includes a second interface. A first side of the interposer layer is configured to arrange the first die and the second die. The first die and the second die perform a data transmission through the first interface, the interposer layer and the second interface. The package substrate is arranged on a second side of the interposer layer, and includes a decoupling capacitor. The decoupling capacitor is arranged between the first interface and the second interface, or arranged in a vertical projection area of the first interface and the second interface on the package substrate.Type: GrantFiled: March 10, 2022Date of Patent: February 18, 2025Assignees: GLOBAL UNICHIP CORPORATION, TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Sheng-Fan Yang, Chih-Chiang Hung, Chen Lee, Yuan-Hung Lin
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Publication number: 20250040191Abstract: Embodiments described herein relate to engineering metal oxide layer interfaces to improve electronic device stability. For example, a transistor device can include a base structure and a metal oxide layer disposed on the base structure. The metal oxide layer includes at least one region having a gradient profile with respect to oxygen (O2) composition.Type: ApplicationFiled: July 18, 2024Publication date: January 30, 2025Inventors: Dejiu Fan, Yun-Chu Tsai, Sheng-Wen Wang, Dong Kil Yim, Soo Young Choi
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Publication number: 20250038089Abstract: An electronic device includes a first metal layer, a first insulating layer disposed on the first metal layer, a second metal layer, a second insulating layer, a third metal layer, a third insulating layer, a fourth metal layer, a fourth insulating layer and an electronic component. The second metal layer is disposed on the first insulating layer. The second insulating layer is disposed on the second metal layer. The third metal layer is disposed on the second insulating layer. The third insulating layer is disposed on the third metal layer. The fourth metal layer is disposed on the third insulating layer. The fourth insulating layer is disposed on the fourth metal layer. The electronic component is disposed on the fourth insulating layer and electrically connected to the fourth metal layer. A Young's modulus of the third insulating layer is less than a Young's modulus of the first insulating layer.Type: ApplicationFiled: October 13, 2024Publication date: January 30, 2025Applicant: Innolux CorporationInventors: Hung-Sheng Chou, Wen-Hsiang Liao, Kuo-Jung Fan, Heng-Shen Yeh, Cheng-Chi Wang
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Patent number: 12211657Abstract: The present invention provides a keycap, which includes a lower plate and an upper cover. The lower plate has two openings respectively through two opposite sides of the lower plate to respectively define two elastic arms. The upper cover is configured to be detachably assembled on the lower plate, in which the upper cover has two abutting portions and a protrusion, and the two abutting portions are respectively disposed on two opposite inner sides of the upper cover and respectively correspond to the two elastic arms, and each of the two abutting portions is configured to abut against a portion of the corresponding elastic arm, and the protrusion is disposed on an inner top surface of the upper cover and corresponds to one of the two openings.Type: GrantFiled: February 17, 2023Date of Patent: January 28, 2025Assignee: Primax Electronics Ltd.Inventors: Lei-Lung Tsai, Sheng-Fan Chang, Che-An Li, Chang-Huan Shen
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Patent number: 12132270Abstract: An antenna structure includes a ground element, a feeding radiation element, a shorting radiation element, a connection radiation element, a first radiation element, and a second radiation element. The feeding radiation element has a feeding point. The feeding radiation element is coupled through the shorting radiation element to the ground element. The connection radiation element is coupled between the first radiation element and the shorting radiation element. The second radiation element is coupled to the feeding radiation element. A coupling slot region is formed and substantially surrounded by the feeding radiation element, the shorting radiation element, the connection radiation element, the first radiation element, and the second radiation element.Type: GrantFiled: November 14, 2022Date of Patent: October 29, 2024Assignee: WISTRON NEWEB CORP.Inventors: Cheng-Rui Zhang, Yu-Sheng Fan
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Publication number: 20240355846Abstract: A curved-surface image-sensor assembly has a porous carrier having a concave surface with a thinned image sensor bonded by an adhesive to its concave surface of the porous carrier; the porous carrier is mounted into a water-resistant package. The sensor assembly is made by fabricating a thinned, flexible, image-sensor integrated circuit (IC) and applying adhesive to a non-illuminated side of the IC; positioning the IC over a concave surface of a porous carrier; applying vacuum through the porous carrier to suck the IC onto the concave surface of the porous carrier; and curing the adhesive to bond the IC to the concave surface of the porous carrier.Type: ApplicationFiled: June 24, 2024Publication date: October 24, 2024Inventors: Chun-Sheng FAN, Wei-Feng LIN
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Publication number: 20240322413Abstract: A high-frequency transmission element is provided. The high-frequency transmission element includes a connecting wire structure and an impedance matching plate structure. The connecting wire structure includes a connecting wire and a connecting pad. The connecting pad is located at an end of the connecting wire. The impedance matching plate structure includes an impedance matching plate body, an opening, and an impedance matching portion. The connecting pad is located in a projection range of the opening in a direction of orthographic projection of the impedance matching plate structure. The impedance matching portion is located in a periphery of the opening and extends in the direction from the connecting wire towards the connecting pad.Type: ApplicationFiled: April 10, 2023Publication date: September 26, 2024Applicants: Global Unichip Corporation, Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Huan-Yi Liao, Yu-Lin Cheng, Chi-Lou Yeh, Sheng-Fan Yang
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Patent number: 12064090Abstract: A cavity interposer has a cavity, first bondpads adapted to couple to a chip-type camera cube disposed within a base of the cavity at a first level, the first bondpads coupled through feedthroughs to second bondpads at a base of the interposer at a second level; and third bondpads adapted to couple to a light-emitting diode (LED), the third bondpads at a third level. The third bondpads coupled to fourth bondpads at the base of the interposer at the second level; and the second and fourth bondpads couple to conductors of a cable with the first, second, and third level different. An endoscope optical includes the cavity interposer an LED, and a chip-type camera cube electrically bonded to the first bondpads; the LED is bonded to the third bondpads; and a top of the chip-type camera cube and a top of the LED are at a same level.Type: GrantFiled: October 18, 2021Date of Patent: August 20, 2024Assignee: OmniVision Technologies, Inc.Inventors: Teng-Sheng Chen, Wei-Ping Chen, Jau-Jan Deng, Wei-Feng Lin, Chun-Sheng Fan
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Patent number: 12066968Abstract: A communication interface structure and a Die-to-Die package are provided. The communication interface structure includes first bumps arranged in a first row-column configuration, second bumps arranged in a second row-column configuration, and conductive lines disposed between the first bumps and the second bumps to connect each of the first bumps to each of the second bumps. The first bumps in neighboring rows are alternately shifted with each other. The second bumps are disposed under or over the first bumps, wherein each of the second bumps in even rows is at a position shifted in a column direction from a center of each of the first bumps in the even rows, and each of the second bumps in odd rows is at a position between two of the second bumps in the even rows in the column direction.Type: GrantFiled: July 13, 2022Date of Patent: August 20, 2024Assignees: Global Unichip Corporation, Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sheng-Fan Yang, Chih-Chiang Hung, Yuan-Hung Lin, Shih-Hsuan Hsu, Igor Elkanovich
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Patent number: 12062673Abstract: A curved-surface image-sensor assembly has a porous carrier having a concave surface with a thinned image sensor bonded by an adhesive to its concave surface of the porous carrier; the porous carrier is mounted into a water-resistant package. The sensor assembly is made by fabricating a thinned, flexible, image-sensor integrated circuit (IC) and applying adhesive to a non-illuminated side of the IC; positioning the IC over a concave surface of a porous carrier; applying vacuum through the porous carrier to suck the IC onto the concave surface of the porous carrier; and curing the adhesive to bond the IC to the concave surface of the porous carrier.Type: GrantFiled: November 2, 2021Date of Patent: August 13, 2024Assignee: OmniVision Technologies, Inc.Inventors: Chun-Sheng Fan, Wei-Feng Lin
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Publication number: 20240266126Abstract: The present invention provides a keycap, which includes a lower plate and an upper cover. The lower plate has at least two engaging holes recessed inwardly from an upper surface of the lower plate and separated from each other. The upper cover is configured to be detachably assembled on the lower plate, in which the upper cover has at least two buckle members disposed on an inner top surface of the upper cover and respectively corresponding to the at least two engaging holes, and each of the buckle members has two buckle portions separated from each other, and each of the buckle portions has a protrusion protruding laterally outward, and each of the protrusions is configured to engage with a portion of the corresponding engaging hole.Type: ApplicationFiled: March 20, 2023Publication date: August 8, 2024Inventors: Sheng-Fan Chang, Che-An Li, Chang-Huan Shen, Chuang-Shu Jhuang
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Publication number: 20240242902Abstract: A keycap includes a lower plate, a first magnetic element, an upper cover and a second magnetic element. The lower plate has two first engaging portions, which are respectively disposed on two opposite sides of an upper surface of the lower plate. The first magnetic element is fixed on the lower plate. The upper cover is configured to be detachably assembled on the lower plate, in which the upper cover has two second engaging portions respectively disposed on two opposite sides of an inner top surface of the upper cover and respectively corresponding to the two first engaging portions. The second magnetic element is fixed on the inner top surface of the upper cover, and is configured to magnetically attract the first magnetic element.Type: ApplicationFiled: March 21, 2023Publication date: July 18, 2024Inventors: Lei-Lung Tsai, Sheng-Fan Chang, Chang-Huan Shen
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Publication number: 20240242903Abstract: The present invention provides a keycap, which includes a lower plate and an upper cover. The lower plate has two openings respectively through two opposite sides of the lower plate to respectively define two elastic arms. The upper cover is configured to be detachably assembled on the lower plate, in which the upper cover has two abutting portions and a protrusion, and the two abutting portions are respectively disposed on two opposite inner sides of the upper cover and respectively correspond to the two elastic arms, and each of the two abutting portions is configured to abut against a portion of the corresponding elastic arm, and the protrusion is disposed on an inner top surface of the upper cover and corresponds to one of the two openings.Type: ApplicationFiled: February 17, 2023Publication date: July 18, 2024Inventors: Lei-Lung Tsai, Sheng-Fan Chang, Che-An Li, Chang-Huan Shen
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Publication number: 20240213129Abstract: An interposer device comprises two bump regions, a channel region, a plurality of signal lines and a plurality of ground lines. The two bump regions are respectively coupled to two semiconductor devices. The channel region is connected between the two bump regions. The plurality of signal lines are embedded in the two bump regions and the channel region, and electrically connected to the two semiconductor devices for transmitting circuit signals. The plurality of ground lines are embedded in the two bump regions and the channel region for shielding the plurality of signal lines. In each bump region, each signal line comprises a trunk portion, a turning portion, and a signal turning point connected between the trunk portion and the turning portion. The trunk portion extends parallel to a first direction, and the turning portion extends parallel to a second direction.Type: ApplicationFiled: March 21, 2023Publication date: June 27, 2024Inventors: Hao-Yu TUNG, Sheng-Fan YANG, Hung-Yi CHANG, Yi-Tzeng LIN, Wei-Chiao WANG, Wei-Hsun LIAO
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Publication number: 20240213112Abstract: A semiconductor packaging device includes a packaging module, a heat dissipation cover and a thermal interface material layer. The package module includes a substrate, and a working chip mounted on the substrate. The heat dissipation cover includes a metal cover fixed on the substrate and covering the working chip, an accommodating recess located on the metal cover to accommodate the working chip, and a plurality of protrusive columns respectively formed on the metal cover and distributed within the accommodating recess at intervals. The depth of the accommodating recess is greater than the height of each protrusive column, and the accommodating recess is greater than the working chip. The thermal interface material layer is non-solid, and located within the accommodating recess between the protrusive columns to wrap the protrusive columns and contact with the working chip, the metal cover and the protrusive columns.Type: ApplicationFiled: February 15, 2023Publication date: June 27, 2024Inventors: Sheng-Fan YANG, Yen-Chao LIN, Chi-Ming YANG