Abstract: Disclosed herein are systems and method for voltage clamping in semiconductor circuits using through-silicon via (TSV) positioning. A semiconductor die is disclosed that includes a silicon substrate, a bipolar transistor having collector, emitter, base and sub-collector regions disposed on the substrate, and a through-silicon via (TSV) positioned within 35 ?m of the sub-collector region in order to clamp a peak voltage of the bipolar transistor at a voltage limit level.

Abstract: Peak voltage limiting circuits and method for power amplifiers. A power amplifier and/or a voltage limiting circuit includes a diode circuit coupled to an output of an amplification stage, the diode circuit configured to provide a conductive path from the output when an output voltage exceeds a selected value. The power amplifier and/or voltage limiting circuit also includes a sink circuit coupled to the diode circuit and a bias circuit, the sink circuit configured to reduce a bias voltage provided by the bias circuit when the output voltage exceeds the selected value to thereby limit the output voltage.

Abstract: Provided herein are apparatus and methods for overdrive protection of radio frequency (RF) amplifiers. In certain configurations, an RF amplifier includes a plurality of amplification stages and an overdrive detection circuit. The overdrive detection circuit determines whether or not the RF amplifier is in an overdrive condition based on a current of an input amplification stage. Additionally, when the overdrive detection circuit detects an overdrive condition, the overdrive detection circuit controls an impedance of one or more feedback circuits of one or more amplification stages subsequent to the input amplification stage in a signal path of the RF amplifier to reduce the RF amplifier's gain. The overdrive protection schemes herein can be used to limit large current and voltage swing conditions manifesting within amplification transistors of the RF amplifier.

Abstract: Devices and methods related to embedded sensors for dynamic error vector magnitude corrections. In some embodiments, a power amplifier (PA) can include a PA die and an amplification stage implemented on the PA die. The amplification stage can include an array of amplification transistors, with the array being configured to receive and amplify a radio-frequency (RF) signal. The PA can further include a sensor implemented on the PA die. The sensor can be positioned relative to the array of amplification transistors to allow sensing of an operating condition representative of at least some of the amplification transistors. The sensor can be substantially isolated from the RF signal.

Abstract: Disclosed herein are systems and method for voltage clamping in semiconductor circuits using through-silicon via (TSV) positioning. A semiconductor die is disclosed that includes a silicon substrate, a bipolar transistor having collector, emitter, base and sub-collector regions disposed on the substrate, and a through-silicon via (TSV) positioned within 35 ?m of the sub-collector region in order to clamp a peak voltage of the bipolar transistor at a voltage limit level.

Abstract: A system and method are provided for reducing dynamic EVM of an integrated circuit power amplifier (PA) used for RF communication. In a multistage PA, the largest amplification stage is biased with a high amplitude current pulse upon receipt of a Tx enable, before receipt of the RF signal data burst. The high amplitude current pulse causes a large portion of the total ICQ budget of the multistage PA to pass through the largest amplification stage causing the entire integrated circuit to rapidly approach steady-state operating conditions. A smoothing bias current is applied to the largest amplification stage after the pulse decays to compensate for transient bias current levels while standard bias circuitry is still approaching steady-state temperature.

Abstract: An isolation structure for high frequency integrated circuits is a conductive material disposed over a region of active gallium arsenide substrate. The conductive material over the active region creates a lossy RF path to reduce undesired coupling between adjacent conductors. In one case, two RF signal lines (1,2) terminated at the same via pad (3) have weaker coupling than in prior art via structures due to the lossy RF structure disposed on isolating fractional portions (10,11) of the via pad (3). The isolating fractional portion (10,11) are intermediate terminating fractional portions (8,9) of the via pad (3) to which the signal lines (1,2) are connected. In another case, two parallel bias lines (12,13) are disposed over an active layer region (6) increasing the RF loss between them and advantageously reducing the RF coupling. The reduced RF coupling improves RF isolation and permits increased miniaturization.

Abstract: A semiconductor amplifier includes collector straps that form air bridges over a set of transistors and make parallel electrical connections between the collectors of the transistor and collector contact pad. Base straps establish base bias and electrically connect a dc current source with bases of the transistors through resistive elements.

Abstract: A semiconductor amplifier includes collector straps that form air bridges over a set of transistors and make parallel electrical connections between the collectors of the transistor and collector contact pad. Base straps establish base bias and electrically connect a dc current source with bases of the transistors through resistive elements.