Patents by Inventor Anton Arriagada

Anton Arriagada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Trap rich layer with through-silicon-vias in semiconductor devices
    Patent number: 8481405
    Abstract: An integrated circuit chip is formed with a circuit layer, a trap rich layer and through-semiconductor-vias. The trap rich layer is formed above the circuit layer. The through-semiconductor-vias are also formed above the circuit layer. In some embodiments, the circuit layer is included in a wafer, and the trap rich layer and through-semiconductor-vias are included in another wafer. The two wafers are bonded together after formation of the trap rich layer and through-semiconductor-vias. Additionally, in some embodiments, yet another wafer may also be bonded to the wafer that includes the trap rich layer and through-semiconductor-vias. Furthermore, in some embodiments, another circuit layer may be formed in the wafer that includes the trap rich layer and through-semiconductor-vias.
    Type: Grant
    Filed: October 15, 2012
    Date of Patent: July 9, 2013
    Assignee: IO Semiconductor, Inc.
    Inventors: Anton Arriagada, Chris Brindle, Michael A. Stuber