Abstract: A method of forming a semiconductor device includes providing a starting structure including a substrate having thereon a plurality of gate regions alternately arranged with a plurality of source/drain (S/D) regions, wherein each of the gate regions includes a nanochannel structure having an intermediate portion surrounded by a replacement gate, and opposing end portions surrounded by respective gate spacers such that the nanochannel structure extends through the replacement gate and the gate spacers of the gate region. Each of the S/D regions includes an S/D structure extending through the S/D region to connect nanochannel structures of first and second adjacent gate regions provided on opposing sides of the S/D region respectively.

Abstract: Some embodiments include methods of forming structures supported by semiconductor substrates. Radiation-imageable material may be formed over a substrate and patterned into at least two separated features. A second material may be formed over the features and across one or more gaps between the features. At least one substance may be released from the features and utilized to alter a portion of the second material. The altered portion of the second material may be selectively removed relative to another portion of the second material which is not altered. Also, the features of radiation-imageable material may be selectively removed relative to the altered portion of the second material. The second material may contain one or more inorganic components dispersed in an organic composition. The substance released from the features of radiation-imageable material may be acid which forms cross-links within such organic composition, an hydroxyl, or any other suitable substance.

Abstract: Disclosed herein is a technology related to the amelioration (e.g., correction) of global wafer distortion based on a determination of localized distortions of a semiconductor wafer. Herein, a distortion is either an out-of-plane distortion (OPD) or in-plane distortion (IPD). The reference plane for this distortion is based on the plane shared by the surface of a presumptively flat semiconductor wafer. This Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Abstract: A process is disclosed for wetting a filter cartridge used to treat a liquid solvent used in semiconductor manufacture. In the process, a filter cartridge having void spaces wherein the void spaces contain residual gas from the manufacturing process used to make the filter cartridge is connected to a source of purging gas. The purging gas is flowed through the filter cartridge to at least partially displace at least a portion of the residual gas from the manufacturing process used to make the filter cartridge. Next, liquid solvent is pumped through the filter cartridge so that the purging gas dissolves into the liquid solvent and to at least partially fill the void spaces to thereby at least partially wet out the filter cartridge with the liquid solvent.

Abstract: A 3-D IC includes a substrate having a substrate surface. A first semiconductor device has a first electrical contact and is formed in a first area of the surface on a first plane substantially parallel to the substrate surface. A second semiconductor device has a second electrical contact and is formed in a second area of the surface on a second plane substantially parallel to the surface and vertically spaced from the first plane in a direction substantially perpendicular to the surface. A first electrode structure includes opposing top and bottom surfaces substantially parallel to the substrate surface, and a sidewall connecting the top and bottom surfaces such that the electrode structure forms a three dimensional electrode space.

Abstract: A semiconductor device including a substrate and a gate region of a field effect transistor formed on the substrate. The gate region includes vertically stacked nanowires having longitudinal axes that extend parallel with a working surface of the substrate. A given stack of vertically stacked nanowires includes at least two nanowires vertically aligned in which a p-type nanowire and an n-type nanowire are spatially separated from each other vertically. The semiconductor device further includes a step-shaped connecting structure formed within the gate region that electrically connects each nanowire to positions above the gate region. A first gate electrode has a step-shaped profile and connects to a first-level nanowire.

Abstract: A semiconductor device including a substrate and a gate region of a field effect transistor formed on the substrate. The gate region includes vertically stacked nanowires having longitudinal axes that extend parallel with a working surface of the substrate. A given stack of vertically stacked nanowires includes at least two nanowires vertically aligned in which a p-type nanowire and an n-type nanowire are spatially separated from each other vertically. The semiconductor device further Includes a step-shaped connecting structure formed within the gate region that electrically connects each nanowire to positions above the gate region. A first gate electrode has a step-shaped profile and connects to a first-level nanowire.

Abstract: A 3-D IC includes a substrate having a substrate surface. A first semiconductor device has a first electrical contact and is formed in a first area of the surface on a first plane substantially parallel to the substrate surface. A second semiconductor device has a second electrical contact and is formed in a second area of the surface on a second plane substantially parallel to the surface and vertically spaced from the first plane in a direction substantially perpendicular to the surface. A first electrode structure includes opposing top and bottom surfaces substantially parallel to the substrate surface, and a sidewall connecting the top and bottom surfaces such that the electrode structure forms a three dimensional electrode space.

Abstract: Epitaxial growth methods and devices are described that include a textured surface on a substrate in a liquid crystal device. Geometry of the textured surface provides a organization of a liquid crystal media.

Abstract: A fluid dispensing apparatus is disclosed. Systems include an in-line or linear bladder apparatus configured to expand to collect a charge of fluid, and contract to assist with fluid delivery and dispensing. During a dispense-off period process fluid can collect in this bladder after the process fluid is pushed through a fine filter (micro filter). A given filtration rate can be less than a dispense rate and thus the system herein compensates for filter-lag that often accompanies fluid filtering for microfabrication, while providing a generally linear configuration that reduces chances for defect creation.

Abstract: A method of fabricating a substrate includes forming spaced first features over a substrate. An alterable material is deposited over the spaced first features and the alterable material is altered with material from the spaced first features to form altered material on sidewalls of the spaced first features. A first material is deposited over the altered material, and is of some different composition from that of the altered material. The first material is etched to expose the altered material and spaced second features comprising the first material are formed on sidewalls of the altered material. Then, the altered material is etched from between the spaced second features and the spaced first features. The substrate is processed through a mask pattern comprising the spaced first features and the spaced second features. Other embodiments are disclosed.

Abstract: Epitaxial growth methods and devices are described that include a textured surface on a substrate. Geometry of the textured surface provides a reduced lattice mismatch between an epitaxial material and the substrate. Devices formed by the methods described exhibit better interfacial adhesion and lower defect density than devices formed without texture. Silicon substrates are shown with gallium nitride epitaxial growth and devices such as LEDs are formed within the gallium nitride.

Abstract: Epitaxial growth methods and devices are described that include a textured surface on a substrate. Geometry of the textured surface provides a reduced lattice mismatch between an epitaxial material and the substrate. Devices formed by the methods described exhibit better interfacial adhesion and lower defect density than devices formed without texture. Silicon substrates are shown with gallium nitride epitaxial growth and devices such as LEDs are formed within the gallium nitride.

Abstract: Embodiments described relate to a method and apparatus for reducing lithographic distortion. A backside of a semiconductor substrate may be texturized. Then a lithographic process may be performed on the semiconductor substrate having the texturized backside.

Abstract: A method for self-aligned double patterning without needing atomic layer deposition techniques is disclosed. Techniques include using a staircase etch technique to preferentially shrink one material without shrinking an underlying material, followed by a resist-based chemical polishing and planarization technique that yields a narrowed and protruding feature (single-layer thickness) that is sufficiently physically supported, and that can be transferred to one or more underlying layers. After removing a resist coating, the result is a pattern that has been doubled without using ALD techniques. Such techniques improve efficiencies over conventional techniques for self-aligned double patterning.

Abstract: Photolithographic apparatus and methods are disclosed. One such apparatus includes an optical path configured to provide a first diffraction pattern in a portion of an optical system and to provide a second diffraction pattern to the portion of the optical system after providing the first diffraction pattern. Meanwhile, one such method includes providing a first diffraction pattern onto a portion of an optical system, wherein a semiconductor article is imaged using the first diffraction pattern. A second diffraction pattern is also provided onto the portion of the optical system, but the second diffraction pattern is not used to image the semiconductor article.

Abstract: Epitaxial growth methods and devices are described that include a textured surface on a substrate. Geometry of the textured surface provides a reduced lattice mismatch between an epitaxial material and the substrate. Devices formed by the methods described exhibit better interfacial adhesion and lower defect density than devices formed without texture. Silicon substrates are shown with gallium nitride epitaxial growth and devices such as LEDs are formed within the gallium nitride.

Abstract: Methods of lithography, methods for forming patterning tools, and patterning tools are described. One such patterning tool include an active region that forms a first diffraction image on a lens when in use, and an inactive region that forms a second diffraction image on a lens when in use. The inactive region includes a pattern of phase shifting features formed in a substantially transparent material of the patterning tool. Patterning tools and methods, as described, can be used to compensate for lens distortion from effects such as localized heating.

Abstract: A method of forming a pattern on a substrate includes forming a repeating pattern of four first lines elevationally over an underlying substrate. A repeating pattern of four second lines is formed elevationally over and crossing the repeating pattern of four first lines. First alternating of the four second lines are removed from being received over the first lines. After the first alternating of the four second lines have been removed, elevationally exposed portions of alternating of the four first lines are removed to the underlying substrate using a remaining second alternating of the four second lines as a mask. Additional embodiments are disclosed and contemplated.

Abstract: Epitaxial growth methods and devices are described that include a textured surface on a substrate. Geometry of the textured surface provides a reduced lattice mismatch between an epitaxial material and the substrate. Devices formed by the methods described exhibit better interfacial adhesion and lower defect density than devices formed without texture. Silicon substrates are shown with gallium nitride epitaxial growth and devices such as LEDs are formed within the gallium nitride.