Abstract: In accordance with an embodiment, described herein is a system and method for database replication benchmark testing. The system can include one or more microservices configured to collect performance metrics from a testing environment, and a plurality of workload configurations that define different types of pipelines. Each pipeline can be used to execute a workload, and use different techniques to handle errors during the execution of the pipeline. A pipeline control manager can receive a workload configuration, and identify a pipeline defined therein. The pipeline control manager can invoke the one or more microservices to collect performance metrics from the testing environment, and use the collected performance metrics to validate the testing environment before starting the workload. Performance metrics from each pipeline stage can be consolidated and displayed at a user interface. The system can automatically select a workload configuration based on a replication feature to be tested.

Abstract: Systems and methods for identifying a new device in an internet of things (IoT) network comprising a plurality of devices. The method includes, by a processor: detecting that a new device has been added to the IoT network; receiving identification data corresponding to the new device; determining a first device identification using a deep learning algorithm; determining a second device identification using a clustering algorithm; determining a third device identification based on a reference table; determining a fourth device identification by analyzing one or more values included in the identification data. The method further includes selecting, at least one of the first device identification, the second device identification, the third device identification, or the fourth device identification, as a final device identification by performing a weighted selection.

Abstract: Micro light-emitting diode (LED) display fabrication and assembly are described. In an example, a micro-light emitting diode (LED) display panel includes a display backplane substrate having a plurality of metal bumps thereon. A plurality of LED pixel elements includes ones of LED pixel elements bonded to corresponding ones of the plurality of metal bumps of display backplane substrate. One or more of the plurality of LED pixel elements has a graphene layer thereon. The graphene layer is on a side of the one or more of the plurality of LED pixel elements opposite the side of the metal bumps.

Abstract: A system for melting a pelleted charge material including a furnace having a feed end configured to receive a solid pelleted charge material and a discharge end opposite the feed end configured to discharge a molten charge material and a slag, a conveyor configured to feed the pelleted charge material into the feed end of the furnace, at least one oxy-fuel burner positioned to direct heat into a melting zone near the feed end to heat and at least partially melt the pelleted charge material to form the molten charge material and slag, wherein the oxy-fuel burner uses an oxidant having at least 70% molecular oxygen, and at least one flue for exhausting burner combustion products from the furnace.

Abstract: A device and method that include a power control analog subsystem of a universal serial bus (USB) compatible power supply device is disclosed. The power control analog subsystem includes a programmable reference generator to generate first reference voltages. The power control analog subsystem also includes multiplexers, where each of a plurality of multiplexers are coupled to a first terminal and a second terminal of a producer field-effect transistor (FET) to receive a first voltage (Vbus_in) and a second voltage (Vbus_c) and to output second reference voltages. The power control analog subsystem further includes comparators, wherein each of the comparators is coupled to receive a corresponding reference voltage of the first reference voltages from the programmable reference generator and to receive a corresponding selected voltage from a corresponding multiplexer of the multiplexers. Each of the comparators is configured to output a corresponding system interrupt based on a corresponding voltage condition.

Abstract: The subject matter of the present disclosure generally relates to techniques for image analysis. In certain embodiments, various morphological or intensity-based features as well as different thresholding approaches may be used to segment the subpopulation of interest and classify object in the images.

Abstract: Techniques for control of power switches in a USB Power Delivery (USB-PD) system are described herein. In an example embodiment, an integrated circuit comprises a programmable gate control circuit coupled to a provider field effect transistor (FET) and a consumer FET to provide control signals to the provider and consumer FETs in response to system conditions and application requirements of the USB-PD system. A pulldown current control circuit may provide additional control to slew rate for the slow turn-ON of provider and consumer FETs.

Abstract: Heart valve replacement often involves complications associated with paravalvular leaks. Vascular plug and occlusive devices, as well as heart valves particularly beneficial in treating the phenomenon of paravalvular leaks are described to address this issue.

Abstract: A method and system of processing an information technology (IT) electronic request is provided. The electronic request is received in natural language from a user. Parameters of the electronic request are extracted. A risk of the electronic request is determined. A policy based on the parameters and the risk of the electronic request is determined and executed. A level of trust between the user and the computer device is calculated based on the determined risk and an outcome of the execution of the policy. A conversation pattern of the computer device toward the user is adjusted based on the calculated level of trust.

Abstract: Techniques for power-Field Effect Transistor (power-FET) gate drivers are described herein. In an example embodiment, a method for an USB-enabled system with an integrated circuit (IC) controller comprises: determining, by the IC controller, whether a first power path or a second power path is coupled to the IC controller, where the first power path comprises an external N-channel power-FET and the second power path comprises an external P-channel power-FET; turning and maintaining ON the external N-channel power-FET by the IC controller, when the first power path is determined as being coupled to the IC controller; and turning OFF the external N-channel power-FET and turning and maintaining ON the external P-channel power-FET by the IC controller, when the second power path is determined as being coupled to the IC controller.

Abstract: A system and method for a decimated phase detector circuit includes a bang bang phase detector (BBFD), an UP rolling counter connected to an UP output of the BBFD, and a DOWN rolling counter connected to a DOWN output of the BBFD. A charge pump is connected to the UP rolling counter and the DOWN rolling counter and is configured to receive a decimated UP signal from the UP rolling counter and a decimated DOWN signal from the DOWN rolling counter. The charge pump is further configured to provide a control voltage according to the received decimated UP signals and decimated DOWN signals.

Abstract: Techniques for voltage discharge from a USB Power Delivery (USB-PD) VBUS line are described herein. In an example embodiment, an integrated circuit comprises a discharge control logic coupled to a first discharge circuit and to a second discharge circuit. The first discharge circuit configured to couple to a power source node on the VBUS line. The second discharge circuit configured to couple to an output node on the VBUS line. The discharge control logic is configured to independently control the first discharge circuit and the second discharge circuit to discharge the voltage on the VBUS line.

Abstract: A system and method for a decimated phase detector circuit includes a bang bang phase detector (BBFD), an UP rolling counter connected to an UP output of the BBFD, and a DOWN rolling counter connected to a DOWN output of the BBFD. A charge pump is connected to the UP rolling counter and the DOWN rolling counter and is configured to receive a decimated UP signal from the UP rolling counter and a decimated DOWN signal from the DOWN rolling counter. The charge pump is further configured to provide a control voltage according to the received decimated UP signals and decimated DOWN signals.

Abstract: The present disclosure generally relates to methods of measuring benzimidazole-based corrosion inhibitors in cooling water. Methods may include withdrawing a sample of water containing a benzimidazole-based compound from an aqueous system and adding an acid to the sample of water and/or diluting with water. Methods may also include exposing the sample of water to light energy of a selected excitation wavelength and measuring an intensity of emitted light about a selected fluorescence emission wavelength. The intensity of the emitted light may be compared to a standard curve, which can be a plot of fluorescence emission intensity of the benzimidazole-based compound versus concentration of the benzimidazole-based compound. The concentration of the benzimidazole-based compound in the sample of water may be determined from the standard curve.

Abstract: A two-stage decision feedback equalizer. The decision feedback equalizer is configured to receive serial data, at an analog input, at a first data rate. The two-stage decision feedback equalizer has an analog input and four digital outputs, and includes a first stage and a second stage. The first stage is connected to the analog input, and includes a half-rate predictive decision feedback equalizer consisting of current mode logic circuits. The second stage is connected to the first stage, and consists of complementary metal oxide semiconductor circuits.

Abstract: A computer-method is provided for designing a router network to connect components of an integrated circuit, where the router network comprises a plurality of connected data routing elements. The method comprises generating an undirected graph to represent a mesh of candidate router elements, where the candidate data routing elements are positioned dependent on at least one characteristic of the integrated circuit. The undirected graph comprises a node to represent each candidate data routing element and an edge to represent each connection between the candidate data routing elements.

Abstract: An oxy-gaseous fuel burner (400, 500) or a solid fuel burner (700) having an annular cavity (404, 504, 704) upstream from and proximate to an outlet plane (416, 516, 716) and a converging (434, 734) or converging-diverging nozzle (537) located upstream from and proximal to the cavity (404, 504, 704). The solid fuel burner (700) also is preferably operated so that the velocity of gas exiting a second annulus (730) is less than the velocity of gas exiting a central conduit (710).

Abstract: Trench JFETs may be created by etching trenches into the topside of a substrate of a first doping type to form mesas. The substrate is made up of a backside drain layer, a middle drift layer, and topside source layer. The etching goes through the source layer and partly into the drift layer. Gate regions are formed on the sides and bottoms of the trenches using doping of a second type. Vertical channel regions are formed behind the vertical gate segments via angled implantation using a doping of the first kind, providing improved threshold voltage control. Optionally the substrate may include a lightly doped channel layer between the drift and source layers, such that the mesas include a lightly doped channel region that more strongly contrasts with the implanted vertical channel regions.

Abstract: Semiconductor devices are formed using a pair of thin epitaxial layers (nanotubes) of opposite conductivity type formed on sidewalls of dielectric-filled trenches. In one embodiment, a termination structure is formed in the termination area and includes a first termination cell formed in the termination area at an interface to the active area, the termination cell being formed in a mesa of the first semiconductor layer and having a first width; and an end termination cell being formed next to the first termination cell in the termination area, the end termination cell being formed in an end mesa of the first semiconductor layer and having a second width greater than the first width.

Abstract: Implementations described herein include devices and systems for attenuation of increased spinal flexion loads post-fusion that include a transition member. The transition member may have a tension component coupleable to a fused vertebra of a plurality of fused vertebra of a fusion implant and to an adjacent unfused vertebra. The tension component may be tensionable to a selected value. The tension component may modulate a flexion range of motion of the adjacent unfused vertebra as a function of the selected value of tension of the tension component. The transition member may attenuate spinal flexion loads on adjacent unfused vertebra post-operatively.