Patents by Inventor Aparna U. Limaye
Aparna U. Limaye has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11386231Abstract: Methods and systems for context-based mobile device feature control are provided. One method comprises determining, with a mobile device, one or more contexts corresponding to the mobile device; selecting, from a predetermined set of security protocols, a security protocol corresponding to the determined one or more contexts; and adjusting a permission setting for one or more functional features of the mobile device based upon the selected security protocol. One apparatus comprises one or more features configure to input data, output data, transform data, or a combination thereof; and a controller configured to: determine one or more contexts corresponding to the mobile computing device, to select, from a predetermined set of security protocols, a security protocol corresponding to the determined one or more contexts, and to adjust a permission setting for the one or more functional features based upon the selected security protocol.Type: GrantFiled: July 27, 2020Date of Patent: July 12, 2022Assignee: Micron Technology, Inc.Inventors: Aparna U. Limaye, Lindsay Hamilton, Carla L. Christensen, Cipriana Forgy, Brandi M. Jones
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Patent number: 11362070Abstract: Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more stacks of microelectronic devices are located on the substrate, and microelectronic devices of the stacks are connected to vertical conductive paths external to the stacks and extending to the substrate and to lateral conductive paths extending between the stacks. Methods of fabrication are also disclosed.Type: GrantFiled: July 27, 2020Date of Patent: June 14, 2022Assignee: Micron Technology, Inc.Inventors: Aparna U. Limaye, Dong Soon Lim, Randon K. Richards, Owen R. Fay
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Publication number: 20220171705Abstract: Systems, apparatuses, and methods related to media management, including “garbage collection,” in memory or storage systems or sub-systems, such as solid state drives, are described. For example, a battery state associated with the memory system or sub-system may be used as an indicator or basis for managing a garbage collection operation on a data block. A controller or the system or sub-system may determine that a battery state or condition satisfies a criterion. Based on determining that the criterion is satisfied the, the garbage collection operation may be postponed until the battery state changes to satisfy a different battery condition.Type: ApplicationFiled: February 16, 2022Publication date: June 2, 2022Inventors: Aparna U. Limaye, Tracy D. Evans, Tomoko Ogura Iwasaki, Avani F. Trivedi, Jianmin Huang
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Publication number: 20220172769Abstract: Systems and methods for read operations and management are disclosed. More specifically, this disclosure is directed to receiving a first read command directed to a first logical address and receiving, after the first read command, a second read command directed to a second logic address. The method also includes receiving, after the second read command, a third read command directed to a third logical address and determining that the first logical address and the third logical address correspond to a first physical address and a third physical address, respectively. The first physical address and the third physical address can be associated with a first word line of a memory component while the second logical address corresponds to a second physical address associated with a second word line of the memory component. The method includes executing the first read command and the third read command sequentially.Type: ApplicationFiled: February 16, 2022Publication date: June 2, 2022Inventors: Tomoko Ogura Iwasaki, Tracy D. Evans, Avani F. Trivedi, Aparna U. Limaye, Jianmin Huang
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Publication number: 20220171562Abstract: Systems, apparatuses, and methods related to media management, including “garbage collection,” in memory or storage systems or sub-systems, such as solid state drives, are described. For example, a criticality value can be determined and used as a basis for managing a garbage collection operation on a data block. A controller or the system or sub-system may determine that a criticality value associated with performing a garbage collection operation satisfies a condition. Based on determining that the condition is satisfied, a parameter associated with performing the garbage collection operation can be adjusted. The garbage collection operation is performed on the data block stored on the memory component using the adjusted parameter.Type: ApplicationFiled: February 16, 2022Publication date: June 2, 2022Inventors: Jianmin Huang, Aparna U. Limaye, Avani F. Trivedi, Tomoko Ogura Iwasaki, Tracy D. Evans
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Patent number: 11282567Abstract: Systems and methods for read operations and management are disclosed. More specifically, this disclosure is directed to receiving a first read command directed to a first logical address and receiving, after the first read command, a second read command directed to a second logic address. The method also includes receiving, after the second read command, a third read command directed to a third logical address and determining that the first logical address and the third logical address correspond to a first physical address and a third physical address, respectively. The first physical address and the third physical address can be associated with a first word line of a memory component while the second logical address corresponds to a second physical address associated with a second word line of the memory component. The method includes executing the first read command and the third read command sequentially.Type: GrantFiled: August 17, 2020Date of Patent: March 22, 2022Assignee: Micron Technology, Inc.Inventors: Tomoko Ogura Iwasaki, Tracy D. Evans, Avani F. Trivedi, Aparna U. Limaye, Jianmin Huang
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Patent number: 11281392Abstract: Systems, apparatuses, and methods related to media management, including “garbage collection,” in memory or storage systems or sub-systems, such as solid state drives, are described. For example, a criticality value can be determined and used as a basis for managing a garbage collection operation on a data block. A controller or the system or sub-system may determine that a criticality value associated with performing a garbage collection operation satisfies a condition. Based on determining that the condition is satisfied, a parameter associated with performing the garbage collection operation can be adjusted. The garbage collection operation is performed on the data block stored on the memory component using the adjusted parameter.Type: GrantFiled: August 17, 2020Date of Patent: March 22, 2022Assignee: Micron Technology, Inc.Inventors: Jianmin Huang, Aparna U. Limaye, Avani F. Trivedi, Tomoko Ogura Iwasaki, Tracy D. Evans
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Patent number: 11281578Abstract: Systems, apparatuses, and methods related to media management, including “garbage collection,” in memory or storage systems or sub-systems, such as solid state drives, are described. For example, a battery state associated with the memory system or sub-system may be used as an indicator or basis for managing a garbage collection operation on a data block. A controller or the system or sub-system may determine that a battery state or condition satisfies a criterion. Based on determining that the criterion is satisfied the, the garbage collection operation may be postponed until the battery state changes to satisfy a different battery condition.Type: GrantFiled: August 17, 2020Date of Patent: March 22, 2022Assignee: Micron Technology, Inc.Inventors: Aparna U. Limaye, Tracy D. Evans, Tomoko Ogura Iwasaki, Avani F. Trivedi, Jianmin Huang
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Publication number: 20220068837Abstract: Semiconductor devices with antennas and electromagnetic interference (EMI) shielding, and associated systems and methods, are described herein. In one embodiment, a semiconductor device includes a semiconductor die coupled to a package substrate. An antenna structure is disposed over and/or adjacent the semiconductor die. An electromagnetic interference (EMI) shield is disposed between the semiconductor die and the antenna structure to shield at least the semiconductor die from electromagnetic radiation generated by the antenna structure and/or to shield the antenna structure from interference generated by the semiconductor die. A first dielectric material and/or a thermal interface material can be positioned between the semiconductor die and the EMI shield, and a second dielectric material can be positioned between the EMI shield and the antenna structure.Type: ApplicationFiled: November 11, 2021Publication date: March 3, 2022Inventors: Owen R. Fay, Dong Soon Lim, Randon K. Richards, Aparna U. Limaye
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Publication number: 20220027066Abstract: Apparatuses and methods related to memory authentication. Memory devices can be authenticated utilizing authentication codes. An authentication code can be generated based on information stored in a fuse array of the memory device. The authentication code can be stored in the memory device. The stored authentication code can be compared to a captured authentication code based on fuse array information broadcast to memory components of the memory device. The authenticity of the memory device can be determined based on the comparison and can result in placing the memory device in an unlocked state.Type: ApplicationFiled: October 8, 2021Publication date: January 27, 2022Inventors: Rachael R. Carlson, Aparna U. Limaye, Diana C. Majerus, Debra M. Bell, Shea M. Morrison
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Publication number: 20220020403Abstract: Apparatus and methods are disclosed, including memory devices and systems. Example memory devices, systems and methods include a buffer to translate high speed data interactions on a host interface side into slower, wider data interactions on a DRAM interface side. Example memory devices, systems and methods include a multiplexer circuit to further facilitate use of slower, and wider bandwidth memory devices. Devices and methods described may be configured to substantially match the capacity of a narrower, higher speed host interface.Type: ApplicationFiled: July 13, 2021Publication date: January 20, 2022Inventors: Aparna U. Limaye, Timothy Mowry Hollis
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Patent number: 11177222Abstract: Semiconductor devices with antennas and electromagnetic interference (EMI) shielding, and associated systems and methods, are described herein. In one embodiment, a semiconductor device includes a semiconductor die coupled to a package substrate. An antenna structure is disposed over and/or adjacent the semiconductor die. An electromagnetic interference (EMI) shield is disposed between the semiconductor die and the antenna structure to shield at least the semiconductor die from electromagnetic radiation generated by the antenna structure and/or to shield the antenna structure from interference generated by the semiconductor die. A first dielectric material and/or a thermal interface material can be positioned between the semiconductor die and the EMI shield, and a second dielectric material can be positioned between the EMI shield and the antenna structure.Type: GrantFiled: July 29, 2019Date of Patent: November 16, 2021Assignee: Micron Technology, Inc.Inventors: Owen R. Fay, Dong Soon Lim, Randon K. Richards, Aparna U. Limaye
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Patent number: 11144214Abstract: Apparatuses and methods related to memory authentication. Memory devices can be authenticated utilizing authentication codes. An authentication code can be generated based on information stored in a fuse array of the memory device. The authentication code can be stored in the memory device. The stored authentication code can be compared to a captured authentication code based on fuse array information broadcast to memory components of the memory device. The authenticity of the memory device can be determined based on the comparison and can result in placing the memory device in an unlocked state.Type: GrantFiled: July 25, 2019Date of Patent: October 12, 2021Assignee: Micron Technology, Inc.Inventors: Rachael R. Carlson, Aparna U. Limaye, Diana C. Majerus, Debra M. Bell, Shea M. Morrison
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Publication number: 20210202017Abstract: Memories having a first pool of memory cells having a first storage density and a second pool of memory cells having a second storage density greater than the first storage density, and a controller configured to cause the memory to determine whether a value of an indication of available power of a power supply for the memory is less than a threshold, and in response to determining that the value of the indication of available power is less than the threshold, increase a size of the first pool of memory cells, limit programming of data received by the memory to the first pool of memory cells, and cease movement of data from the first pool of memory cells to the second pool of memory cells, as well as apparatus including similar memories.Type: ApplicationFiled: March 15, 2021Publication date: July 1, 2021Applicant: MICRON TECHNOLOGY, INC.Inventors: Avani F. Trivedi, Tracy D. Evans, Carla L. Christensen, Tomoko Ogura Iwasaki, Aparna U. Limaye
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Publication number: 20210200885Abstract: Methods and systems for context-based mobile device feature control are provided. One method comprises determining, with a mobile device, one or more contexts corresponding to the mobile device; selecting, from a predetermined set of security protocols, a security protocol corresponding to the determined one or more contexts; and adjusting a permission setting for one or more functional features of the mobile device based upon the selected security protocol. One apparatus comprises one or more features configure to input data, output data, transform data, or a combination thereof; and a controller configured to: determine one or more contexts corresponding to the mobile computing device, to select, from a predetermined set of security protocols, a security protocol corresponding to the determined one or more contexts, and to adjust a permission setting for the one or more functional features based upon the selected security protocol.Type: ApplicationFiled: July 27, 2020Publication date: July 1, 2021Inventors: Aparna U. Limaye, Lindsay Hamilton, Carla L. Christensen, Cipriana Forgy, Brandi M. Jones
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Publication number: 20210118852Abstract: Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more microelectronic devices are stacked on the substrate, each microelectronic device comprising an active surface having bond pads operably coupled to conductive traces extending over a dielectric material to via locations beyond at least one side of the stack, and vias extending through the dielectric materials at the via locations and comprising conductive material in contact with at least some of the conductive traces of each of the two or more electronic devices and extending to exposed conductors of the substrate. Methods of fabrication and related electronic systems are also disclosed.Type: ApplicationFiled: July 27, 2020Publication date: April 22, 2021Inventors: Owen R. Fay, Randon K. Richards, Aparna U. Limaye, Dong Soon Lim, Chan H. Yoo, Bret K. Street, Eiichi Nakano, Shijian Luo
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Publication number: 20210118851Abstract: Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more microelectronic devices are stacked on the substrate, each microelectronic device comprising an active surface operably coupled to conductive traces extending over a dielectric material to via locations beyond at least one side of the stack, at least one surface mount component operably coupled to conductive traces of at least one dielectric material, and vias extending through the dielectric materials at the via locations and comprising conductive material in contact with at least some of the conductive traces of each of the two or more electronic devices and extending to exposed conductors of the substrate.Type: ApplicationFiled: July 27, 2020Publication date: April 22, 2021Inventors: Randon K. Richards, Owen R. Fay, Aparna U. Limaye, Dong Soon Lim
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Publication number: 20210118849Abstract: Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more stacks of microelectronic devices are located on the substrate, and microelectronic devices of the stacks are connected to vertical conductive paths external to the stacks and extending to the substrate and to lateral conductive paths extending between the stacks. Methods of fabrication are also disclosed.Type: ApplicationFiled: July 27, 2020Publication date: April 22, 2021Inventors: Aparna U. Limaye, Dong Soon Lim, Randon K. Richards, Owen R. Fay
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Publication number: 20210118850Abstract: Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more microelectronic devices are stacked on the substrate and the components are connected with conductive material in preformed holes in dielectric material in the bond lines aligned with TSVs of the devices and the exposed conductors of the substrate. Methods of fabrication are also disclosed.Type: ApplicationFiled: July 27, 2020Publication date: April 22, 2021Inventors: Randon K. Richards, Aparna U. Limaye, Owen R. Fay, Dong Soon Lim
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Publication number: 20210097180Abstract: Apparatuses and methods related to detecting synchronization between multiple devices. The security of a device may be compromised if the device receives commands from unauthorized sources. A state of a device can be affected by the commands the device receives. A different device can determine whether there is synchronicity between device and the different device to determine whether the security of the device may have been compromised.Type: ApplicationFiled: September 27, 2019Publication date: April 1, 2021Inventors: Aparna U. Limaye, Diana C. Majerus, Rachael R. Carlson, Shea M. Morrison, Debra M. Bell