Abstract: A network system which includes a plurality of separate processing entities, an input output bus, and a network interface unit shared among the plurality of separate processing entities is disclosed. The network interface unit is coupled to the plurality of separate processing entities via the input output bus. The network interface unit has a plurality of memory access channels and each memory access channel is assigned to one processing entity.

Abstract: A network system includes a network interface unit operably connected to a plurality of processing entities and a plurality of memory units that define a shared memory space. The network interface unit further comprises a memory access module that includes a plurality of memory access channels, a packet classifier, and a plurality of scheduling control modules that are operable to control processing of data transported by the network. In various embodiments of the invention, predetermined subsets of the plurality of processing entities are operably associated with predetermined subsets of the plurality of memory units thereby defining a plurality of asymmetrical data processing partitions. The packet classifier is operable to provide an association between packets and the plurality of asymmetrical data processing partitions. The asymmetrical data processing partitions are scalable by adding additional processing entities.

Abstract: A method of resolving mutex contention within a network interface unit which includes providing a plurality of memory access channels, and moving a thread via at least one of the plurality of memory access channels, the plurality of memory access channels allowing moving of the thread while avoiding mutex contention when moving the thread via the at least one of the plurality of memory access channels is disclosed.

Abstract: Methods and apparatus for communicating data traffic using switch fabric dispersion are disclosed. An example apparatus includes a first tier of switch elements; and a second tier of switch elements operationally coupled with the first tier of switch elements. In the example apparatus, the first tier of switch elements is configured to receive a data packet from a source. The first tier of switch elements is also configured to route the data packet to the second tier of switch elements in accordance with a dispersion function, where the dispersion function is based on a dispersion tag associated with the data packet. The first tier of switch elements is still further configured to transmit the data packet to a destination for the data packet after receiving it from the second tier of switch elements.

Abstract: A method of resolving mutex contention within a network interface unit which includes providing a plurality of memory access channels, and moving a thread via at least one of the plurality of memory access channels, the plurality of memory access channels allowing moving of the thread while avoiding mutex contention when moving the thread via the at least one of the plurality of memory access channels is disclosed.

Abstract: A network system which includes a plurality of processing entities, an interconnect device coupled to the plurality of processing entities, a memory system coupled to the interconnect device and the plurality of processing entities, a network interface unit coupled to the plurality of processing entities and the memory system via the interconnect device. The network interface includes a memory access module and a packet classifier. The memory access module includes a plurality of parallel memory access channels. The packet classifier provides a flexible association between packets and the plurality of processing entities via the plurality of memory access channels.

Abstract: A method for scaling a network system which includes providing at least one network interface and providing a flexible association between packets and a plurality of processing entities via the plurality of memory access channels. Each network interface including a plurality of memory access channels.

Abstract: A method for providing access to a network interface having a plurality of memory access channels is disclosed. The network interface provides access to a plurality of processing entities. The method includes providing a network interface software hierarchy wherein the network interface software hierarchy provides access to the network interface, and associating various memory access channels with corresponding processing entities via the network interface software hierarchy so as to provide a virtualized network interface.

Abstract: A computer system comprises a plurality of shelves. Each shelf has a carrier for removably receiving a plurality of information processing modules and a switching module. Each shelf also has an interconnection member for providing connections between the information processing modules and the switching module. The switching modules of the respective shelves are interconnected in a logical stacking configuration to form a logical stacking arrangement.

Abstract: A network system having a plurality of processing partitions which includes a network interface unit coupled to a plurality of processing entities is disclosed. The network interface unit includes a plurality of memory access channels. The plurality of memory access channels is virtualized. The network interface unit is shared among the plurality of processing partitions.

Abstract: A system and method for scheduling communications from a communication interface. Each of multiple send queues is associated with a destination and assigned to a logical communication channel. A list of stalled queues identifies those send queues for which a constraint restricts scheduling. When a queue is to be selected for service, a scheduler first attempts to find a member of the stalled queues list that is no longer stalled (e.g., any constraints were satisfied). Such a queue is selected for service if it exists. If there is no such queue, then all logical channels are examined and, from a list of send queues assigned to a selected logical channel, a send queue is selected for servicing. After a queue is scheduled from the stalled queues list, the list of queues assigned to its logical channel is adjusted (e.g., to place the queue at the tail of the list).

Abstract: A system and method for sharing a resource (e.g., buffers) among multiple queues (e.g., InfiniBand send queues). Each queue has a local context indicating the Current amount of the resource allocated to the queue, the Minimum it is guaranteed, and a Maximum amount. A context may also include one or more pointers for managing the queue. Global Available and Reserve values indicate, respectively, the amount of the resource not currently allocated and the amount of the resource being reserved to guarantee each queue its Minimum. When an element is posted to a queue, a Full signal is raised for every queue to prevent further activity while the global values and the affected queue's context are updated. Then, if Available>0, the signal is de-asserted for any queue for which Current<Minimum or, if Available>Reserve, for any queue for which Current<Maximum.

Abstract: A computer system comprises a plurality of shelves. Each shelf has a carrier for removably receiving a plurality of information processing modules and a switching module. Each shelf also has an interconnection member for providing connections between the information processing modules and the switching module. The shelves are logically connected into a plurality of stacks, the switching modules of the respective shelves in each stack being interconnected in a logical stacking configuration. The computer system further comprises a shelf having a carrier for removably receiving a master switching module, wherein the master switching module is connected into each stack as a common master switch for all of the stacks.

Abstract: An apparatus and method for managing the receipt of communication traffic in the form of packets or other units. The apparatus includes a communication interface (e.g., a NIC, a TCA) coupled to one or more host computer systems. Through Direct Memory Access (DMA) operations, the interface reassembles payloads of received packets into host buffers based on their sequence numbers, without buffering them in the interface. Packet headers are separated from the payloads and passed to a host for protocol processing after the payload DMA is completed. Host buffers may be of virtually any size. For each communication connection, state information is maintained on the interface, which may identify an upper level protocol so that an upper level protocol header is passed to the host as part of the packet header, not as part of the payload. Protocol termination remains in the host.

Abstract: A network system which includes a plurality of processing entities, an interconnect device coupled to the plurality of processing entities, a memory system coupled to the interconnect device and the plurality of processing entities, a network interface unit coupled to the plurality of processing entities and the memory system via the interconnect device. The network interface includes a memory access module and a packet classifier. The memory access module includes a plurality of parallel memory access channels. The packet classifier provides a flexible association between packets and the plurality of processing entities via the plurality of memory access channels.

Abstract: A network system which provides asymmetrical processing for networking functions and data path offload. A network interface unit is operably connected to a plurality of processing entities and a plurality of memory units that define a shared memory space. The network interface unit further comprises a memory access module that includes a plurality of memory access channels, a packet classifier, and a plurality of scheduling control modules that are operable to control processing of data transported by the network. In various embodiments of the invention, predetermined subsets of the plurality of processing entities are operably associated with predetermined subsets of the plurality of memory units thereby defining a plurality of asymmetrical data processing partitions. The packet classifier is operable to provide an association between packets and the plurality of asymmetrical data processing partitions.

Abstract: A method for scaling a network system which includes providing at least one network interface and providing a flexible association between packets and a plurality of processing entities via the plurality of memory access channels. Each network interface including a plurality of memory access channels.

Abstract: A network system having a plurality of processing partitions which includes a network interface unit coupled to a plurality of processing entities is disclosed. The network interface unit includes a plurality of memory access channels. The plurality of memory access channels is virtualized. The network interface unit is shared among the plurality of processing partitions.

Abstract: A modular computer system may be provided. The modular computer system may comprise a carrier operable removably to receive a plurality of computer system modules therein. A plurality of information processing modules can be removably received in the carrier, each module may have a communications port operable to connect to a communications network internal to the carrier. The modular computer system may also comprise a switch operable to connect to the internal communications network to distribute information messages between the modules and to connect to an external communications network. An information distribution module may be provided removably received in the carrier operable connect to the internal communications network to receive an information message, to perform processing on the message to determine a destination, and to forward the message toward the determined destination via the internal communications network.

Abstract: An Ethernet architecture is provided for connecting a computer system or other network entity to a dedicated Ethernet network medium. The network interface enables the transmission and receipt of data by striping individual Ethernet frames across a plurality of logical channels and may thus operate at substantially the sum of the individual channel rates. Each channel may be conveyed by a separate conductor (e.g., in a bundle) or the channels may be carried simultaneously on a shared medium (e.g., an electrical or optical conductor that employs a form of multiplexing). On a sending station, a distributor within the sender's network interface receives Ethernet frames (e.g., from a MAC) and distributes frame bytes in a round-robin fashion on the plurality of channels. Each “mini-frame” is separately framed and encoded for transmission across its channel. On a receiving station, the receiver's network interface includes a collector for collecting the multiple mini-frames (e.g.