Patents by Inventor Arindam Banerjee

Arindam Banerjee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200067250
    Abstract: A method of assembling a terminal assembly includes providing a terminal. The terminal may include a terminal body portion, a first wing, and/or a second wing. A first wing and the second wing may each include an end portion. The method may include bending an end portion of a first wing and/or an end portion of a second wing that may provide a first bent portion and a second bent portion. The method may include crimping the first bent portion and the second bent portion onto a wire. The terminal may be in a first position during bending and/or the terminal may be rotated to a second position after bending. The terminal may be in the second position during crimping. The first position and the second position may be substantially perpendicular.
    Type: Application
    Filed: August 21, 2018
    Publication date: February 27, 2020
    Inventors: Brandon H. Dix, Salim A. Marouf, Priyal N. Sheth, Arindam Banerjee, Sneha Agasthya
  • Publication number: 20200067251
    Abstract: A method of assembling a terminal assembly includes providing a terminal having a terminal body, a first wing, and/or a second wing. The method may include removing an end portion of the first wing, and/or an end portion of the second wing to provide a shortened first wing and/or a shortened second wing. The method may include crimping the shortened first wing and/or the shortened second wing onto a wire. The end portion of the first wing and the end portion of the second wing may be removed simultaneously. The end portion of the first wing and/or the end portion of the second wing may be removed via a die.
    Type: Application
    Filed: August 21, 2018
    Publication date: February 27, 2020
    Inventors: Brandon H. Dix, Salim A. Marouf, Priyal N. Sheth, Arindam Banerjee, Sneha Agasthya
  • Publication number: 20200067209
    Abstract: A terminal assembly includes a body, a wire, a first wing extending from the body and crimped around a first portion of the wire, and a second wing extending from the body and crimped around a second portion of the wire. The second portion may extend from the first portion. The first wing may extend circumferentially around at least 50% of the first portion and/or around less than 75% of the first portion. The first wing may provide a first channel and the second wing may provide a second channel. The first portion of a wire may be disposed at least partially in the first channel. The second portion of a wire may be disposed at least partially in the second channel. The first portion and the second portion may form a loop portion of the wire that may be disposed outside of the first channel and the second channel.
    Type: Application
    Filed: August 21, 2018
    Publication date: February 27, 2020
    Inventors: Brandon H. Dix, Salim A. Marouf, Priyal N. Sheth, Arindam Banerjee, Sneha Agasthya
  • Publication number: 20200067208
    Abstract: A terminal includes a terminal body and/or a first wing that may extend from the terminal body. The first wing that may have an end portion, a middle portion and/or a connecting portion. The inner surface of the end portion may be in contact with an inner surface of the middle portion. A terminal may include a second wing that may extend from the terminal body. An outer surface of the middle portion of the first wing may contact an outer surface of the middle portion of the second wing. A first wing and a second wing may be disposed on opposite sides of the terminal body. The second wing may include an end portion, a middle portion, and/or a connecting portion. A connecting portion of the first wing and a connecting portion of the second wing may both connect to the terminal body.
    Type: Application
    Filed: August 21, 2018
    Publication date: February 27, 2020
    Inventors: Brandon H. Dix, Salim A. Marouf, Priyal N. Sheth, Arindam Banerjee, Sneha Agasthya
  • Patent number: 10574015
    Abstract: A method of assembling a terminal assembly includes providing a terminal. The terminal may include a terminal body portion, a first wing, and/or a second wing. A first wing and the second wing may each include an end portion. The method may include bending an end portion of a first wing and/or an end portion of a second wing that may provide a first bent portion and a second bent portion. The method may include crimping the first bent portion and the second bent portion onto a wire. The terminal may be in a first position during bending and/or the terminal may be rotated to a second position after bending. The terminal may be in the second position during crimping. The first position and the second position may be substantially perpendicular.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: February 25, 2020
    Assignee: Lear Corporation
    Inventors: Brandon H. Dix, Salim A. Marouf, Priyal N. Sheth, Arindam Banerjee, Sneha Agasthya
  • Publication number: 20200042347
    Abstract: Methods, non-transitory machine-readable media, and computing devices for transitioning tasks and interrupt service routines are provided. An example method includes processing, by a plurality of processor cores of a storage controller, tasks and interrupt service routines. A performance statistic is determined corresponding to the plurality of processor cores. Based on detecting that the performance statistic passes a threshold, a number of the plurality of processor cores that are assigned to the tasks and the interrupt service routines are reduced.
    Type: Application
    Filed: October 15, 2019
    Publication date: February 6, 2020
    Inventors: Kent Prosch, Matthew Weber, Arindam Banerjee, Ben McDavitt
  • Patent number: 10481835
    Abstract: Methods and systems for dynamic hashing in cache sub-systems are provided. The method includes analyzing a plurality of input/output (I/O) requests for determining a pattern indicating if the I/O requests are random or sequential; and using the pattern for dynamically changing a first input to a second input for computing a hash index value by a hashing function that is used to index into a hashing data structure to look up a cache block to cache an I/O request to read or write data, where for random I/O requests, a segment size is the first input to a hashing function to compute a first hash index value and for sequential I/O requests, a stripe size is used as the second input for computing a second hash index value.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: November 19, 2019
    Assignee: NETAPP, INC.
    Inventors: Arindam Banerjee, Donald R. Humlicek
  • Patent number: 10459759
    Abstract: Methods, non-transitory machine-readable media, and computing devices for transitioning tasks and interrupt service routines are provided. An example method includes processing, by a plurality of processor cores of a storage controller, tasks and interrupt service routines. A performance statistic is determined corresponding to the plurality of processor cores. Based on detecting that the performance statistic passes a threshold, a number of the plurality of processor cores that are assigned to the tasks and the interrupt service routines are reduced.
    Type: Grant
    Filed: February 7, 2018
    Date of Patent: October 29, 2019
    Assignee: NETAPP, INC.
    Inventors: Kent Prosch, Matthew Weber, Arindam Banerjee, Ben McDavitt
  • Publication number: 20190171947
    Abstract: A method for transferring semantic knowledge between domains of a network is disclosed, the network comprising a first domain and a second domain. The method comprises establishing a semantic knowledge base for the first domain, the semantic knowledge base comprising concepts of the first domain, properties of the first domain concepts, relationships between the first domain concepts, and constraints governing the first domain concepts. The method further comprises establishing a semantic information base for the second domain, the semantic information base comprising concepts of the second domain. The method further comprises, for a concept of the second domain, determining measures of similarity between the second domain concept and concepts of the first domain and identifying, on the basis of the determined measures of similarity, a first domain concept which is equivalent to the second domain concept.
    Type: Application
    Filed: August 10, 2016
    Publication date: June 6, 2019
    Inventors: Saravanan Mohan, Arindam Banerjee
  • Publication number: 20190098043
    Abstract: A method, network system and computer storage medium for DDoS defence in a packet-switched network are provided. The method is performed by a network system and includes: measuring a plurality of network parameters in incoming network traffic; ranking the plurality of measured network parameters based on machine learning; measuring a subset of the plurality of network parameters in incoming network traffic; determining an incoming network packet to be part of a DDoS attack or not by machine learning of the subset of the plurality of network parameters; and blocking an incoming network packet when the incoming network packet is determined to be part of a DDoS attack.
    Type: Application
    Filed: March 10, 2016
    Publication date: March 28, 2019
    Applicant: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Arindam BANERJEE, Shivashankar SUBRAMANIAN
  • Patent number: 10235288
    Abstract: Systems and techniques for cache management are disclosed that provide improved cache performance by prioritizing particular storage stripes for cache flush operations. The systems and techniques may also leverage features of the storage devices to provide atomicity without the overhead of inter-controller mirroring. In some embodiments, the systems and techniques include a storage controller that stores data in a cache. The data is associated with one or more sectors of a storage stripe that is defined over plurality of storage devices. The storage controller identifies a locality of dirty sectors of the one or more sectors, classifies the storage stripe into a category based on the locality, provides a category ordering of the category relative to at least one other category, and flushes the storage stripe from the cache to the plurality of storage devices according to the category ordering.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: March 19, 2019
    Assignee: NETAPP, INC.
    Inventors: Arindam Banerjee, Donald R Humlicek, Scott Terrill
  • Publication number: 20180165120
    Abstract: Methods, non-transitory machine-readable media, and computing devices for transitioning tasks and interrupt service routines are provided. An example method includes processing, by a plurality of processor cores of a storage controller, tasks and interrupt service routines. A performance statistic is determined corresponding to the plurality of processor cores. Based on detecting that the performance statistic passes a threshold, a number of the plurality of processor cores that are assigned to the tasks and the interrupt service routines are reduced.
    Type: Application
    Filed: February 7, 2018
    Publication date: June 14, 2018
    Inventors: Kent Prosch, Matthew Weber, Arindam Banerjee, Ben McDavitt
  • Publication number: 20180113738
    Abstract: A system for dynamically configuring and scheduling input/output (I/O) workloads among processing cores is disclosed. Resources for an application that are related to each other and/or not multicore safe are grouped together into work nodes. When these need to be executed, the work nodes are added to a global queue that is accessible by all of the processing cores. Any processing core that becomes available can pull and process the next available work node through to completion, so that the work associated with that work node software object is all completed by the same core, without requiring additional protections for resources that are not multicore safe. Indexes track the location of both the next work node in the global queue for processing and the next location in the global queue for new work nodes to be added for subsequent processing.
    Type: Application
    Filed: April 26, 2017
    Publication date: April 26, 2018
    Inventors: Charles E. Nichols, Scott Terrill, Don Humlicek, Arindam Banerjee, Yulu Diao, Anthony D. Gitchell
  • Publication number: 20180068259
    Abstract: A system and method is disclosed for root cause analysis and early warning of inventory problems. The system includes a server coupled with a database and configured to access the data describing inventory policy parameters of a supply chain network, the data describing one or more demand patterns and one or more replenishment patterns of the supply chain network, and the data describing the supply chain network comprising a plurality of entities, each entity configured to supply one or more items to satisfy a demand. The server is further configured to optimize the inventory policy parameters for each of the one or more items according to the one or more demand patterns and the one or more replenishment patterns and store the optimized inventory policy parameters in the database for each of the one or more items.
    Type: Application
    Filed: October 30, 2017
    Publication date: March 8, 2018
    Inventors: Shipra Surendra, Manish Ghosh, Adeel Najmi, Arindam Banerjee, Krishna Pal Singh
  • Patent number: 9910700
    Abstract: A method for migration of operations between CPU cores, the method includes: processing, by a source core, one or more tasks and one or more interrupt service routines; accessing a mapping corresponding to a task of the one or more tasks and an interrupt service routine of the one or more interrupt service routines; identifying, based on the mapping, a target core that corresponds to the task and the interrupt service routine; blocking the task from being processed by the source core in response to identifying the target core; in response to identifying the target core, disabling an interrupt corresponding to the interrupt service routine; in response to identifying the target core, assigning the task and the interrupt to the target core; after assigning the interrupt to the target core, enabling the interrupt; and after assigning the task to the target core, processing the task by the target core.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: March 6, 2018
    Assignee: NetApp, Inc.
    Inventors: Kent Prosch, Matthew Weber, Arindam Banerjee, Ben McDavitt
  • Patent number: 9805330
    Abstract: A system and method is disclosed for root cause analysis and early warning of inventory problems. The system includes a server coupled with a database and configured to access the data describing inventory policy parameters of a supply chain network, the data describing one or more demand patterns and one or more replenishment patterns of the supply chain network, and the data describing the supply chain network comprising a plurality of entities, each entity configured to supply one or more items to satisfy a demand. The server is further configured to optimize the inventory policy parameters for each of the one or more items according to the one or more demand patterns and the one or more replenishment patterns and store the optimized inventory policy parameters in the database for each of the one or more items.
    Type: Grant
    Filed: November 17, 2009
    Date of Patent: October 31, 2017
    Assignee: JDA Software Group, Inc.
    Inventors: Shipra Surendra, Manish Ghosh, Adeel Najmi, Arindam Banerjee, Krishna Pal Singh
  • Patent number: 9753853
    Abstract: Methods and systems for managing caching mechanisms in storage systems are provided where a global cache management function manages multiple independent cache pools and a global cache pool. As an example, the method includes: splitting a cache storage into a plurality of independently operating cache pools, each cache pool comprising storage space for storing a plurality of cache blocks for storing data related to an input/output (“I/O”) request and metadata associated with each cache pool; receiving the I/O request for writing a data; operating a hash function on the I/O request to assign the I/O request to one of the plurality of cache pools; and writing the data of the I/O request to one or more of the cache blocks associated with the assigned cache pool. In an aspect, this allows efficient I/O processing across multiple processors simultaneously.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: September 5, 2017
    Assignee: NETAPP, INC.
    Inventors: Arindam Banerjee, Donald R. Humlicek
  • Publication number: 20170220481
    Abstract: A system and method for improving storage system operation is disclosed. A storage system includes a first tier with high-performance redundancy and a second tier with capacity efficient redundancy. The first tier and the second tier are built from the same storage devices in a storage pool so each storage device includes both the first and second tiers. The storage system stores write data initially to the first tier. When demand for the data falls below a threshold, the storage system migrates the write data to the second tier. This is done by changing the mapping of underlying physical locations on the storage devices where the write data is stored so that the underlying physical locations are logically associated with the second tier instead of the first tier. After remapping, the storage system also computes parity information for the migrated write data and stores it in the second tier.
    Type: Application
    Filed: January 29, 2016
    Publication date: August 3, 2017
    Inventors: Brian D. McKean, Arindam Banerjee, Kevin Kidney
  • Publication number: 20170097886
    Abstract: Systems and techniques for cache management are disclosed that provide improved cache performance by prioritizing particular storage stripes for cache flush operations. The systems and techniques may also leverage features of the storage devices to provide atomicity without the overhead of inter-controller mirroring. In some embodiments, the systems and techniques include a storage controller that stores data in a cache. The data is associated with one or more sectors of a storage stripe that is defined over plurality of storage devices. The storage controller identifies a locality of dirty sectors of the one or more sectors, classifies the storage stripe into a category based on the locality, provides a category ordering of the category relative to at least one other category, and flushes the storage stripe from the cache to the plurality of storage devices according to the category ordering.
    Type: Application
    Filed: October 2, 2015
    Publication date: April 6, 2017
    Inventors: Arindam Banerjee, Don Humlicek, Scott Terrill
  • Publication number: 20170090999
    Abstract: Selective multiprocessing in a non-preemptive task scheduling environment is provided. Tasks of an application are grouped based on similar functionality and/or access to common code or data structures. The grouped tasks constitute a task core group, and each task core group may be mapped to a core in a multi-core processing system. A mutual exclusion approach reduces overhead imposed on the storage controller and eliminates the risk of concurrent access. A core guard routine is used when a particular application task in a first task core group requires access to a section of code or data structure associated with a different task core group. The application task is temporarily assigned to the second task core group. The application task executes the portion of code seeking access to the section of code or data structure. Once complete, the application task is reassigned back to its original task core group.
    Type: Application
    Filed: September 25, 2015
    Publication date: March 30, 2017
    Inventors: Matthew Weber, Douglas A. Ochsner, Kam Pak, Arindam Banerjee, Ben McDavitt, Donald R. Humlicek