Abstract: An example device includes a first primary coil, a second primary coil, a combined power output, a first directional coupler output, a second directional coupler output. The example device also includes a secondary coil coupled to the combined power output, configured to magnetically couple to the first primary coil, and configured to magnetically couple to the second primary coil. The example device further includes a tertiary coil configured to magnetically couple to the secondary coil and including a first end coupled to the first directional coupler output, and a second end coupled to the second directional coupler output.

Abstract: An example device described herein includes a first pad, a second pad, and a transmission line including a first end configured to couple to monitor circuitry, wherein the transmission line includes a second end. The example device also includes a first switch coupled to the first pad, wherein the first switch is coupled to the transmission line between the first end and the second end. The example device further includes a second switch coupled to the second pad and to the second end of the transmission line, wherein an impedance of the first switch is higher than an impedance of the second switch.

Abstract: A network device may include packet processing circuitry and memory circuitry accessible by the packet processing circuitry to perform traffic processing operations. The packet processing circuitry may maintain, on the memory circuitry, a flow cache and a fragment mapping table. A leading fragment of an original un-fragmented packet may be used to provide an entry in the flow cache and to provide an entry in the fragment mapping table. The entry in the fragment mapping table and consequently the entry in the flow cache may be used to process one or more non-leading fragments of the original un-fragmented packet.

Abstract: In described examples, an integrated circuit (IC) includes an error amplifier, first and second resistors, first and second transistors, and a current source. A control terminal of the first transistor is coupled to an output of the error amplifier. A first terminal of the second transistor is coupled to a first terminal of the first transistor and a first terminal of the first resistor. A control terminal of the second transistor is coupled to a second terminal of the first resistor, a second terminal of the second resistor, and a first input of the error amplifier. A first terminal of the current source is coupled to a second terminal of the second transistor.

Abstract: At least one example non-transitory machine-readable storage medium includes machine-readable instructions to cause at least one processor circuit to at least set a control voltage of a power amplifier (PA) of a radar circuit based on a bias code. The at least one non-transitory machine-readable storage medium includes machine-readable instructions to cause the at least one processor circuit to cause a power detector of the radar circuit to measure an output power of the PA. The at least one non-transitory machine-readable storage medium includes machine-readable instructions to cause the at least one processor circuit to, based on a rate of change of the bias code with respect to the output power not corresponding to a change in value of the bias code, set the rate of change based on first values of the bias code and second values of the output power.

Abstract: A Wi-Fi wake-up receiver that receives wake-up signals encoded using orthogonal frequency division multiplexing based on-off keying (OFDM-OOK) modulation includes receiver circuitry having analog envelope detector circuitry configured to non-linearly down-convert an input signal and provide an energy signal for sampling by an analog-to-digital converter (ADC). A wake-up signal for waking up a main radio in a Wi-Fi device can be based on the digitized energy signal. The receiver circuitry can further include, upstream of the envelope detector circuitry and the ADC in the signal chain, an analog mixer for linearly down-converting the input signal and a low-pass filter for attenuating adjacent-channel interferer (ACI) signals prior to the non-linear down-conversion by the envelope detector circuitry. Sampling of the energy signal rather than the higher-bandwidth input signal yield power savings in the ADC and associated circuitry such as a modem.

Abstract: A mounting system for coupling a gearbox to an engine includes a sleeve having a first sleeve end opposite a second sleeve end, an outer perimeter and a sleeve bore defined through the sleeve from the first sleeve end to the second sleeve end. The mounting system includes a damping member coupled about the outer perimeter of the sleeve at the first sleeve end. The mounting system includes a corrugated bushing coupled about the outer perimeter of the sleeve between the damping member and the second sleeve end.

Abstract: A Wi-Fi wake-up receiver that receives wake-up signals encoded using orthogonal frequency division multiplexing based on-off keying (OFDM-OOK) modulation includes receiver circuitry having analog envelope detector circuitry configured to non-linearly down-convert an input signal and provide an energy signal for sampling by an analog-to-digital converter (ADC). A wake-up signal for waking up a main radio in a Wi-Fi device can be based on the digitized energy signal. The receiver circuitry can further include, upstream of the envelope detector circuitry and the ADC in the signal chain, an analog mixer for linearly down-converting the input signal and a low-pass filter for attenuating adjacent-channel interferer (ACI) signals prior to the non-linear down-conversion by the envelope detector circuitry. Sampling of the energy signal rather than the higher-bandwidth input signal yield power savings in the ADC and associated circuitry such as a modem.

Abstract: An integrated circuit device is provided. In some examples, the integrated circuit device includes an amplifier stage that receives an input signal and a control signal and provides an amplified signal in response. A main path is coupled to the amplifier stage that receives the amplified signal and provides a first feedback signal corresponding to a signal strength of a data-bearing portion of the input signal. A control path also receives the amplified signal and provides a second feedback signal corresponding to a signal strength of the data-bearing portion and an interference component. A gain control circuit is coupled to the main path and the control path that receives the first and second feedback signals and provides the control signal in response to the feedback signals. In some such examples, the control path and main path include separate mixer stages with different performance characteristics.

Abstract: A mounting system for coupling a gearbox to an engine includes a sleeve having a first sleeve end opposite a second sleeve end, an outer perimeter and a sleeve bore defined through the sleeve from the first sleeve end to the second sleeve end. The mounting system includes a damping member coupled about the outer perimeter of the sleeve at the first sleeve end. The mounting system includes a corrugated bushing coupled about the outer perimeter of the sleeve between the damping member and the second sleeve end.

Abstract: An apparatus comprises a transistor pair including a first metal oxide semiconductor field effect transistor (MOSFET) coupled to a second MOSFET. The first MOSFET includes a first gate terminal and a first drain terminal. The second MOSFET comprises a second gate terminal and a second drain terminal. The first gate terminal is configured to receive a first signal. The second gate terminal is configured to receive a second signal that is phase shifted with respect to the first signal. An output node is coupled to the first drain terminal and the second drain terminal and configured to output a third signal that is proportional to a power of the first signal and the second signal.

Abstract: An integrated circuit device is provided. In some examples, the integrated circuit device includes an amplifier stage that receives an input signal and a control signal and provides an amplified signal in response. A main path is coupled to the amplifier stage that receives the amplified signal and provides a first feedback signal corresponding to a signal strength of a data-bearing portion of the input signal. A control path also receives the amplified signal and provides a second feedback signal corresponding to a signal strength of the data-bearing portion and an interference component. A gain control circuit is coupled to the main path and the control path that receives the first and second feedback signals and provides the control signal in response to the feedback signals. In some such examples, the control path and main path include separate mixer stages with different performance characteristics.

Abstract: An integrated circuit device is provided. In some examples, the integrated circuit device includes an amplifier stage that receives an input signal and a control signal and provides an amplified signal in response. A main path is coupled to the amplifier stage that receives the amplified signal and provides a first feedback signal corresponding to a signal strength of a data-bearing portion of the input signal. A control path also receives the amplified signal and provides a second feedback signal corresponding to a signal strength of the data-bearing portion and an interference component. A gain control circuit is coupled to the main path and the control path that receives the first and second feedback signals and provides the control signal in response to the feedback signals. In some such examples, the control path and main path include separate mixer stages with different performance characteristics.

Abstract: A method of streamlining multiple disparate workflows generated by equipment including: receiving workflow trigger sources from the equipment; generating two or more disparate workflow systems in response to the workflow trigger sources; transforming the two or more disparate workflow systems into a single unified workflow; and performing the unified workflow for the equipment.

Abstract: An apparatus comprises a transistor pair including a first metal oxide semiconductor field effect transistor (MOSFET) coupled to a second MOSFET. The first MOSFET includes a first gate terminal and a first drain terminal. The second MOSFET comprises a second gate terminal and a second drain terminal. The first gate terminal is configured to receive a first signal. The second gate terminal is configured to receive a second signal that is phase shifted with respect to the first signal. An output node is coupled to the first drain terminal and the second drain terminal and configured to output a third signal that is proportional to a power of the first signal and the second signal.

Abstract: Embodiments of the present disclosure relate to systems, methods, and user interfaces that automate the workflow testing process. Users can configure, automate and execute repeating workflow tests associated with software updates or upgrades. In doing so, issues with the updates or upgrades are proactively prevented. To do so, a selection of one or more business processes is initially received. The one or more business processes are combined into a client workflow. Test data and assertion types are received for each business process of the one or more business processes. A script and metadata containing the client workflow name and the one or more business process names utilized to create the client workflow is stored and the client workflow can be executed in a target environment. Any errors in the client workflow are detected and a notification is provided to a user for follow-up and resolution.

Abstract: Embodiments of the present disclosure relate to systems, methods, and user interfaces that automate the workflow testing process. Users can configure, automate and execute repeating workflow tests associated with software updates or upgrades. In doing so, issues with the updates or upgrades are proactively prevented. To do so, a selection of one or more business processes is initially received. The one or more business processes are combined into a client workflow. Test data and assertion types are received for each business process of the one or more business processes. A script and metadata containing the client workflow name and the one or more business process names utilized to create the client workflow is stored and the client workflow can be executed in a target environment. Any errors in the client workflow are detected and a notification is provided to a user for follow-up and resolution.

Abstract: Embodiments of the present disclosure relate to systems, methods, and user interfaces that automate the workflow testing process. Users can configure, automate and execute repeating workflow tests associated with software updates or upgrades. In doing so, issues with the updates or upgrades are proactively prevented. To do so, a selection of one or more business processes is initially received. The one or more business processes are combined into a client workflow. Test data and assertion types are received for each business process of the one or more business processes. A script and metadata containing the client workflow name and the one or more business process names utilized to create the client workflow is stored and the client workflow can be executed in a target environment. Any errors in the client workflow are detected and a notification is provided to a user for follow-up and resolution.

Abstract: A Wi-Fi wake-up receiver that receives wake-up signals encoded using orthogonal frequency division multiplexing based on-off keying (OFDM-OOK) modulation includes receiver circuitry having analog envelope detector circuitry configured to non-linearly down-convert an input signal and provide an energy signal for sampling by an analog-to-digital converter (ADC). A wake-up signal for waking up a main radio in a Wi-Fi device can be based on the digitized energy signal. The receiver circuitry can further include, upstream of the envelope detector circuitry and the ADC in the signal chain, an analog mixer for linearly down-converting the input signal and a low-pass filter for attenuating adjacent-channel interferer (ACI) signals prior to the non-linear down-conversion by the envelope detector circuitry. Sampling of the energy signal rather than the higher-bandwidth input signal yield power savings in the ADC and associated circuitry such as a modem.

Abstract: A circuit with a differential input configured to receive a differential analog input signal. The circuit also includes a common mode detection circuit, a primary signal circuit coupled, and a replica block. The circuit also includes a summer coupled to the output of the primary signal circuit and to an output of the replica block.