Patents by Inventor Arunkumar Subramanian

Arunkumar Subramanian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220347749
    Abstract: Atomic-to-Nanoscale Matter Emission/Flow Regulation Devices, Systems and methods are set forth. An exemplary device can include a through-hole that has a top, and a nozzle configured to facilitate atomic-to-nanoscale matter emission/flow regulation formed in an etchable nozzle substrate. The nozzle can be configured at the smallest cross-section of the through-hole. A bottom can be formed in the nozzle substrate or selectively connected to the nozzle. Systems can include matter transportation/flow regulation columns, printing systems, etching systems and the like through which self-aligned nanodroplets or single-to-finite numbered ionic species/gas phase matter can flow under spontaneous or external excitation conditions (such as voltages) at atmospheric as well as regulated pressures.
    Type: Application
    Filed: May 4, 2020
    Publication date: November 3, 2022
    Inventor: Arunkumar Subramanian
  • Patent number: 10185623
    Abstract: A charge constrained bit sequence is processed to obtain a lower bound on a number of bit errors associated with the charge constrained bit sequence. The lower bound is compared against an error correction capability threshold associated with an error correction decoder. In the event the lower bound is greater than or equal to the error correction decoder threshold, an error correction decoding failure is predicted.
    Type: Grant
    Filed: April 6, 2016
    Date of Patent: January 22, 2019
    Assignee: SK Hynix Memory Solutions Inc.
    Inventors: Arunkumar Subramanian, Frederick K. H. Lee, Xiangyu Tang, Lingqi Zeng, Jason Bellorado
  • Patent number: 9842023
    Abstract: A starting read threshold is received. A first offset and a second offset is determined. A first read is performed at the starting read threshold offset by the first offset to obtain a first hard read value and a second read is performed at the starting read threshold offset by the second offset to obtain a second hard read value. A soft read value is generated based at least in part on the first hard read value and the second hard read value.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: December 12, 2017
    Assignee: SK Hynix Memory Solutions Inc.
    Inventors: Xiangyu Tang, Frederick K. H. Lee, Jason Bellorado, Arunkumar Subramanian, Lingqi Zeng
  • Patent number: 9734066
    Abstract: A workload level associated with an expandable data buffer is determined, where the expandable data buffer and an expandable mapping table cache are stored in internal memory and the expandable mapping table cache is used to store a portion of a mapping table that is stored on external storage. An amount of internal memory allocated to the expandable data buffer and an amount of internal memory allocated to the expandable mapping table cache are adjusted based at least in part on the workload level.
    Type: Grant
    Filed: February 26, 2015
    Date of Patent: August 15, 2017
    Assignee: SK hynix memory solutions Inc.
    Inventors: Suneel Kumar Indupuru, Zheng Wu, Arunkumar Subramanian, Jason Bellorado
  • Patent number: 9727249
    Abstract: An instruction to write data to a write logical address is received where the write logical address is a member of a group of one or more logical addresses. It is determined if data associated with any of the logical addresses in the group of logical addresses has been written to any of a plurality of open groups of locations. If so, the data is written to the open group of locations to which data from the group of logical addresses has already been written to. If not, an open group of locations to write to is selected from the plurality of open groups of locations.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: August 8, 2017
    Assignee: SK Hynix Inc.
    Inventors: Arunkumar Subramanian, Zheng Wu, Suneel Kumar Indupuru, Jason Bellorado
  • Patent number: 9652382
    Abstract: One or more source locations in a group of solid state storage cells on which garbage collection is to be performed are stored in a garbage collection queue. A garbage collection speed is determined, including by: analyzing one or more source locations stored in the garbage collection queue; determining a look-ahead metric, wherein the look-ahead metric comprises an anticipated amount of freed up storage associated with the analyzed source locations; and determining the garbage collection speed based at least in part on the look-ahead metric. One or more garbage collection operations are performed interleaved with one or more host operations, wherein the ratio of garbage collection operations to host operations is based at least in part on the garbage collection speed.
    Type: Grant
    Filed: August 18, 2015
    Date of Patent: May 16, 2017
    Assignee: SK Hynix Memory Solutions Inc.
    Inventors: Arunkumar Subramanian, Zheng Wu
  • Patent number: 9529722
    Abstract: A locality associated with a read request is identified based at least in part on a read address included in the read request. A predicted read address is generated based at least in part on the locality. It is decided whether to permit the predicted read address to be prefetched; in the event it is decided to permit the predicted read address to be prefetched, data from the predicted read address is prefetched and the prefetched data is stored in a prefetch cache.
    Type: Grant
    Filed: July 9, 2015
    Date of Patent: December 27, 2016
    Assignee: SK hynix memory solutions Inc.
    Inventors: Xiangyu Tang, Jason Bellorado, Lingqi Zeng, Zheng Wu, Arunkumar Subramanian
  • Patent number: 9514845
    Abstract: A group of one or more solid state storage cells is programmed. A predetermined amount of time after the group of solid state storage cells is programmed, the group of solid state storage cells is read to obtain read data. Error correction decoding is performed on the read data and the group of solid state storage cells is assessed for wear related degradation based at least in part on the error correction decoding.
    Type: Grant
    Filed: November 6, 2014
    Date of Patent: December 6, 2016
    Assignee: SK Hynix Inc.
    Inventors: Zheng Wu, Jason Bellorado, Arunkumar Subramanian
  • Patent number: 9479015
    Abstract: A motor stator includes a plurality of separate core segments, a plurality of coils, and a fixing ring. Each core segment includes a yoke and a tooth extending from the yoke. The yokes are connected to form a substantially circular core, with the teeth extending inwards. Each coil is wound around a corresponding tooth. The fixing ring is fixed to the outer surface of the core.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: October 25, 2016
    Assignee: JOHNSON ELECTRIC S.A.
    Inventors: Bao Ting Liu, Xiao Peng Ma, Arunkumar Subramanian
  • Patent number: 9403452
    Abstract: A seat bottom assembly includes a seat bottom frame and an anti-submarining device having a pivot shaft and a panel. The frame extends along a longitudinal axis between a front edge and a rear edge and the pivot shaft is mounted on the frame. The panel extends along the longitudinal axis between a front edge and a rear edge and is mounted to the pivot shaft for pivoting movement between a design position and an open position angularly spaced from the design position. The panel opposes forward displacement of an occupant supported by the frame while in the open position. The rear edge of the panel is spaced forward of a midpoint of the frame such that only a forward portion of the seat bottom assembly between the midpoint and the front edge of the frame opposes forward displacement of the occupant when the panel is in the open position.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: August 2, 2016
    Assignee: FCA US LLC
    Inventors: Arunkumar Subramanian, Prasanna Venkatakrishnan
  • Publication number: 20160217034
    Abstract: A charge constrained bit sequence is processed to obtain a lower bound on a number of bit errors associated with the charge constrained bit sequence. The lower bound is compared against an error correction capability threshold associated with an error correction decoder. In the event the lower bound is greater than or equal to the error correction decoder threshold, an error correction decoding failure is predicted.
    Type: Application
    Filed: April 6, 2016
    Publication date: July 28, 2016
    Inventors: Arunkumar Subramanian, Frederick K.H. Lee, Xiangyu Tang, Lingqi Zeng, Jason Bellorado
  • Patent number: 9391641
    Abstract: A set of one or more component syndromes associated with a turbo product code (TPC) codeword is obtained from a component syndrome buffer. Component decoding is performed on the set of one or more component syndromes.
    Type: Grant
    Filed: March 19, 2014
    Date of Patent: July 12, 2016
    Assignee: SK Hynix Inc.
    Inventors: Arunkumar Subramanian, Naveen Kumar, Zheng Wu, Lingqi Zeng, Jason Bellorado
  • Publication number: 20160139987
    Abstract: A starting read threshold is received. A first offset and a second offset is determined. A first read is performed at the starting read threshold offset by the first offset to obtain a first hard read value and a second read is performed at the starting read threshold offset by the second offset to obtain a second hard read value. A soft read value is generated based at least in part on the first hard read value and the second hard read value.
    Type: Application
    Filed: January 27, 2016
    Publication date: May 19, 2016
    Inventors: Xiangyu TANG, Frederick K.H. LEE, Jason BELLORADO, Arunkumar SUBRAMANIAN, Lingqi ZENG
  • Patent number: 9336885
    Abstract: A charge constrained bit sequence is processed to obtain a lower bound on a number of bit errors associated with the charge constrained bit sequence. The lower bound is compared against an error correction capability threshold associated with an error correction decoder. In the event the lower bound is greater than or equal to the error correction decoder threshold, an error correction decoding failure is predicted.
    Type: Grant
    Filed: May 23, 2013
    Date of Patent: May 10, 2016
    Assignee: SK Hynix Memory Solutions Inc.
    Inventors: Arunkumar Subramanian, Frederick K. H. Lee, Xiangyu Tang, Lingqi Zeng, Jason Bellorado
  • Patent number: 9305658
    Abstract: A read is performed using a first iteration of a read threshold voltage that is set to a default voltage to obtain a first characteristic. A second iteration of the read threshold voltage is generated using the default voltage and an offset. A read is performed using the second iteration of the read threshold voltage to obtain a second characteristic. A third iteration of the read threshold voltage is generated using the first and second characteristics. A read is performed using the third iteration of the read threshold voltage to obtain a third characteristic. It is determined if the third characteristic is one of the two characteristics closest to a stored characteristic. If so, a fourth iteration of the read threshold voltage is generated using the two closest characteristics.
    Type: Grant
    Filed: November 18, 2014
    Date of Patent: April 5, 2016
    Assignee: SK hynix memory solutions inc.
    Inventors: Xiangyu Tang, Lingqi Zeng, Jason Bellorado, Frederick K. H. Lee, Arunkumar Subramanian
  • Patent number: 9269449
    Abstract: A first bit position of a cell in solid state storage is read where a sorting bit is obtained using the read of the first bit position. A second bit position of the cell is read for a first time, including by setting a first read threshold associated with the second bit position to a first value and setting a second read threshold associated with the second bit position to a second value. The second bit position of the cell is read for a second time, including by setting the first read threshold to a third value and setting the second read threshold to a fourth value. A new value for the first read threshold and for the second read threshold is generated using the sorting bit, the first read, and the second read.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: February 23, 2016
    Assignee: SK Hynix memory solutions inc.
    Inventors: Frederick K. H. Lee, Jason Bellorado, Arunkumar Subramanian, Lingqi Zeng, Xiangyu Tang, Ameen Aslam
  • Patent number: 9269448
    Abstract: A starting read threshold is received. A first offset and a second offset is determined. A first read is performed at the starting read threshold offset by the first offset to obtain a first hard read value and a second read is performed at the starting read threshold offset by the second offset to obtain a second hard read value. A soft read value is generated based at least in part on the first hard read value and the second hard read value.
    Type: Grant
    Filed: January 22, 2013
    Date of Patent: February 23, 2016
    Assignee: SK Hynix memory solutions inc.
    Inventors: Xiangyu Tang, Frederick K. H. Lee, Jason Bellorado, Arunkumar Subramanian, Lingqi Zeng
  • Patent number: 9256522
    Abstract: A system and method for determining soft read data for a group of cells in a nonvolatile flash memory are disclosed. An expected value representative of a plurality of stored values in a group of cells is obtained. A measured value representative of the plurality of stored values in the group of cells is obtained, based on a single read to the group of cells. A soft read data for the group of cells is determined based at least in part on the expected value and the measured value. The expected and measured values may include at least one of a number of 0s, a number of 1s, a ratio of 0s to 1s or a ratio of 1s to 0s. A reliability for a bit i may be obtained using a one-step majority logic decoder, and a threshold reliability may be used when determining the soft read data.
    Type: Grant
    Filed: April 8, 2013
    Date of Patent: February 9, 2016
    Assignee: SK Hynix memory solutions inc.
    Inventors: Xiangyu Tang, Lingqi Zeng, Jason Bellorado, Frederick K. H. Lee, Arunkumar Subramanian
  • Publication number: 20160016492
    Abstract: A seat bottom assembly includes a seat bottom frame and an anti-submarining device having a pivot shaft and a panel. The frame extends along a longitudinal axis between a front edge and a rear edge and the pivot shaft is mounted on the frame. The panel extends along the longitudinal axis between a front edge and a rear edge and is mounted to the pivot shaft for pivoting movement between a design position and an open position angularly spaced from the design position. The panel opposes forward displacement of an occupant supported by the frame while in the open position. The rear edge of the panel is spaced forward of a midpoint of the frame such that only a forward portion of the seat bottom assembly between the midpoint and the front edge of the frame opposes forward displacement of the occupant when the panel is in the open position.
    Type: Application
    Filed: July 17, 2014
    Publication date: January 21, 2016
    Inventors: Arunkumar Subramanian, Prasanna Venkatakrishnan
  • Patent number: 9142309
    Abstract: A victim group of one or more cells is read using a first read threshold to obtain a first raw read which includes one or more values. The victim group of cells is read using a second read threshold to obtain a second raw read which includes one or more values. A neighboring read, corresponding to a neighboring group of one or more cells associated with the victim group of cells, is obtained. A composite read is generated, including by selecting from at least the first raw read and the second raw read based at least in part on the neighboring read.
    Type: Grant
    Filed: November 4, 2013
    Date of Patent: September 22, 2015
    Assignee: SK hynix memory solutions inc.
    Inventors: Jason Bellorado, Arunkumar Subramanian, Marcus Marrow, Zheng Wu, Lingqi Zeng