Patents by Inventor Arvind M. Patel

Arvind M. Patel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4504948
    Abstract: A syndrome processing unit for a multibyte error correcting system is disclosed in which logical circuitry for performing product operation on selected pairs of 8-bit syndrome bytes and exclusive-OR operations on selected results of the product operations are selectively combined to define usable cofactors that correspond to coefficients of an error locator polynomial corresponding to a selected codeword if the codeword contains less than the maximum number of errors for which the system has been designed.
    Type: Grant
    Filed: December 29, 1982
    Date of Patent: March 12, 1985
    Assignee: International Business Machines Corporation
    Inventor: Arvind M. Patel
  • Patent number: 4494234
    Abstract: An apparatus and method are disclosed for processing syndrome bytes in a multibyte error correcting system in which up to t errors are correctable by processing 2t syndrome bytes. The method involves converting syndrome bytes into t+1 coefficients of the error locator polynomial by predetermined product operations and exclusive-OR operations involving selected syndrome bytes to produce cofactors that correspond to the desired coefficients when less than t errors occurred in the codeword. The cofactors are combined to produce coefficients when t errors occur and the correct set of coefficients are selected in accordance with the number of errors that are detected.The apparatus involves logical circuitry for obtaining sets of coefficients from selected syndrome bytes where each set is associated with a different number of errors in the codeword and in which a set of coefficients associated with t-1 errors is a cofactor of the set of coefficients associated with t errors.
    Type: Grant
    Filed: December 29, 1982
    Date of Patent: January 15, 1985
    Assignee: International Business Machines Corporation
    Inventor: Arvind M. Patel
  • Patent number: 4418566
    Abstract: Gas analyzing techniques for monitoring the amount of oxygen in the exhaust of motor vehicles. An oxygen sensor produces a sensor signal having a sensor value proportional to the partial pressure of the oxygen produced by the motor vehicle. Processing circuitry generates a resulting signal proportional to the sum of the sensor value, another value proportional to the first derivative of the sensor value and a third value proportional to the second derivative of the sensor value. The resulting signal can be used to predict the final sensor value at a point in time earlier than would be otherwise possible.
    Type: Grant
    Filed: January 25, 1982
    Date of Patent: December 6, 1983
    Assignee: Sun Electric Corporation
    Inventors: James E. Beck, Arvind M. Patel
  • Patent number: 4359772
    Abstract: A dual function cyclic code error correcting method and system are disclosed for correcting from a single syndrome byte a random single-bit error which occurs in a multi-byte data word or, alternatively, correcting a multi-bit error in one byte of the data word by providing an indication of the location of the byte in error, and employing the same syndrome byte to determine the error pattern of the multi-bit error so the multi-bit error can be corrected.The method involves non-zero syndrome processing steps which comprise a first series of steps which function to determine if the non-zero syndrome correlates to a 1-bit error in one of the byte positions of the data word being protected, and if so, to automatically correct the single-bit error by processing the entire byte containing the single-bit error.
    Type: Grant
    Filed: November 14, 1980
    Date of Patent: November 16, 1982
    Assignee: International Business Machines Corporation
    Inventor: Arvind M. Patel
  • Patent number: 4358848
    Abstract: An improved ECC method and system are disclosed for correcting either a random single-bit error, or alternately, a multi-bit error in one byte of a data word from a single syndrome byte. The improvement involves determining the location of the multi-bit error in successive data words which result because of a failure in one of a plurality of failure independent storage units employed for storing a block of multi-byte words.The location of the defective byte position is determined by summing each non-zero syndrome byte that is developed for each multi-byte word that is processed to produce a summed syndrome byte .SIGMA.S.noteq.0. This summed syndrome byte is then employed to generate a set of vectors which are positionally related in an m-sequence to the summed syndrome byte. A block syndrome byte, developed during the processing of a number of words and representing the sum modulo-2 of the error pattern in each word of the block, is compared to each of the set of vectors.
    Type: Grant
    Filed: November 14, 1980
    Date of Patent: November 9, 1982
    Assignee: International Business Machines Corporation
    Inventor: Arvind M. Patel
  • Patent number: 4312043
    Abstract: An apparatus and method for detecting a defective distributor is shown. The apparatus includes an input system providing the time of each cylinder firing after an initial firing of cylinder #1. A processor then determines the deviation between the actual time of firing and an optimum time thereof.
    Type: Grant
    Filed: March 21, 1980
    Date of Patent: January 19, 1982
    Assignee: Sun Electric Corporation
    Inventors: Howard Frank, John W. Swafford, Jr., Perry Farazi, Arvind M. Patel, Cheuk-Wah Chan, Edward J. Dohnal, Clark S. Wang, Ashokkumar D. Mehta
  • Patent number: 4205324
    Abstract: An apparatus for simultaneously correcting several channels in error is combined with a parallel multi channel data handling system. The apparatus encodes and records vertical parity checks in a first channel and encodes and records parity checks in a second and third channel or equivalent taken over the channels in respective predetermined positively and negatively sloped directions.Upon readback, syndromes from the parity checks and the recorded data are obtained. Correction signals from at least two syndromes intersecting the same error in a known channel in error are formed. The values of the syndromes diagonally intersecting each error in the known channel are continuously modified as the error is detected by inversion of the simple parity. Correction is attained by logically combining the correction signals with the original known channel in error data.
    Type: Grant
    Filed: March 7, 1978
    Date of Patent: May 27, 1980
    Assignee: International Business Machines Corporation
    Inventor: Arvind M. Patel
  • Patent number: 4201976
    Abstract: Where data is recorded on logically independent sets of parallel channels or tracks, the correction of error of very long (infinite) length cannot be advantageously treated by conventional coding methods unlike finite length error such as single shot or burst noise. To ensure the correction of channels in error from data recovered from a multi-channel storage medium, a fixed number of channels per set are dedicated to error checking bits. In this invention, more than the usual number of channels in error in any one set are made correctable by adaptively reallocating the unused redundant channels in the other set. This is accomplished by encoding and recording in the first redundant channel in each set vertical parity checks limited to that set while encoding and recording in the second redundant channel of each set, the parity of data taken over both sets of channels in a predetermined positively or negatively sloped direction.
    Type: Grant
    Filed: December 23, 1977
    Date of Patent: May 6, 1980
    Assignee: International Business Machines Corporation
    Inventor: Arvind M. Patel
  • Patent number: 4125881
    Abstract: High tape acceleration rates are achieved in an unbuffered, capstanless tape drive system by a tape motion control apparatus employing separate drive motors for each reel of a reel-to-reel tape transport. Tape moves from one reel past a read/write head and a tape tension sensor to the other reel, there being no tachometer in the tape feed path. A tachometer on one reel shaft provides a large number of pulses per revolution which pulses are counted by a counter; and a tachometer on the other reel shaft provides only one pulse per revolution, which pulse gates out the count then accumulated in the counter for actuating means to provide motor acceleration currents of a magnitude corresponding to said accumulated count according to a predetermined servo algorithm for controlling rotation of both reels. A tape radius constant corresponding to the actual length and thickness of tape in the system is calculated during initial wrap of tape onto the takeup reel.
    Type: Grant
    Filed: May 19, 1977
    Date of Patent: November 14, 1978
    Assignee: International Business Machines Corporation
    Inventors: John J. Eige, Arvind M. Patel, Spencer D. Roberts, David Stedman
  • Patent number: RE30187
    Abstract: Error correcting apparatus is provided for correcting plural channels in error in a parallel channel information system. The information is encoded in a cross-channel direction as well as along the channel length. The encoded message after storage or transmission is decoded in the cross-channel direction and error correction provided in the in-channel direction in a given number of indicated channels. Orthogonally symmetrical redundancy enhances error correction while tending to minimize hardware. Plural independent codes interact to correct the plural channels in error. The error correcting capabilities of the codes may be matched, no limitation thereto intended.
    Type: Grant
    Filed: February 22, 1977
    Date of Patent: January 8, 1980
    Assignee: International Business Machines Corporation
    Inventors: Se J. Hong, Arvind M. Patel
  • Patent number: T100402
    Abstract: A method and means for modifying up to k bits in each byte of (n+k) bits to be accessed with respect to counterpart minor loops of a sequentially accessed byte-organized major/minor loop memory array. The combination of bad byte location pointers and a byte mask is used to delete bits on bad bytes extracted from the memory or to insert zeroes into defective loop locations when bad bytes are written into the memory. Alternatively, the ith bit in each byte of (n+1) bits to be accessed may be modified through the utilization of the value of the ith bit written into the byte position of n+1st bit, while the ith bit of a defective byte position is zeroed. As a bad byte is extracted, the value of the n+1st bit is substituted for the ith bit. A dense list, rather than a sparse bad byte pointer list, is used.
    Type: Grant
    Filed: July 7, 1980
    Date of Patent: March 3, 1981
    Assignee: International Business Machines Corporation
    Inventors: Abraham M. Gindi, Magdi R. Orfali, Arvind M. Patel