Abstract: Logic (also called “re-ordering semaphore”) issues semaphore grants to access a shared resource in an order different from the order in which semaphore requests for accessing the shared resource are received. The re-ordering semaphore needs to receive a semaphore release between any two semaphore grants. There is no limit on the duration between a semaphore grant and a semaphore release, so that a task that receives a semaphore grant can use the shared resource for any length of time. In one embodiment, each request is associated with a number indicative of the order in which grants are to be issued, and the re-ordering semaphore uses this number in deciding which request is to be granted. The number can be a sequence number that is indicative of the order of arrival of packets that generated the requests.

Abstract: A co-processor (also called “memory co-processor”) provides an interface to a memory, by executing instructions on data held in the memory. The co-processor uses a specified address to fetch data from memory, performs a specified instruction (such as incrementing a counter or policing) on the data to obtain modified data, and writes the modified data back to memory at the same address. Depending on the embodiment, the memory co-processor may include a first buffer for holding instructions that may be received back to back, in successive clock cycles. Instead of or in addition to the first buffer, the memory co-processor may include a second buffer for holding data to be written to memory back to back, in successive clock cycles. In some embodiments, the memory co-processor also receives (and maintains in local storage) the identity of a task that generates the specified instruction, so that the same cask may be awakened after the instruction has been executed.

Abstract: A multi-layer network element for forwarding received packets from an input port to one or more output ports with quality of service. When output queues exceed or meet a threshold value below the queue's capacity packets are ramdomly discarded. When the queue becomes full, the network element determines which flow caused the queue to overflow. The priority of that flow is lowered. In a multicast packet, the packet may have different priorities at each output port. Scheduling of multiple output queues at each output port uses a weight round robin approach that allocates a weight portion of packets to transmit at each time interval. A packet is not interrupted during its transmission, even if the weight portion is met during a packet's transmission. The excess number of bytes transmited as a result of not interrupting the packet are accounted for in the next round.

Abstract: An efficient, cost effective method and apparatus for performing resource allocation of available bit rate (ABR) virtual circuit (VC) in an asynchronous transfer mode (ATM) network includes an explicit rate switch process performed at at least one switch of an ABR VC. The process provides a fast and more accurate computation of the number of active VCs in an ATM network. Furthermore, the fair share allocation is calculated at the switch in a way that is efficient and lends itself easily to implementation in hardware. For example, in one embodiment, the fair share is implemented using a series of counters and registers controlled by a state machine. This simple hardware implementation enables fast convergence to a current final state so that timely accurate resource utilization and allocation to the ABR VCs can be determined.

Abstract: In a communication network having a set of hosts and switch based label swapping communication nodes, each node has a control processor that is also a host that sends and receives messages via the switching apparatus in its associated node. At least one of the hosts includes a distribution tree set up procedure. That procedure stores source and destination data designating a set of source hosts and a set of destination hosts in the communication network, and defines a distribution tree of virtual connections. The designated source hosts and destination hosts may include the control processors of some or all the network nodes. The defined virtual connections include a virtual connection from each designated source host to all of the designated destination hosts, and message labels for all messages sent by the source hosts to be routed to the destination nodes.

Abstract: In a communication network having a set of hosts and switch based label swapping communication nodes, each node has a control processor that is also a host that sends and receives messages via the switching apparatus in its associated node. Each node's control processor also includes a virtual connection (VC) traversal procedure that implements the methodology of the present invention. The control processor of any node along an established connection can initiate the transmission of a VC traversal message to the control processors of all the nodes along the connection. The VC traversal message is transmitted as one or more ATM cells, where each cell includes a standard ATM header for routing the cell to a neighboring node's control processor, as well as a VC traversal header in the body of the cell that identifies the connection being traversed.