Patents by Inventor Ashish Gupta

Ashish Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6807603
    Abstract: A method of accessing a plurality of memories and a plurality of input/output modules includes providing at least one map table, including a plurality of entries. Each entry includes an entry type identifier and a plurality of entry items. A first logical address including a plurality of address bits is received. An entry in the at least one map table is identified based on a first set of the address bits. A type of the identified entry is determined based on the entry type identifier of the identified entry. An entry item in the identified entry is identified based on a second set of the address bits if the entry type identifier indicates an input/output type entry. An entry item in the identified entry is identified based on a third set of the address bits if the entry type identifier indicates a memory type entry.
    Type: Grant
    Filed: February 22, 2002
    Date of Patent: October 19, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Ashish Gupta, Debendra Das Sharma
  • Publication number: 20040078647
    Abstract: A virtual input/output (I/O) interconnect mechanism, and a corresponding method, for use in a computer system having a plurality of I/O devices and a plurality of processing units, where I/O devices and processing units are coupled by one or more bridge units, includes an address decode block having a multiplexer that multiplexes inputs to produce an address, where the address relates to a transaction related to a processor unit, a range register decoder that receives the address and provides a destination address of a module to receive the transaction related to the address, and a reroute module identification block that receives the destination address.
    Type: Application
    Filed: March 8, 2002
    Publication date: April 22, 2004
    Inventors: Debendra Das Sharma, Ashish Gupta
  • Publication number: 20040019751
    Abstract: A distributed-memory multi-processor system includes a plurality of cells communicatively coupled to each other and collectively including a plurality of processors, caches, main memories, and cell controllers. Each of the cells includes at least one of the processors, at least one of the caches, one of the main memories, and one of the cell controllers. Each of the cells is configured to perform memory migration functions for migrating memory from a first one of the main memories to a second one of the main memories in a manner that is invisible to an operating system of the system.
    Type: Application
    Filed: July 23, 2002
    Publication date: January 29, 2004
    Inventors: Debendra Das Sharma, Ashish Gupta, William R. Bryg
  • Publication number: 20030167383
    Abstract: A method of accessing a plurality of memories in an interleaved manner using a contiguous logical address space includes providing at least one map table. The at least one map table includes a plurality of entries. Each entry includes a plurality of entry items. Each entry item identifies one of the memories. A first logical address is received. The first logical address includes a plurality of address bits. The plurality of address bits includes a first set of address bits corresponding to a first set of entries in the at least one map table. A first entry in the first set of entries is identified based on the first set and a second set of the address bits. A first entry item in the first entry is identified based on a third set of the address bits. The memory identified by the first entry item is accessed.
    Type: Application
    Filed: February 22, 2002
    Publication date: September 4, 2003
    Inventors: Ashish Gupta, William R. Bryg
  • Publication number: 20030163657
    Abstract: A method of accessing a plurality of memories in an interleaved manner and a plurality of input/output modules using a contiguous logical address space includes providing at least one map table. The at least one map table includes a plurality of entries. Each entry includes an entry type identifier and a plurality of entry items. Each entry item includes a module identifier. Each entry is one of a memory type entry and an input/output type entry. A first logical address is received. The first logical address includes a plurality of address bits. An entry in the at least one map table is identified based on a first set of the address bits. A type of the identified entry is determined based on the entry type identifier of the identified entry. An entry item in the identified entry is identified based on a second set of the address bits if the entry type identifier indicates an input/output type entry.
    Type: Application
    Filed: February 22, 2002
    Publication date: August 28, 2003
    Inventors: Ashish Gupta, Debendra Das Sharma
  • Patent number: 6611936
    Abstract: A method and apparatus are disclosed for verifying the functional design of a system's response to propagation delays from the inputs of source synchronous links during testing. The system emulates propagation delays by receiving data slice from a source, applying a random or known delay to the data slice, and sending the delayed data slice to the chip under test. In one embodiment, multiple data slices having varying delay values may be used to test combinations of delays. A programmable delay.element is used to emulate the propagation delays. This is may be implemented at the hardware description level by receiving the data slice onto multiple data buses, applying a different delay to the data slice on each data bus, and sending the delayed data slices as inputs into a multiplexor. The multiplexor may have a selector input that determines which amount of delay to test. Alternatively, the delay may be emulated using a higher level programming language and creating a multidimensional array.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: August 26, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Darren S. Jue, Ashish Gupta
  • Patent number: 6598191
    Abstract: A function for verifying an asynchronous boundary behavior of a digital system. The asynchronous boundary is formed at a coupling between a first series of registers clocked by a write clock (the write domain), and a second series of registers clocked by a read clock (the read domain). A delay register and multiplexer are inserted after a predetermined register within the digital system, where the predetermined register and delay register are clocked by the same clock. The output of the predetermined register is coupled to both the first input of multiplexer and a first input of the delay register. The delay register is coupled to the second input of the multiplexer. A selector is coupled to the multiplexer for selecting which of the two multiplexer inputs to pass to subsequent registers in the digital system.
    Type: Grant
    Filed: November 23, 1999
    Date of Patent: July 22, 2003
    Assignee: Hewlett-Packard Development Companay, L.P.
    Inventors: Debendra Das Sharma, Ashish Gupta, Donald A. Williamson
  • Publication number: 20030106005
    Abstract: A method and apparatus are disclosed for verifying the functional design of a system's response to propagation delays from the inputs of source synchronous links during testing. The system emulates propagation delays by receiving data slice from a source, applying a random or known delay to the data slice, and sending the delayed data slice to the chip under test. In one embodiment, multiple data slices having varying delay values may be used to test combinations of delays. A programmable delay element is used to emulate the propagation delays. This is may be implemented at the hardware description level by receiving the data slice onto multiple data buses, applying a different delay to the data slice on each data bus, and sending the delayed data slices as inputs into a multiplexor. The multiplexor may have a selector input that determines which amount of delay to test. Alternatively, the delay may be emulated using a higher level programming language and creating a multidimensional array.
    Type: Application
    Filed: April 28, 2000
    Publication date: June 5, 2003
    Inventors: Darren S. Jue, Ashish Gupta
  • Patent number: 6571243
    Abstract: According to the invention, a system and method for extracting information from a semistructured information source. The system includes a listing stack for holding extracted information. A means for matching at least one extractor to the semistructured information to return a list of potential matches is also included. The system can also include a means for iterating through the list of potential matches and a means for retrieving information from a particular match in the list of potential matches. A means for adding a particular match into the listing stack can also be part of the system.
    Type: Grant
    Filed: November 30, 2001
    Date of Patent: May 27, 2003
    Assignee: Amazon.com, Inc.
    Inventors: Ashish Gupta, Peter Norvig, Anand Rajaraman
  • Patent number: 6539378
    Abstract: According to the invention, a method is provided for forming an information closure of a plurality of rows in a listing stack built by a wrapper program for accessing semistructured information. This method includes removing a first row from the listing stack and computing a cross product of the fields in the first row. A step of adding this cross product to a list of accepted rows can also be part of the method. For each remaining row in the listing stack, the method includes a step of computing a selective cross product according to a plurality of steps. In one step, a result is initialized to empty. Then, for each row in the list of accepted rows, a step of determining for a first new row from the accepted row, extended with the non-empty fields of the remaining row is performed. The method can also include a step of determining a second new row from the remaining row, extended with the non-empty fields in the accepted row. Thereupon, a step of adding the two new rows to the result can be performed.
    Type: Grant
    Filed: November 30, 2001
    Date of Patent: March 25, 2003
    Assignee: Amazon.com, Inc.
    Inventors: Ashish Gupta, Peter Norvig, Anand Rajaraman
  • Publication number: 20020062312
    Abstract: According to the invention, a system and method for extracting information from a semistructured information source. The system includes a listing stack for holding extracted information. A means for matching at least one extractor to the semistructured information to return a list of potential matches is also included. The system can also include a means for iterating through the list of potential matches and a means for retrieving information from a particular match in the list of potential matches. A means for adding a particular match into the listing stack can also be part of the system.
    Type: Application
    Filed: November 30, 2001
    Publication date: May 23, 2002
    Applicant: Amazon.com, Inc.
    Inventors: Ashish Gupta, Peter Norvig, Anand Rajaraman
  • Publication number: 20020062222
    Abstract: According to the invention, a method is provided for forming an information closure of a plurality of rows in a linkage stack built by a wrapper program for accessing semistructured information. This method includes removing a first row from the linkage stack and computing a cross product of the fields in the first row. A step of adding this cross product to a list of accepted rows can also be part of the method. For each remaining row in the linkage stack, the method includes a step of computing a selective cross product according to a plurality of steps. In one step, a result is initialized to empty. Then, for each row in the list of accepted rows, a step of determining for a first new row from the accepted row, extended with the non-empty fields of the remaining row is performed. The method can also include a step of determining a second new row from the remaining row, extended with the non-empty fields in the accepted row. Thereupon, a step of adding the two new rows to the result can be performed.
    Type: Application
    Filed: November 30, 2001
    Publication date: May 23, 2002
    Applicant: Amazon.com, Inc.
    Inventors: Ashish Gupta, Peter Norvig, Anand Rajaraman
  • Publication number: 20020019856
    Abstract: A method and system for allowing users of different web pages to exchange information. The information exchange system identifies groups of related web pages and maintains a database of user-supplied information for each group of related web pages. When a user accesses a web page, the information exchange often displays in a separate area the information associated with the group of related web pages. Also, the information exchange system allows the user to enter information that will be displayed to other users who access related web pages.
    Type: Application
    Filed: March 1, 2001
    Publication date: February 14, 2002
    Inventors: Jeffrey P. Bezos, Ashish Gupta
  • Patent number: 6289335
    Abstract: A method and apparatus for fast refreshing a subquery snapshot creates the snapshot based on a first table and a second table according to a snapshot definition query, which contains one or more subqueries. Information about modifications to the first and second tables is stored in first and second log, respectively. When a refresh operation is initiated, the snapshot is refreshed by reconciling differences between the snapshot, the first table and second table according to the snapshot definition query, the first log, the second log, the first table, and the second table.
    Type: Grant
    Filed: June 23, 1997
    Date of Patent: September 11, 2001
    Assignee: Oracle Corporation
    Inventors: Alan Downing, Harry Sun, Ashish Gupta
  • Patent number: 6199079
    Abstract: A method of automatically filling in on-line forms presented by web pages in an internet transactional environment by determining based upon selectable criteria a form identifier corresponding to a particular on-line form, and thereupon, for each form so identified, identifying one or many corresponding match patterns with which a page containing a target on-line form is parsed to obtain a plurality of attributes, and thereupon, for each attribute obtained in the parsing step, indexing into a database to obtain and then appropriately transform user information which may be used to fill in the target form.
    Type: Grant
    Filed: March 20, 1998
    Date of Patent: March 6, 2001
    Assignee: Junglee Corporation
    Inventors: Ashish Gupta, Anand Rajaraman
  • Patent number: 5963949
    Abstract: According to the invention, methods for gathering data around forms having one or more fields, enabling a wrapper program to extract semistructured information by determining combinations of values for fields associated with particular forms; submitting the particular forms repeatedly for all combinations of interest and providing the results returned for further processing. In select embodiments, the combinations of values for fields is a Cartesian product of the possible values for the fields. Values to be submitted in the form fields may be specified by using a programming language such as Site Description Language (SDL) or Java.
    Type: Grant
    Filed: December 22, 1997
    Date of Patent: October 5, 1999
    Assignee: Amazon.com, Inc.
    Inventors: Ashish Gupta, Peter Norvig, Anand Rajaraman
  • Patent number: 5832475
    Abstract: Disclosed is a system and method for performing database queries including GROUP-BY operations, in which aggregate values for attributes are desired for distinct, partitioned subsets of tuples satisfying a query. A special case of the aggregation problem is addressed, employing a structure, called the data cube operator, which provides information useful for expediting execution of GROUP-BY operations in queries. Algorithms are provided for constructing the data cube by efficiently computing a collection of GROUP-BYs on the attributes of the relation. Decision support systems often require computation of multiple GROUP-BY operations on a given set of attributes, the GROUP-BYs being related in the sense that their attributes are subsets or supersets of each other. The invention extends hash-based and sort-based grouping methods with optimizations, including combining common operations across multiple GROUP-BYs and using pre-computed GROUP-BYs for computing other GROUP-BYs.
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: November 3, 1998
    Assignee: International Business Machines Corporation
    Inventors: Rakesh Agrawal, Ashish Gupta, Sunita Sarawagi
  • Patent number: 5826258
    Abstract: A method is provided for determining how semistructured information is organized in disparate semistructured resources by providing a wrapper to extract information and to provide structured information (e.g., tuples of an SQL database) to a mapper coupled to a standard relational database engine. In a specific embodiment, a querying agent is provided on top of the mapper. Further according to the invention, structured high-level user queries are processed across the disparate semistructured resources using a plurality of wrappers each dedicated to a particular resource.
    Type: Grant
    Filed: October 2, 1996
    Date of Patent: October 20, 1998
    Assignee: Junglee Corporation
    Inventors: Ashish Gupta, Venky Harinariyan, Dallan Quass, Anand Rajaraman
  • Patent number: 5706495
    Abstract: A method, apparatus, and article of manufacture for optimizing SQL queries in a relational database management system using a vectorized index. The vectorized index represents values in one or more of the columns of a particular table in the relational database. The vectorized index is comprised of a plurality of positions, wherein each of the positions comprises a linear array that represents a value for the specified columns in a corresponding row of the particular table in the relational database. To use the vectorized index, SQL operations are converted to a series of bit-vector operations on that index, where the result of the bit-vector operations is a list of row positions in the table.
    Type: Grant
    Filed: May 7, 1996
    Date of Patent: January 6, 1998
    Assignee: International Business Machines Corporation
    Inventors: Atul Chadha, Ashish Gupta, Piyush Goel, Venkatesh Harinarayan, Balakrishna Raghavendra Iyer