Patents by Inventor Ashish Jagmohan

Ashish Jagmohan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8352839
    Abstract: Encoding data into constrained memory using a method for writing data that includes receiving write data to be encoded into a write word, receiving constraints on symbol values associated with the write word, encoding the write data into the write word, and writing the write word to a memory. The encoding includes: representing the write data and the constraints as a first linear system in a first field of a first size; embedding the first linear system into a second linear system in a second field of a second size, the second size larger than the first size; solving the second linear system in the second field resulting in a solution; and collapsing the solution into the first field resulting in the write word, the write word satisfying the constraints on symbol values associated with the write word.
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: January 8, 2013
    Assignee: International Business Machines Corporation
    Inventors: Michele M. Franceschini, Ashish Jagmohan, Luis A. Lastras-Montano, Mayank Sharma
  • Patent number: 8341501
    Abstract: Adaptive endurance coding including a method for storing data that includes receiving write data and a write address. A compression algorithm is applied to the write data to generate compressed data. An endurance code is applied to the compressed data to generate a codeword. The endurance code is selected and applied in response to the amount of space saved by applying the compression to the write data. The codeword is written to the write address.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: December 25, 2012
    Assignee: International Business Machines Corporation
    Inventors: Michele M. Franceschini, Ashish Jagmohan, John P. Karidis, Luis A. Lastras-Montano
  • Patent number: 8341612
    Abstract: Disclosed are a method and system for optimized, dynamic data-dependent program execution. The disclosed system comprises a statistics computer which computes statistics of the incoming data at the current time instant, where the said statistics include the probability distribution of the incoming data, the probability distribution over program modules induced by the incoming data, the probability distribution induced over program outputs by the incoming data, and the time-complexity of each program module for the incoming data, wherein the said statistics are computed on as a function of current and past data, and previously computed statistics; a plurality of alternative execution path orders designed prior to run-time by the use of an appropriate source code; a source code selector which selects one of the execution path orders as a function of the statistics computed by the statistics computer; a complexity measurement which measures the time-complexity of the currently selected execution path-order.
    Type: Grant
    Filed: May 16, 2007
    Date of Patent: December 25, 2012
    Assignee: International Business Machines Corporation
    Inventors: Dake He, Ashish Jagmohan, Jian Lou, Ligang Lu
  • Patent number: 8331168
    Abstract: Providing increased capacity in heterogeneous storage elements including a method for storing data including a write process writing to a memory and a read process reading from the memory. Physical characteristics of memory cells in the memory support different sets of data levels. The write process takes into account the different sets of data levels when writing to the memory. The read process first obtains data in the memory and subsequently determines how to interpret the data.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: December 11, 2012
    Assignee: International Business Machines Corporation
    Inventors: Ibrahim M. Elfadel, Michele Franceschini, Ashish Jagmohan, Luis A. Lastras-Montano, Mayank Sharma
  • Publication number: 20120311262
    Abstract: Memory cell presetting for improved performance including a system that includes a memory, a cache, and a memory controller. The memory includes memory lines made up of memory cells. The cache includes cache lines that correspond to a subset of the memory lines. The memory controller is in communication with the memory and the cache. The memory controller is configured to perform a method that includes scheduling a request to set memory cells of a memory line to a common specified state in response to a cache line attaining a dirty state.
    Type: Application
    Filed: June 1, 2011
    Publication date: December 6, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michele M. Franceschini, Ashish Jagmohan, John P. Karidis, Luis A. Lastras-Montano, Moinuddin K. Qureshi
  • Publication number: 20120290898
    Abstract: Adaptive endurance coding including a method for accessing memory that includes retrieving a codeword from a memory address. The codeword is multiplied by a metadata matrix to recover metadata for the codeword. The metadata includes a data location specification. The data in the codeword is identified in response to the metadata and the data is output as read data.
    Type: Application
    Filed: July 24, 2012
    Publication date: November 15, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: MIchele M. Franceschini, Ashish Jagmohan, John P. Karidis, Luis A. Lastras-Montano
  • Publication number: 20120290778
    Abstract: Providing increased capacity in heterogeneous storage elements including a method for storing data in a heterogeneous memory that includes receiving a write message and a write address corresponding to a block of memory cells where at least two of the memory cells support different data levels, determining physical characteristics of the memory cells, and identifying virtual memories associated with the block of memory cells in response to the physical characteristics. The following is performed for each of the virtual memories: generating a constraint vector that describes the virtual cells in the virtual memory; and calculating a virtual write vector in response to the constraint vector and the write data, the calculating including writing the write data, bit by bit, in order, into the virtual memory, skipping locations known to be stuck to a particular value as indicated by the constraint vector.
    Type: Application
    Filed: July 25, 2012
    Publication date: November 15, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ibrahim M. Elfadel, Ashish Jagmohan, Luis A. Lastras-Montano, Mayank Sharma
  • Publication number: 20120287714
    Abstract: Providing increased capacity in heterogeneous storage elements including a method for reading from memory. The method includes receiving a read word from a block of memory cells, where physical characteristics of the memory cells support different sets of data levels. The read word is separated into two or more virtual read vectors. For each of the virtual read vectors, the codebook that was utilized to generate the virtual read vector is identified and a partial read data vector is generated. The generating includes multiplying the virtual read vector by a matrix that represents the codebook. The partial read data vectors are combined into a read message and the read message is output.
    Type: Application
    Filed: July 25, 2012
    Publication date: November 15, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ibrahim M. Elfadel, Michele M. Franceschini, Ashish Jagmohan, Luis A. Lastras-Montano, Mayank Sharma
  • Publication number: 20120281750
    Abstract: A method and system are disclosed for selecting a mode to encode video data. The method comprises the steps of (a) transforming a source video frame into a set of coefficients, (b) partitioning said set of coefficients into a plurality of subsets of the coefficients on the basis of probability statistics corresponding to a plurality of encoding modes, wherein each of said subsets is identified for encoding by one of the plurality of encoding modes. The method comprises the further steps of (c) for each of the plurality of subsets of coefficients, computing defined parameters of an associated probability distribution for said subset, and (d) repeating steps (b) and (c) until a predetermined termination condition is satisfied. When this predetermined termination condition is satisfied, the subsets of coefficients, as they exist at that time, are output to a video encoder, which preferably is a Wyner-Ziv encoder.
    Type: Application
    Filed: July 10, 2012
    Publication date: November 8, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dake He, Ashish Jagmohan, Ligang Lu
  • Patent number: 8295356
    Abstract: A method and system are disclosed for selecting a mode to encode video data. The method comprises the steps of (a) transforming a source video frame into a set of coefficients, (b) partitioning said set of coefficients into a plurality of subsets of the coefficients on the basis of probability statistics corresponding to a plurality of encoding modes, wherein each of said subsets is identified for encoding by one of the plurality of encoding modes. The method comprises the further steps of (c) for each of the plurality of subsets of coefficients, computing defined parameters of an associated probability distribution for said subset, and (d) repeating steps (b) and (c) until a predetermined termination condition is satisfied. When this predetermined termination condition is satisfied, the subsets of coefficients, as they exist at that time, are output to a video encoder, which preferably is a Wyner-Ziv encoder.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: October 23, 2012
    Assignee: International Business Machines Corporation
    Inventors: Dake He, Ashish Jagmohan, Ligang Lu
  • Patent number: 8295342
    Abstract: Disclosed are a method and system for video compression, wherein the video encoder has low computational complexity and high compression efficiency. The disclosed system comprises a video encoder and a video decoder, wherein the method for encoding includes the steps of converting a source frame into a space-frequency representation; estimating conditional statistics of at least one vector of space-frequency coefficients; estimating encoding rates based on the said conditional statistics; and applying Slepian-Wolf codes with the said computed encoding rates. The preferred method for decoding includes the steps of; generating a side-information vector of frequency coefficients based on previously decoded source data, encoder statistics, and previous reconstructions of the source frequency vector; and performing Slepian-Wolf decoding of at least one source frequency vector based on the generated side-information, the Slepian-Wolf code bits and the encoder statistics.
    Type: Grant
    Filed: November 14, 2007
    Date of Patent: October 23, 2012
    Assignee: International Business Machines Corporation
    Inventors: Jun Chen, Dake He, Ashish Jagmohan, Ligang Lu, Vadim Sheinin
  • Publication number: 20120226962
    Abstract: Storing data in memory using wear-focusing techniques for improved endurance. A method for storing the data includes receiving write data to be written into a memory that is logically divided into a plurality of regions. The plurality of regions includes a first region and a second region that are implemented by the same memory technology. The memory is subject to degradation as a result of write operations. The write data is classified as dynamic data or static data. The write data is encoded using a first type of encoding in response to the write data being classified as dynamic. The write data encoded using the first type of encoding is stored in the first region of the memory. The write data is encoded using a second type of encoding and stored in the second region of the memory in response to classifying the write data as static data.
    Type: Application
    Filed: March 4, 2011
    Publication date: September 6, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michele M. Franceschini, Ashish Jagmohan
  • Publication number: 20120226963
    Abstract: Bad block management for flash memory including a method for storing data. The method includes receiving a write request that includes write data. A block of memory is identified for storing the write data. The block of memory includes a plurality of pages. A bit error rate (BER) of the block of memory is determined and expanded write data is created from the write data in response to the BER exceeding a BER threshold. The expanded write data is characterized by an expected BER that is lower than the BER threshold. The expanded write data is encoded using an error correction code (ECC). The encoded expanded write data is written to the block of memory.
    Type: Application
    Filed: March 4, 2011
    Publication date: September 6, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John A. Bivens, Michele M. Franceschini, Ashish Jagmohan
  • Patent number: 8230217
    Abstract: A method and system provide for secure sharing of arbitrary data between users with limited mutual trust. A user can encode its information by using a Slepian-Wolf code at a rate which enables a second user to correctly decode only if the side-information it has satisfies a conditional entropy constraint. The key advantages are as follows. Firstly, it is very flexible, in that it enables secure sharing for general data including multimedia data. Secondly, by appropriate Slepian-Wolf code selection, it enables compression in conjunction with security. Thirdly, it can be used for the case where the data model is imperfectly known and trust is to be built up incrementally.
    Type: Grant
    Filed: October 13, 2008
    Date of Patent: July 24, 2012
    Assignee: International Business Machines Corporation
    Inventors: Dake He, Ashish Jagmohan, Ligang Lu
  • Publication number: 20120144272
    Abstract: Error correction in not-and (NAND) flash memory including a system for retrieving data from memory. The system includes a decoder in communication with a memory. The decoder is for performing a method that includes receiving a codeword stored on a page in the memory, the codeword including data and first-tier check symbols that are generated in response to the data. The method further includes determining that the codeword includes errors that cannot be corrected using the first-tier check symbols, and in response second-tier check symbols are received. The second-tier check symbols are generated in response to receiving the data and to the contents of other pages in the memory that were written prior to the page containing the codeword. The codeword is corrected in response to the second-tier check symbols. The corrected codeword is output.
    Type: Application
    Filed: December 3, 2010
    Publication date: June 7, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michele M. Franceschini, Ashish Jagmohan, Luis A. Lastras-Montano, Mayank Sharma
  • Publication number: 20120144249
    Abstract: Program disturb error logging and correction for a flash memory including a computer implemented method for storing data. The method includes receiving a write request that includes data and a write address of a target page in a memory. A previously programmed page at a specified offset from the target page is read from the memory. Contents of the previously programmed page are compared to an expected value of the previously programmed page. Error data is stored in an error log in response to contents of the previously programmed page being different than the expected value of the previously programmed page, the error data describing an error in the previously programmed page and the error data used by a next read operation to the previously programmed page to correct the error in the previously programmed page. The received data is written to the target page in the memory.
    Type: Application
    Filed: December 3, 2010
    Publication date: June 7, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michele M. Franceschini, Ashish Jagmohan
  • Patent number: 8176234
    Abstract: Multi-write coding of non-volatile memories including a method that receives write data, and a write address of a memory page. The memory page is in either an erased state or a previously written state. If the memory page is in the erased state: selecting a first codeword from a code such that the first codeword encodes the write data and is consistent with a target set of distributions of electrical charge levels in the memory page; and writing the first codeword to the memory page. If the memory page is in the previously written state: selecting a coset from a linear code such that the coset encodes the write data and includes one or more words that are consistent with previously written content of the memory page; selecting a subsequent codeword from the one or more words in the coset; and writing the subsequent codeword to the memory page.
    Type: Grant
    Filed: December 4, 2009
    Date of Patent: May 8, 2012
    Assignee: International Business Machines Corporation
    Inventors: Michele M. Franceschini, Ashish Jagmohan, Luis A. Lastras-Montano
  • Patent number: 8176235
    Abstract: Enhanced write performance for non-volatile memories including a memory system that includes a receiver for receiving a data rate of a data sequence to be written to a non-volatile flash memory device. The memory system also includes a physical page selector for selecting a physical address of an invalid previously written memory page from a group of physical addresses of invalid previously written memory pages located on the non-volatile memory device, and for determining if the number of free bits in the invalid previously written memory page at the selected physical address is greater than or equal to the data rate. The memory system also includes a transmitter for outputting the selected physical address of the invalid previously written memory page, the outputting in response to the physical page selector determining that the number of free bits is greater than or equal to the data rate.
    Type: Grant
    Filed: December 4, 2009
    Date of Patent: May 8, 2012
    Assignee: International Business Machines Corporation
    Inventors: Michele M. Franceschini, Ashish Jagmohan, Luis A. Lastras-Montano, Mayank Sharma
  • Publication number: 20120096328
    Abstract: Multi-write endurance and error control coding of non-volatile memories including a method for receiving write data and a write address of a memory page in a memory. The write data is partitioned into a plurality of sub-blocks, each sub-block including q bits of the write data. Error correction bits are generated at the computer in response to the sub-blocks and to an error correction code (ECC). At least one additional sub-block containing the error correction bits are appended to the partitioned write data and a write word is generated. The write word is generated by performing for each of the sub-blocks: selecting a codeword such that the codeword encodes the sub-block and is consistent with current electrical charge levels of the plurality of memory cells associated with the memory page; concatenating the selected codewords to form the write word; and writing the write word to the memory page.
    Type: Application
    Filed: October 13, 2010
    Publication date: April 19, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michele M. Franceschini, Ashish Jagmohan
  • Patent number: 8160130
    Abstract: The present invention relates to a method, system and computer program product for the predictive encoding of digital video sequences. The objectives of the invention are accomplished by dynamically determining the resolution of a current frame being encoded and outputting the determination. The determination process is based on statistical and coding information of a plurality of frames, including at least one previous frame and the current frame. Further, general encoding parameters and the encoding parameters of a current frame at a chosen resolution are determined, wherein the encoding parameter selection step takes into account the determination of the dynamic resolution determination step in determining the encoding parameters.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: April 17, 2012
    Assignee: International Business Machines Corporation
    Inventors: Krishna C. Ratakonda, Ashish Jagmohan