Abstract: The present disclosure relates to a signal generator including: a plurality of interpolators, each interpolator being configured to: receive a first input signal having a first phase, and a second input signal having a second phase; generate a plurality of interpolated signals based on a plurality of interpolations of the input signals, each interpolated signal having a respective phase based on the respective interpolation, and combine the interpolated signals to provide an output signal; the plurality of interpolators including: a first plurality of interpolators, each interpolator being configured to receive as input signals a first reference signal and a second reference signal; and a second plurality of interpolators, each interpolator being configured to receive as first input signal an output signal from an interpolator of the first plurality of interpolators and as second input signal another output signal from another interpolator of the first plurality of interpolators.

Abstract: An antenna array architecture is provided for beamforming applications. The antenna array architecture facilitates a compact and wideband dual-polarized beam-switching antenna array architecture, which may be implemented in a cost-effective multi-layer PCB or package. The antenna array architecture is implemented as part of a package substrate having a number of layers. Each of the layers comprises various conductive elements such as conductive segments and/or traces that are disposed thereon in accordance with the respective antenna components.

Abstract: Disclosed herein is a single inductor multiple output (SIMO) DC-to-DC converter for dynamically providing a regulated output voltage within a pre-defined range. The converter may be configured as a buck-boost converter that includes an inductor, switches coupled to the inductor to control energizing and deenergizing phases of the inductor, and output rails. Each of the output rails may include an output switch that selectively connects the output rail to the inductor. Depending on the energizing and deenergizing patterns of the inductor; and the selection state of the switches, the output rails may be supplied with different output voltages and/or output currents. Any number of regulating strategies may be utilized to control the output voltages and/or the output currents.

Abstract: A wireless communication device can include an antenna array and processing circuitry coupled to the antenna array to segment antenna elements of an antenna array into a configurable plurality of groups of antenna elements. The processing circuitry can also activate analog beamforming for at least one group of the plurality of groups of antenna elements. Subsequent to enabling analog beamforming, the processing circuitry can configure digital beamforming for the at least one group based on a criterion.

Abstract: Disclosed herein is a radio frequency circuit that includes a substrate that may include a radio frequency front-end to antenna (RF FE-to-Ant) connector. The RF FE-to-Ant connector may include a conductor track structure and a substrate connection structure coupled to the conductor track structure. The substrate may include radio frequency front-end circuitry monolithically integrated in the substrate. The substrate connection structure may include at least one of a solderable structure, a weldable structure, or an adherable structure. The substrate connection structure may be configured to form at least one radio frequency signal interface with an antenna circuit connection structure of a substrate-external antenna circuit. The substrate may include an edge region. The substrate connection structure may be disposed in the edge region.

Abstract: A filter includes a plurality of filtering paths. The plurality of filtering paths is driven by a corresponding plurality of local oscillator (LO) signals associated with an LO frequency. Each of the LO signals has a phase of a plurality of phases. Each filtering path of the plurality of filtering paths includes a plurality of signal generation branches. The plurality of signal generation branches is configured to receive a harmonic LO signal based on a fraction of the LO frequency, and generate an LO signal of the corresponding plurality of LO signals associated with the LO frequency using the harmonic LO signal.

Abstract: For example, a phase shifter may include an input to receive an input clock signal having an input frequency and an input phase. For example, the phase shifter may include a quadrature phase-shift generator configured to generate a first signal and a second signal based on the input clock signal, the first and second signals having the input frequency, wherein a phase of the first signal is based on the input phase, wherein a phase of the second signal is shifted by a quadrature phase-shift relative to the phase of the first signal. For example, the phase shifter may include an output to provide an output based on the first signal and the second signal.

Abstract: A voltage-mode amplifier, comprising a first filter stage, comprising: a first voltage amplifier, connected to an input trace, and configured to amplify a signal conducted along the input trace; and a first N-path filter, connected to the input trace; wherein the first N-path filter is configured to shunt to a first reference voltage frequency from the signal; and a second filter stage, connected to the input trace in parallel to the first filter stage, comprising: a second voltage amplifier, connected to the input trace, and configured to amplify the signal conducted along the input trace; and a second N-path filter, connected to the input trace; and wherein the second N-path filter is configured to shunt to a second reference voltage frequency from the signal.

Abstract: A wireless communication device includes an antenna array with multiple antenna elements, an array of power amplifiers, and an array of phase shifters. Each antenna element is coupled to a power amplifier and a phase shifter. The device also includes transmitter circuitry coupled to the antenna array to encode a constant amplitude signal, which includes a power amplifier enable code to indicate which power amplifiers are to run in a subsequent data sample and a beam direction code to control beam direction of each phase shifter of the array of phase shifters in the subsequent data sample. The constant amplitude signal is then provided to the array of antenna elements and amplitude and phase modulation is combined over an air interface into a composite modulated signal.

Abstract: For example, an apparatus may include a digitally-controlled frequency multiplier, which may be controllable according to a digital control input, to generate an output frequency signal having an output frequency, for example, by multiplying an input frequency of an input frequency signal. For example, the digitally-controlled frequency multiplier may include a phase generator configured to generate a plurality of phase-shifted signal groups corresponding to a respective plurality of first phase-shifts applied to the input frequency signal, a plurality of digital clock multipliers controllable according to the digital control input to generate a respective plurality of frequency-multiplied signals based on the plurality of phase-shifted signal groups, and a combiner to generate the output frequency signal based on a combination of the plurality of frequency-multiplied signals.

Abstract: In various aspects, a radio frequency circuit is provided. The radio frequency circuit may include a substrate that may include a radio frequency front-end to antenna (RF FE-to-Ant) connector. The RF FE-to-Ant connector may include a conductor track structure and a substrate connection structure coupled to the conductor track structure. The substrate may include radio frequency front-end circuitry monolithically integrated in the substrate. The substrate connection structure may include at least one of a solderable structure, a weldable structure, or an adherable structure. The substrate connection structure may be configured to form at least one radio frequency signal interface with an antenna circuit connection structure of a substrate-external antenna circuit. The substrate may include an edge region. The substrate connection structure may be disposed in the edge region.

Abstract: A tunable bandpass low-noise amplifier (LNA). The LNA includes a plurality of N-path filters and a plurality of cascode amplifiers. The cascode amplifiers are configured to amplify an input signal. Each N-path filter is coupled to a different one of the plurality of cascode amplifiers. The plurality of N-path filters are driven by local oscillator (LO) signals having different frequencies, and output nodes of the plurality of cascode amplifiers are coupled in parallel. The frequencies of the LO signals may be symmetrically spaced around a desired frequency (fLO). Each N-path filter may be coupled to a source of the common-gate device of the coupled cascode amplifier. The LO signals may be generated by a digital-to-time converter (DTC)-based frequency synthesizer. The frequencies of the LO signals supplied to the N-path filters may be adjusted to tune the bandwidth of the bandpass LNA.

Abstract: For example, a transmitter, e.g., for a wireless communication device, may be configured to transmit a wideband Radio Frequency (RF) Transmit (Tx) signal having a wide bandwidth of at least 80 Megahertz (MHz). For example, the transmitter may be configured to generate the wideband RF Tx signal having the wide bandwidth based on a baseband signal. The transmitter may be configured to generate the wideband RF Tx signal including a suppressed third harmonic and a suppressed fifth harmonic.

Abstract: Disclosed herein are devices, systems, and methods for applying a post-distortion scheme to recover a desired signal from a received signal. The device includes processing circuitry connected to storage, where the processing circuitry causes one or more antennas to simultaneously transmit a transmitted signal and receive a received signal, wherein the received signal comprises a desired signal to be recovered from the received signal. The processing circuitry also causes a gain block to amplify the received signal and a leaked portion of the transmitted signal into an amplified composite signal. The processing circuitry also determines a distortion of the gain block on the received signal based on the transmitted signal. The processing circuitry also applies to the amplified composite signal an inversion of the distortion to recover the desired signal from the received signal.

Abstract: For example, an apparatus may include a baseband controller configured to control a plurality of dual-polarization Radio Heads (RHs) to communicate a Multiple-Input-Multiple-Output (MIMO) transmission, the baseband controller configured to control a first dual-polarization RH of the plurality of dual-polarization RHs to communicate a first spatial stream of the MIMO transmission with a horizontal-polarization via one or more first dual-polarization antenna elements of the first dual-polarization RH, and to control a second dual-polarization RH of the plurality of dual-polarization RHs to communicate a second spatial stream of the MIMO transmission with a vertical-polarization via one or more second dual-polarization antenna elements of the second dual-polarization RH.

Abstract: A circuit for suppressing undesired sub-harmonics includes a plurality of mixers, wherein the plurality of mixers are connected in parallel; a plurality of local oscillator signals (LO), wherein each of the plurality of LOs is associated with one of the plurality of mixers; an input to receive a plurality of phases of a driving clock, wherein each of the plurality of phases is a sub-harmonic of the driving clock, and wherein each phase of the driving clock is distributed to one of the plurality of mixers; wherein the plurality of mixers are configured to suppress one or more of the plurality of phases of the driving clock and amplify a desired phase of the driving clock.

Abstract: Embodiments may comprise low noise amplifier (LNA) circuitry with a tunable wideband and high linearity. Embodiments may increase the linearity of the LNA circuitry and reduce noise. The LNA circuitry may comprise an inverter having a differential input coupled with the antenna, a first cascode circuitry coupled between a differential output of the inverter and a second cascode stage circuitry, wherein the second cascode stage circuitry comprises a first N-path filter circuitry coupled with a first set of outputs of clock circuitry having a clock frequency of an incoming signal minus a delta frequency and a second N-path filter circuitry coupled with a second set of outputs of clock circuitry having a clock frequency of an incoming signal plus a delta frequency. Combining the response of the two N-path filter circuitries at plus and minus delta frequency may achieve frequency selectivity and attenuate blockers.

Abstract: A phased array may include a clock stage configured to generate shifted clock signals. Each shifted clock signal may include a different phase. The phased array may also include a beamforming stage configured to generate a beamformed signal that includes a beam formed in a direction based on summed signals. In addition, the phased array may include slices. Each slice may include a filter stage and a feedback stage. The filter stage may be configured to generate a corresponding summed signal by filtering a portion of blocker and noise interference in a corresponding receive signal based on blocking signals and the shifted clock signals. The feedback stage may be configured to generate the blocking signals based on the shifted clock signals and the corresponding summed signal. The blocking signals may be representative of the blocker and noise interference in the corresponding receive signal.

Abstract: An amplifier structure may include a first amplifier substructure having a first amplifier and a first filter structure and provide a first high frequency output signal and a first low frequency output signal having a frequency lower than a frequency of the first high frequency output signal. It may include a second amplifier substructure having a second amplifier and a second filter structure and provide a second high frequency output signal and a second low frequency output signal having a frequency lower than the frequency of the second high frequency output signal. It may include a first combination node configured to receive the first high frequency output signal and the second low frequency output signal and to provide a first amplified signal, and a second combination node configured to receive the first low frequency output signal and the second high frequency output signal and to provide a second amplified signal.

Abstract: Techniques are described related to digital radio control and operation. The various techniques described herein enable high-frequency local oscillator (LO) signal generation using injection locked cock multipliers (ILCMs). The techniques also include the use of LO signals for carrier aggregation applications for phased array front ends. Furthermore, the disclosed techniques include the use of array element-level control using per-chain DC-DC converters. Still further, the disclosed techniques include the use of adaptive spatial filtering and optimal combining of analog-to-digital converters (ADCs) to maximize dynamic range in digital beamforming systems.