Abstract: A system comprising a processor and a memory storing instructions that, when executed, cause the system to retrieve data blocks from a data store; identify an association between the retrieved data blocks and one or more reference data sets stored in the data store, wherein the association reflects a common dependency of the retrieved data blocks to the one or more reference data sets; generate a segment including the data blocks that depend on the common reference data set; generate a first identifier for the segment and track the segment using the first identifier.

Abstract: A system comprising a processor and a memory storing instructions that, when executed, cause the system to receive a data stream including a set of new data blocks, retrieve a reference data set having reference data blocks from a data store, encode the new set of data blocks based on the reference data set while concurrently generating a second reference data set including a subset of reference data blocks and the set of new data blocks of the data stream and store the new reference data set in the data store.

Abstract: A system comprising a processor and a memory storing instructions that, when executed, cause the system to retrieve reference data blocks from a data store, aggregate the reference data blocks into a first set based on a criterion, generate a reference data set based on a portion of the first set including the reference data blocks and store the reference data set in the data store.

Abstract: A system comprising a processor and a memory storing instructions that, when executed, cause the system to receive data blocks of an incoming data stream, determine a first reference data set associated with a segment of data store based on the received data blocks, determine a state of the first reference data set, determine whether the first reference data set meets a retirement criteria based on the state, and responsive to meeting the retirement criteria, perform retiring of the first reference data set.

Abstract: The present disclosure relates to methods and systems for implementing redundancy in memory controllers. The disclosed systems and methods utilize a row of memory blocks, such that each memory block in the row is associated with an independent media unit. Failures of the media units are not correlated, and therefore, a failure in one unit does not affect the data stored in the other units. Parity information associated with the data stored in the memory blocks is stored in a separate memory block. If the data in a single memory block has been corrupted, the data stored in the remaining memory blocks and the parity information is used to retrieve the corrupted data.

Abstract: A sequence of contiguous pages in an erase block in a non-volatile memory device is programmed and erased. Next, all of the pages in the erase block are programmed with data. Then, the data is read back and verified to determine whether there is an error in the data. When there is an error in the data, then the last page in the sequence is identified as being unstable. If there is no error in the data, then the last page in that sequence is identified as being stable. Thus, the recorded information identifies a point of instability in the erase block. Instabilities can be stabilized by performing additional writes to fill the partially filled word line.

Abstract: Embodiments of the present invention include a memory unit and a processor coupled to a memory unit. The processor is operable to group a plurality of subsets of data from an input data stream and compute a first hash value corresponding to a first grouped subset of data. Additionally, the processor is operable to detect a match between the first hash value and a second hash value stored in a hash table. Furthermore, the processor is also configured to monitor a hash value match frequency for the input data stream in which the processor is operable to increment a counter value responsive to a detection of the match and determine an entropy level for the input data stream based on the counter value relative to a frequent hash value match threshold.

Abstract: Techniques for controlling power on a PCIe direct attached non-volatile memory storage system are disclosed. In one particular embodiment, the techniques may be realized as a method for controlling power including providing power to a memory attached via the PCIe interface; monitoring a state of the attached memory; determining whether a new operation to be implemented on the attached memory would cause the power provided to the memory to exceed a preset threshold; and stalling execution of the new operation on the attached memory when it is determined that the new operation would exceed the preset threshold while continuing execution of preexisting operations on the attached memory.

Abstract: A memory apparatus and methods are provided for preventing read errors on weak pages in a non-volatile memory system. In one example, a method includes identifying a weak page in a non-volatile memory device along a word line, wherein the weak page is partially written with at least some data; buffering data associated with the weak page to a weak page buffer that is coupled in communication with the non-volatile memory device; determining that an amount of data in the weak page buffer has reached a predetermined data level; and writing the data from the weak page buffer into the weak page along the word line in the non-volatile memory device.

Abstract: The present disclosure relates to systems and methods for similarity based data deduplications. The system may be realized as a delta compression engine using pipelining and parallel data lookup techniques across multiple hardware modules including a block sketch computation module, a reference block indexing module, and a similar block delta compression module. The system implements a method for delta compression including identifying an incoming data block among multiple reference data blocks in a reference dictionary to determine a near duplicate reference data block. The method may include looking up the incoming data block in a table built upon the reference data blocks. The method may further include representing the incoming data block in a final storage format as indices and lengths of the identified data equivalence in the corresponding reference data blocks.

Abstract: Embodiments of the present invention include a memory unit and a processor coupled to a memory unit. The processor is operable to group a plurality of subsets of data from an input data stream and compute a first hash value corresponding to a first grouped subset of data. Additionally, the processor is operable to detect a match between the first hash value and a second hash value stored in a hash table. Furthermore, the processor is also configured to monitor a hash value match frequency for the input data stream in which the processor is operable to increment a counter value responsive to a detection of the match and determine an entropy level for the input data stream based on the counter value relative to a frequent hash value match threshold.

Abstract: An apparatus and method for inline compression and deduplication is presented. Embodiments of the present invention include a memory unit and a processor coupled to the memory unit. The processor is configured to receive a subset of data from a data stream and select a reference data block corresponding to the subset of data, in which the reference data block is stored in a memory buffer resident in the memory unit. The processor is also configured to compare a first hash value computed for the subset of data to a second hash value computed for the reference data block, in which the first hash value and the second hash value are stored in separate hash tables and generate a compressed representation of the subset of data by modifying header data corresponding to the subset of data responsive to a detected match between the first hash value and the second hash value in one of the separate hash tables.

Abstract: Embodiments of the present invention include a memory unit and a processor coupled to a memory unit. The processor is operable to group a plurality of subsets of data from an input data stream and compute a first hash value corresponding to a first grouped subset of data. Additionally, the processor is operable to detect a match between the first hash value and a second hash value stored in a hash table. Furthermore, the processor is also configured to monitor a hash value match frequency for the input data stream in which the processor is operable to increment a counter value responsive to a detection of the match and determine an entropy level for the input data stream based on the counter value relative to a frequent hash value match threshold.

Abstract: Techniques for improving memory page allocation are disclosed. In some embodiments, the techniques may be realized as a method for improving memory page allocation including generating, using a compression unit, compressed grains associated with compressed blocks, identifying a write page allocation unit to query, receiving, at the write page allocation unit, a query for a flash memory location to store the compressed grains, determining a flash memory location for the compressed grains, determining a parity location for the compressed grains, returning offsets indicating the flash memory location and the parity location, sending the compressed grains to the free grain location and a parity bit to the parity location as part of an atomic transaction, and recording a start location of compressed grains in a mapping.

Abstract: An approach for fingerprinting large data objects at the wire speed has been disclosed. The techniques include Fresh/Shift pipelining, split Fresh, optimization, online channel sampling, and pipelined selection. The architecture can also be replicated to work in parallel for higher system throughput. Fingerprinting may provide an efficient mechanism for identifying duplication in a data stream, and deduplication based on the identified fingerprints may provide reduced storage costs, reduced network bandwidth consumption, reduced processing time and other benefits. In some embodiments, fingerprinting may be used to ensure or verify data integrity and may facilitate detection of corruption or tampering. An efficient manner of generating fingerprints (either via hardware, software, or a combination) may reduce a computation load and/or time required to generate fingerprints.

Abstract: The present disclosure relates to methods and systems for implementing redundancy in memory controllers. The disclosed systems and methods utilize a row of memory blocks, such that each memory block in the row is associated with an independent media unit. Failures of the media units are not correlated, and therefore, a failure in one unit does not affect the data stored in the other units. Parity information associated with the data stored in the memory blocks is stored in a separate memory block. If the data in a single memory block has been corrupted, the data stored in the remaining memory blocks and the parity information is used to retrieve the corrupted data.

Abstract: Systems and methods for increasing the endurance of a solid state drive are disclosed. The disclosed systems and methods can assign different levels of error protection to a plurality of blocks of the solid state drive. The disclosed methods can provide a plurality of error correction mechanisms, each having a plurality of corresponding error correction levels and associate a first plurality of blocks of the solid state drive with a first zone and a second plurality of blocks of the solid state drive with a second zone. The disclosed methods can assign a first error correction mechanism and a first corresponding error correction level to the first zone and can assign a second error correction mechanism and a second corresponding error correction level to the second zone.

Abstract: Systems and methods for managing the endurance of a solid state drive by assigning error corrective codes (ECC) to a plurality of solid state drive blocks are provided. The disclosed systems and methods can provide a plurality of error corrective codes, each code having a corresponding correction capability and assign to each solid state drive block an error corrective code, according to a reliability of the solid state drive block. Moreover, the disclosed systems and methods can group the solid state drive blocks into groups according to their assigned error corrective codes and apply, for each group of solid state drive block, a level of ECC correction according to the assigned error corrective code of each group.

Abstract: The present disclosure relates to methods and systems for performing operations in a communications protocol. An example method can include submitting a request for a queue entry representing a command from a host comprising a request for data stored at a storage location; receiving the command from the host; and executing the command. The method can include providing a first set of the requested data, and providing a control signal to the host before providing a second set of the requested data. The control signal can indicate that a transmission of the requested data will complete.

Abstract: Techniques for controlling PCIe direct attached non-volatile memory storage system are disclosed. In one particular embodiment, the techniques may be realized as a method including monitoring a temperature of a memory attached via the PCIe interface, determining whether an operation implemented on the attached memory has caused the temperature of the memory to exceed a preset threshold, and controlling an I/O rate of the attached memory based on the determination such that the I/O rate is greater than zero.