Abstract: A USB hub integrated circuit device, comprising USB hub logic comprising a plurality USB ports, wherein at least one port comprises a pair of bi-directional transmission channels, wherein for the at least one port two physical layers are provided in parallel, each physical layer being associated with one bidirectional transmission channel, wherein the USB hub logic is further configured to select one of said physical layers for each port depending on a logic condition.

Abstract: A USB smart hub may provide enhanced battery charging, data storage security, vendor matching, device authentication, data capture/debug, and role switching. The smart hub may include an upstream port, a plurality of downstream ports, a processor, and a memory coupled to the processor for storing USB host stack code and configuration parameters. The smart hub may include a USB hub core having a core to implement a standard USB hub interface. The smart hub may include a plurality of 2:1 multiplexors coupled between the downstream ports, the core downstream ports, and the processor. The processor may control the 2:1 multiplexors. The processor may be configured to detect when a USB device is coupled to a downstream port and to run the USB host stack code and to enumerate the USB device. The processor may provide enhanced features based on the configuration parameters.

Abstract: A method for controlling a configuration in an integrated circuit device with at least one controllable input/output port having a data output driver, a data input driver, a controllable pull-up resistor, a controllable pull-down resistor, each connected with an external pin of the integrated circuit device, has the steps of: enabling only the pull-up resistor and reading the associated input through the data input driver as a first bit; enabling only the pull-down resistor and reading the associated input through the data input driver as a second bit; tri-stating the first port and reading the associated input through the data input driver as another bit; encoding a value from the read bits; and determining a firmware operation form the encoded value.

Abstract: A USB smart hub may provide enhanced battery charging, data storage security, vendor matching, device authentication, data capture/debug, and role switching. The smart hub may include an upstream port, a plurality of downstream ports, a processor, and a memory coupled to the processor for storing USB host stack code and configuration parameters. The smart hub may include a USB hub core having a core to implement a standard USB hub interface. The smart hub may include a plurality of 2:1 multiplexors coupled between the downstream ports, the core downstream ports, and the processor. The processor may control the 2:1 multiplexors. The processor may be configured to detect when a USB device is coupled to a downstream port and to run the USB host stack code and to enumerate the USB device. The processor may provide enhanced features based on the configuration parameters.

Abstract: A USB hub has a USB hub controller, and an embedded controller, a USB port connector and associated port power control device and a controllable bypass switch providing a supply voltage to the USB port connector when the embedded controller enables it, a controllable voltage supply regulator unit providing a first output voltage which can be turned off and supplied to the port power control device, and a programmable current monitor circuit with a current sensor providing a second supply voltage to the monitor circuit, wherein during a low power mode, the USB hub controller and any port power control device are turned off and the monitor circuit is configured to provide the second supply voltage through the sensor and bypass switch to the USB connector and detects a current when a USB device is plugged into the USB port connector and wakes up the embedded controller.

Abstract: A USB hub integrated circuit device, comprising USB hub logic comprising a plurality USB ports, wherein at least one port comprises a pair of bi-directional transmission channels, wherein for the at least one port two physical layers are provided in parallel, each physical layer being associated with one bidirectional transmission channel, wherein the USB hub logic is further configured to select one of said physical layers for each port depending on a logic condition.

Abstract: A Universal Serial Bus (USB) hub includes a first port that is configured to be switched from a downstream port to an upstream port; a plurality of other ports; and a controller configured to switch a function of the first port from the downstream port to the upstream port responsive to a command from an attached device and further configured to switch at least one of the plurality of other ports from a data and charge port into a port dedicated to charging

Abstract: A USB hub includes a plurality of downstream ports; at least one dual mode port, the dual mode port configured to be switchable from a downstream port to an upstream port; and host detection circuitry for detecting whether, when operating as an upstream port, a host is connected.

Abstract: A method for controlling a configuration in an integrated circuit device with at least one controllable input/output port having a data output driver, a data input driver, a controllable pull-up resistor, a controllable pull-down resistor, each connected with an external pin of the integrated circuit device, has the steps of: enabling only the pull-up resistor and reading the associated input through the data input driver as a first bit; enabling only the pull-down resistor and reading the associated input through the data input driver as a second bit; tri-stating the first port and reading the associated input through the data input driver as another bit; encoding a value from the read bits; and determining a firmware operation form the encoded value.

Abstract: Charging a device using a plurality of handshakes. A first device may provide a first handshake to a second device. A device of a first device type may be configured to charge its battery without further communication based on the first handshake. The first device may monitor a connection to the second device for a second handshake corresponding to a device of a second device type. In response to detecting the second handshake, the first device may provide a response to the second device. Accordingly, the second device of the second device type may be configured to charge its battery based on the second handshake.

Abstract: A method and system for securing access to a storage device including one or more locked logical sections. The method includes providing an interface device including a first port connected to a computing system and a second port connected to the storage device. Further, the method includes receiving a unique identifier from a wireless device, and deriving a key from the unique identifier. Based on the derived key, the method unlocks a logical section in the storage device. The method may further store access permission rights for the locked logical sections in the interface device and unlock the logical section based on the access permission rights. Moreover, the method may further authenticate the identity of a user of the wireless device for unlocking the storage device.

Abstract: Charging a device using a plurality of handshakes. A first device may provide a first handshake to a second device. A device of a first device type may be configured to charge its battery without further communication based on the first handshake. The first device may monitor a connection to the second device for a second handshake corresponding to a device of a second device type. In response to detecting the second handshake, the first device may provide a response to the second device. Accordingly, the second device of the second device type may be configured to charge its battery based on the second handshake.

Abstract: A power controller for a peripheral bus interface. A peripheral bus power controller includes a first terminal, a second terminal coupled to receive an power enable input signal from a host controller, and a third terminal coupled to provide an over-current output signal indicative of an over-current condition to the host controller. The peripheral bus power controller further includes an enable circuit configured to assert a power enable output signal on the first terminal responsive to receiving the power enable input signal and a first buffer configured to provide the over-current output signal to the host controller responsive to the power controller detecting the over-current condition on the first terminal.

Abstract: A power controller for a peripheral bus interface. A peripheral bus power controller includes a first terminal, a second terminal coupled to receive an power enable input signal from a host controller, and a third terminal coupled to provide an over-current output signal indicative of an over-current condition to the host controller. The peripheral bus power controller further includes an enable circuit configured to assert a power enable output signal on the first terminal responsive to receiving the power enable input signal and a first buffer configured to provide the over-current output signal to the host controller responsive to the power controller detecting the over-current condition on the first terminal.

Abstract: A power controller for a peripheral bus interface. A peripheral bus power controller includes a first terminal, a second terminal coupled to receive an power enable input signal from a host controller, and a third terminal coupled to provide an over-current output signal indicative of an over-current condition to the host controller. The peripheral bus power controller further includes an enable circuit configured to assert a power enable output signal on the first terminal responsive to receiving the power enable input signal and a first buffer configured to provide the over-current output signal to the host controller responsive to the power controller detecting the over-current condition on the first terminal.

Abstract: A method and system for securing access to a storage device including one or more locked logical sections. The method includes providing an interface device including a first port connected to a computing system and a second port connected to the storage device. Further, the method includes receiving a unique identifier from a wireless device, and deriving a key from the unique identifier. Based on the derived key, the method unlocks a logical section in the storage device. The method may further store access permission rights for the locked logical sections in the interface device and unlock the logical section based on the access permission rights. Moreover, the method may further authenticate the identity of a user of the wireless device for unlocking the storage device.

Abstract: A power controller for a peripheral bus interface. A peripheral bus power controller includes a first terminal, a second terminal coupled to receive an power enable input signal from a host controller, and a third terminal coupled to provide an over-current output signal indicative of an over-current condition to the host controller. The peripheral bus power controller further includes an enable circuit configured to assert a power enable output signal on the first terminal responsive to receiving the power enable input signal and a first buffer configured to provide the over-current output signal to the host controller responsive to the power controller detecting the over-current condition on the first terminal.

Abstract: A USB device may be simultaneously configured and accessed by two or more USB hosts. The USB device may include separate upstream ports and buffers for each host, and a multi-host capable device controller configured to respond to simultaneous USB requests received from more than one host. The USB device may maintain a dedicated address, configuration, and response information for each host. The USB device may include a shared USB function block, and a multi-host controller configured to establish concurrent respective USB connections between the shared USB function block and two or more USB hosts, to allow the two or more USB hosts to simultaneously configure the USB device for the shared USB function. The multi-host controller may be configured to receive and respond to simultaneous respective USB access requests for the shared USB function sent by the two or more USB hosts.

Abstract: A USB device may be simultaneously configured and accessed by two or more USB hosts. The USB device may include separate upstream ports and buffers for each host, and a multi-host capable device controller configured to respond to simultaneous USB requests received from more than one host. The USB device may maintain a dedicated address, configuration, and response information for each host. The USB device may include a shared USB function block, and a multi-host controller configured to establish concurrent respective USB connections between the shared USB function block and two or more USB hosts, to allow the two or more USB hosts to simultaneously configure the USB device for the shared USB function. The multi-host controller may be configured to receive and respond to simultaneous respective USB access requests for the shared USB function sent by the two or more USB hosts.

Abstract: A shared USB device may be simultaneously configured and accessed by two or more USB hosts by using a multi-host capable device controller. The multi-host capable device may include separate upstream ports and buffers for each host, and may be configured with the capability to respond to USB requests from more than one host. The multi-host capable device may maintain a dedicated address, configuration, and response information for each host. Each host may therefore establish a dedicated USB connection with the sharing device without the sharing device having to be re-configured or re-enumerated each and every time the upstream hosts alternate accessing the USB device.