Patents by Inventor Atsuko Sakata

Atsuko Sakata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11978807
    Abstract: Provided is a semiconductor device of the embodiment including: an oxide semiconductor layer; a gate electrode; a first electrode electrically connected to one portion of the oxide semiconductor layer, the first electrode including a first region, second region, a third region, and a fourth region, the first region disposed between the first portion and the second region, the first region disposed between the third region and the fourth region, the first region containing at least one element of In, Zn, Sn or Cd, and oxygen, the second region containing at least one metal element of Ti, Ta, W, or Ru, the third region and the fourth region containing the at least one metal element and oxygen, the third region and the fourth region having an atomic concentration of oxygen higher than that of the second region; and a second electrode electrically connected to another portion of the oxide semiconductor layer.
    Type: Grant
    Filed: October 12, 2022
    Date of Patent: May 7, 2024
    Assignee: Kioxia Corporation
    Inventors: Akifumi Gawase, Atsuko Sakata
  • Publication number: 20240098981
    Abstract: According to one embodiment, a semiconductor device includes a pillar of an oxide semiconductor material and a gate insulating layer that surrounds a side surface of the pillar. The gate insulating layer includes a lower portion, an upper portion, and an intermediate portion. A gate electrode surrounds the intermediate portion of the gate insulating layer. A lower electrode is provided that includes a first oxide conductor portion that is connected to a lower surface of the pillar. An upper electrode is provided connected to an upper surface of the pillar. The gate electrode includes a metal portion containing a metallic element and a first nitrogen-containing portion between the metal portion and the gate insulating layer. The first oxide conductor portion includes a second nitrogen-containing at an interface between the first oxide conductor portion and the gate insulating layer.
    Type: Application
    Filed: August 29, 2023
    Publication date: March 21, 2024
    Inventors: Daichi NISHIKAWA, Daisuke IKENO, Atsuko SAKATA
  • Patent number: 11705404
    Abstract: In one embodiment, a semiconductor device includes a substrate, and a plurality of insulating layers provided on the substrate. The device further includes a plurality of electrode layers provided on the substrate alternately with the plurality of insulating layers and including metal atoms and impurity atoms different from the metal atoms, lattice spacing between the metal atoms in the electrode layers being greater than lattice spacing between the metal atoms in an elemental substance of the metal atoms.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: July 18, 2023
    Assignee: Kioxia Corporation
    Inventors: Satoshi Wakatsuki, Masayuki Kitamura, Atsuko Sakata
  • Publication number: 20230200050
    Abstract: A semiconductor device of embodiments includes: a first electrode; a second electrode; an oxide semiconductor layer between the first electrode and the second electrode; a gate electrode surrounding the oxide semiconductor layer; a gate insulating layer between the gate electrode and the oxide semiconductor layer; a first insulating layer provided between the first electrode and the gate electrode; and a second insulating layer provided between the second electrode and the gate electrode. In a cross section parallel to a first direction from the first electrode to the second electrode, a first portion of the oxide semiconductor layer is provided between the gate insulating layer and the first electrode. In the cross section, a second portion of the oxide semiconductor layer is provided between the gate insulating layer and the second electrode.
    Type: Application
    Filed: June 15, 2022
    Publication date: June 22, 2023
    Applicant: Kioxia Corporation
    Inventors: Akifumi GAWASE, Ha HOANG, Atsuko SAKATA, Yuta KAMIYA, Kazuhiro MATSUO, Keiichi SAWA, Kota TAKAHASHI, Kenichiro TORATANI, Yimin LIU
  • Publication number: 20230030121
    Abstract: Provided is a semiconductor device of the embodiment including: an oxide semiconductor layer; a gate electrode; a first electrode electrically connected to one portion of the oxide semiconductor layer, the first electrode including a first region, second region, a third region, and a fourth region, the first region disposed between the first portion and the second region, the first region disposed between the third region and the fourth region, the first region containing at least one element of In, Zn, Sn or Cd, and oxygen, the second region containing at least one metal element of Ti, Ta, W, or Ru, the third region and the fourth region containing the at least one metal element and oxygen, the third region and the fourth region having an atomic concentration of oxygen higher than that of the second region; and a second electrode electrically connected to another portion of the oxide semiconductor layer.
    Type: Application
    Filed: October 12, 2022
    Publication date: February 2, 2023
    Applicant: Kioxia Corporation
    Inventors: Akifumi GAWASE, Atsuko SAKATA
  • Patent number: 11502204
    Abstract: Provided is a semiconductor device of the embodiment including: an oxide semiconductor layer; a gate electrode; a first electrode electrically connected to one portion of the oxide semiconductor layer, the first electrode including a first region, second region, a third region, and a fourth region, the first region disposed between the first portion and the second region, the first region disposed between the third region and the fourth region, the first region containing at least one element of In, Zn, Sn or Cd, and oxygen, the second region containing at least one metal element of Ti, Ta, W, or Ru, the third region and the fourth region containing the at least one metal element and oxygen, the third region and the fourth region having an atomic concentration of oxygen higher than that of the second region; and a second electrode electrically connected to another portion of the oxide semiconductor layer.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: November 15, 2022
    Assignee: Kioxia Corporation
    Inventors: Akifumi Gawase, Atsuko Sakata
  • Publication number: 20220319842
    Abstract: A substrate processing apparatus includes a chamber to accommodate a substrate. The apparatus includes a stage to support the substrate in the chamber. The apparatus includes an electrode disposed above the stage and containing aluminum. The electrode generates plasma from gas supplied into the chamber to form a first film on the substrate by the plasma. The apparatus further includes a second film formed on a surface of the electrode and containing aluminum and fluorine or containing aluminum and oxygen.
    Type: Application
    Filed: June 20, 2022
    Publication date: October 6, 2022
    Applicant: KIOXIA CORPORATION
    Inventors: Yuya MATSUBARA, Masayuki KITAMURA, Atsuko SAKATA
  • Publication number: 20220302320
    Abstract: Provided is a semiconductor device of the embodiment including: an oxide semiconductor layer; a gate electrode; a first electrode electrically connected to one portion of the oxide semiconductor layer, the first electrode including a first region, second region, a third region, and a fourth region, the first region disposed between the first portion and the second region, the first region disposed between the third region and the fourth region, the first region containing at least one element of In, Zn, Sn or Cd, and oxygen, the second region containing at least one metal element of Ti, Ta, W, or Ru, the third region and the fourth region containing the at least one metal element and oxygen, the third region and the fourth region having an atomic concentration of oxygen higher than that of the second region; and a second electrode electrically connected to another portion of the oxide semiconductor layer.
    Type: Application
    Filed: September 10, 2021
    Publication date: September 22, 2022
    Applicant: Kioxia Corporation
    Inventors: Akifumi GAWASE, Atsuko SAKATA
  • Patent number: 11393675
    Abstract: A substrate processing apparatus includes a chamber to accommodate a substrate. The apparatus includes a stage to support the substrate in the chamber. The apparatus includes an electrode disposed above the stage and containing aluminum. The electrode generates plasma from gas supplied into the chamber to form a first film on the substrate by the plasma. The apparatus further includes a second film formed on a surface of the electrode and containing aluminum and fluorine or containing aluminum and oxygen.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: July 19, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Yuya Matsubara, Masayuki Kitamura, Atsuko Sakata
  • Publication number: 20220195594
    Abstract: A semiconductor manufacturing apparatus includes a reaction chamber configured to perform a process on a semiconductor substrate using a gas mixture comprising a first gas, and a first path configured to exhaust resultant gas that comprises the first gas from the reaction chamber. The semiconductor manufacturing apparatus further includes a first trap provided in the first path and configured to extract at least a portion of the first gas from the resultant gas, and a second path in which the trap is not provided and configured to exhaust the resultant gas from the reaction chamber.
    Type: Application
    Filed: March 9, 2022
    Publication date: June 23, 2022
    Applicant: KIOXIA CORPORATION
    Inventors: Masayuki KITAMURA, Atsuko SAKATA, Satoshi WAKATSUKI
  • Patent number: 11361966
    Abstract: According to one embodiment, a method of manufacturing a semiconductor device includes forming a first film on a substrate. The method further includes forming a second film on the first film. The second film includes fluoride of a first metal element having a first boiling point of 800° C. or higher and fluoride of a second metal element having a second boiling point of 800° C. or higher. The second metal element is different from the first metal element. The method further includes etching the first film using the second film as an etching mask and etching gas that includes fluorine.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: June 14, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Soichi Yamazaki, Kazuhito Furumoto, Kosuke Horibe, Keisuke Kikutani, Atsuko Sakata
  • Patent number: 11296109
    Abstract: A method of manufacturing a semiconductor device according to one embodiment includes forming a first film including a first metal above a processing target member. The method includes forming a second film including two or more types of element out of a second metal, carbon, and boron above the first film. The method includes forming a third film including the first metal above the second film. The method includes forming a mask film by providing an opening part to a stacked film including the first film, the second film and the third film. The method includes processing the processing target member by performing etching using the mask film as a mask.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: April 5, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Ryohei Kitao, Atsuko Sakata, Takeshi Ishizaki, Satoshi Wakatsuki, Shinichi Nakao, Shunsuke Ochiai, Kei Watanabe
  • Patent number: 11177135
    Abstract: A mask member contains tungsten (W), boron (B), and carbon (C). The mask member includes a first portion in contact with a process film, the first portion, in which the terms of the composition ratio, which correspond to boron and carbon, are larger than the term of the composition ratio, which corresponds to tungsten, and a second portion in which the term of the composition ratio, which corresponds to tungsten, is larger than the terms of the composition ratio, which correspond to carbon and boron.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: November 16, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Yuya Matsubara, Masayuki Kitamura, Atsuko Sakata
  • Publication number: 20210233872
    Abstract: In one embodiment, a semiconductor device includes a substrate, and a plurality of insulating layers provided on the substrate. The device further includes a plurality of electrode layers provided on the substrate alternately with the plurality of insulating layers and including metal atoms and impurity atoms different from the metal atoms, lattice spacing between the metal atoms in the electrode layers being greater than lattice spacing between the metal atoms in an elemental substance of the metal atoms.
    Type: Application
    Filed: April 15, 2021
    Publication date: July 29, 2021
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Satoshi WAKATSUKI, Masayuki KITAMURA, Atsuko SAKATA
  • Patent number: 11004804
    Abstract: In one embodiment, a semiconductor device includes a substrate, and a plurality of insulating layers provided on the substrate. The device further includes a plurality of electrode layers provided on the substrate alternately with the plurality of insulating layers and including metal atoms and impurity atoms different from the metal atoms, lattice spacing between the metal atoms in the electrode layers being greater than lattice spacing between the metal atoms in an elemental substance of the metal atoms.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: May 11, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Satoshi Wakatsuki, Masayuki Kitamura, Atsuko Sakata
  • Publication number: 20210087669
    Abstract: A film forming apparatus according to an embodiment includes: a process chamber forming a film on a substrate; an abatement device detoxifying a first exhaust gas exhausted from the process chamber; a first supply pipe for supplying a gas containing water to the process chamber; a first vacuum pump provided in a first flow path of the first exhaust gas between the process chamber and the abatement device; a second vacuum pump provided in the first flow path between the first vacuum pump and the abatement device; and a first detector provided in the first flow path between the second vacuum pump and the abatement device and capable of detecting a hydrogenated gas.
    Type: Application
    Filed: August 26, 2020
    Publication date: March 25, 2021
    Applicant: Kioxia Corporation
    Inventors: Yuta KONNO, Toshihiko Nagase, Atsuko Sakata, Kohei Nagata, Ryohei Kitao, Akifumi Gawase, Takeshi Iwasaki
  • Publication number: 20210020439
    Abstract: According to one embodiment, a method of manufacturing a semiconductor device includes forming a first film on a substrate. The method further includes forming a second film on the first film. The second film includes fluoride of a first metal element having a first boiling point of 800° C. or higher and fluoride of a second metal element having a second boiling point of 800° C. or higher. The second metal element is different from the first metal element. The method further includes etching the first film using the second film as an etching mask and etching gas that includes fluorine.
    Type: Application
    Filed: February 27, 2020
    Publication date: January 21, 2021
    Applicant: KIOXIA CORPORATION
    Inventors: Soichi YAMAZAKI, Kazuhito FURUMOTO, Kosuke HORIBE, Keisuke KIKUTANI, Atsuko SAKATA
  • Patent number: 10892300
    Abstract: A storage device according to embodiments includes a first conductive layer; a second conductive layer; a resistance change element provided between the first conductive layer and the second conductive layer; and an intermediate layer provided in any one of a position between the resistance change element and the first conductive layer and a position between the resistance change element and the second conductive layer, the intermediate layer containing at least one element of silicon (Si) and germanium (Ge), tellurium (Te), and aluminum (Al).
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: January 12, 2021
    Assignee: Toshiba Memory Corporation
    Inventors: Takanori Usami, Takeshi Ishizaki, Ryohei Kitao, Katsuyoshi Komatsu, Takeshi Iwasaki, Atsuko Sakata
  • Patent number: 10833265
    Abstract: According to one embodiment, a storage device includes a first conductive layer, a second conductive layer, a resistance-variable layer, between the first conductive layer and the second conductive layer, that includes germanium, antimony, and tellurium, a first layer, between the resistance-variable layer and the first conductive layer, that includes carbon, a second layer, between the resistance-variable layer and the second conductive layer, that includes carbon, a third layer, between the resistance-variable layer and the first layer, that includes at least one of tungsten nitride or tungsten carbide, and a fourth layer, between the resistance-variable layer and the second layer, that includes at least one of tungsten nitride or tungsten carbide.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: November 10, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Daisuke Ikeno, Akihiro Kajita, Atsuko Sakata
  • Publication number: 20200303641
    Abstract: According to one embodiment, a storage device includes a first conductive layer, a second conductive layer, a resistance-variable layer, between the first conductive layer and the second conductive layer, that includes germanium, antimony, and tellurium, a first layer, between the resistance-variable layer and the first conductive layer, that includes carbon, a second layer, between the resistance-variable layer and the second conductive layer, that includes carbon, a third layer, between the resistance-variable layer and the first layer, that includes at least one of tungsten nitride or tungsten carbide, and a fourth layer, between the resistance-variable layer and the second layer, that includes at least one of tungsten nitride or tungsten carbide.
    Type: Application
    Filed: August 29, 2019
    Publication date: September 24, 2020
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Daisuke IKENO, Akihiro KAJITA, Atsuko SAKATA