Patents by Inventor Atsunori Kajiki
Atsunori Kajiki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20130001767Abstract: A method for manufacturing a package, includes preparing a substrate having a first surface on which a connecting pad is formed, mounting a sacrificing material on the connecting pad, forming a package portion covering the first surface of the substrate, exposing the sacrificing material from a surface of the package portion, and removing the exposed sacrificing material from the side of the surface of the package portion, and forming an opening portion in the package portion on the connecting pad.Type: ApplicationFiled: June 27, 2012Publication date: January 3, 2013Applicant: Shinko Electric Industries Co., Ltd.Inventor: Atsunori KAJIKI
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Patent number: 8208268Abstract: A semiconductor apparatus includes: first electronic components; a first circuit board, including first electronic component mounting pads on which the first electronic components are mounted; and a second circuit board located above the first circuit board, wherein the first electronic component mounting pads are arranged on a first face of the first circuit board, opposite the second circuit board, and the first circuit board and the second circuit board are electrically connected by internal connection terminals located between the first circuit board and the second circuit board, and wherein a recessed portion is formed in the second circuit board, opposite the first electronic components, in order to provide space to accommodate portions of the first electronic components.Type: GrantFiled: November 25, 2008Date of Patent: June 26, 2012Assignee: Shinko Electric Industries Co., Ltd.Inventors: Atsunori Kajiki, Sadakazu Akaike, Takashi Tsubota, Norio Yamanishi
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Patent number: 8106495Abstract: A semiconductor apparatus includes a first wiring substrate, a second wiring substrate, a semiconductor chip, an adhesive layer and a molding resin. The second wiring substrate is stacked and connected on the first wiring substrate through a bump electrode. The semiconductor chip is mounted on the first wiring substrate by flip chip bonding and received between the first wiring substrate and the second wiring substrate. An upper surface of the semiconductor chip is subject to a mirror treatment. The adhesive layer is formed on the upper surface of the semiconductor chip. The molding resin is filled in a gap between the first wiring substrate and the second wiring substrate.Type: GrantFiled: December 16, 2009Date of Patent: January 31, 2012Assignee: Shinko Electric Industries Co., Ltd.Inventor: Atsunori Kajiki
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Patent number: 7911042Abstract: A package includes: a package body including a substrate, an electronic component mounted on a first surface of the substrate, and a sealing resin layer for sealing the electronic component; and a shield case for covering the sealing resin layer, the shield case being made of metal and having an inverted U-shape in a cross-sectional view, wherein a bent part of the shield case is formed in such a manner that at least a part of an end of the shield case is bent toward a second surface of the substrate opposite to the first surface, and the bent part abuts on the second surface so that the shield case is attached to the substrate.Type: GrantFiled: December 7, 2007Date of Patent: March 22, 2011Assignee: Shinko Electric Industries Co., Ltd.Inventors: Yuya Yoshino, Akinobu Inoue, Atsunori Kajiki, Sadakazu Akaike, Norio Yamanishi, Takashi Tsubota
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Publication number: 20100148332Abstract: A semiconductor apparatus includes a first wiring substrate, a second wiring substrate, a semiconductor chip, an adhesive layer and a molding resin. The second wiring substrate is stacked and connected on the first wiring substrate through a bump electrode. The semiconductor chip is mounted on the first wiring substrate by flip chip bonding and received between the first wiring substrate and the second wiring substrate. An upper surface of the semiconductor chip is subject to a mirror treatment. The adhesive layer is formed on the upper surface of the semiconductor chip. The molding resin is filled in a gap between the first wiring substrate and the second wiring substrate.Type: ApplicationFiled: December 16, 2009Publication date: June 17, 2010Applicant: Shinko Electric Industries Co., Ltd.Inventor: Atsunori Kajiki
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Patent number: 7598608Abstract: There is provided a mounting substrate on which a semiconductor chip is mounted using a flip chip bonding, having a plurality of connection pads which are connected to the semiconductor chip, and an insulation layer formed in such a manner as to cover the connection pads partially, wherein the insulation layer includes a first insulation layer which is formed in such a manner as to correspond to a center of the semiconductor chip and a second insulation layer which is formed in such a manner as to surround the first insulation layer, and wherein the plurality of connection pads include first connection pads which are partially covered by the first insulation layer and second connection pads which are partially covered by the second insulation layer.Type: GrantFiled: April 18, 2007Date of Patent: October 6, 2009Assignee: Shinko Electric Industries Co., Ltd.Inventors: Yuji Kunimoto, Atsunori Kajiki
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Publication number: 20090146314Abstract: A semiconductor device includes a first wiring board having a semiconductor element connection pad; a semiconductor element connected to the semiconductor element connection pad; and a second wiring board facing the semiconductor element and the first wiring board, the second wiring board being electrically connect to the first wiring board. The semiconductor element includes an electrode configured to electrically connect a first surface of the semiconductor element and a second surface of the semiconductor element to each other. The first surface of the semiconductor element faces the first wiring board. The second surface of the semiconductor element faces the second wiring board. The first wiring board and the second wiring board are electrically connected to each other via the electrode.Type: ApplicationFiled: November 10, 2008Publication date: June 11, 2009Inventors: Sadakazu Akaike, Atsunori Kajiki, Takashi Tsubota, Norio Yamanishi
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Publication number: 20090135575Abstract: A semiconductor apparatus includes: first electronic components; a first circuit board, including first electronic component mounting pads on which the first electronic components are mounted; and a second circuit board located above the first circuit board, wherein the first electronic component mounting pads are arranged on a first face of the first circuit board, opposite the second circuit board, and the first circuit board and the second circuit board are electrically connected by internal connection terminals located between the first circuit board and the second circuit board, and wherein a recessed portion is formed in the second circuit board, opposite the first electronic components, in order to provide space to accommodate portions of the first electronic components.Type: ApplicationFiled: November 25, 2008Publication date: May 28, 2009Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Atsunori KAJIKI, Sadakazu Akaike, Takashi Tsubota, Norio Yamanishi
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Patent number: 7514772Abstract: A resin layer in which adhesion to a conductive film is higher than that of a sealing resin to the conductive film is disposed on the sealing resin in which it is difficult to form the conductive film, and wiring patterns electrically connected to electronic components are disposed on the resin layer.Type: GrantFiled: April 25, 2006Date of Patent: April 7, 2009Assignee: Shinko Electric Industries Co., Ltd.Inventors: Tomoki Kobayashi, Toshiji Shimada, Akinobu Inoue, Atsunori Kajiki, Hiroyuki Kato, Hiroshi Shimizu
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Publication number: 20080165513Abstract: It is an electronic component built-in substrate 100 configured as follows. That is, an electronic component 30 is provided between at least two boards 10 and 20. An electrode 34 of the electronic component 30 is electrically connected to at least one of the board 10. Also, the boards 10 and 20 are electrically connected to each other. Additionally, the gap between the boards 10 and 20 is sealed with a resin. The electronic component built-in substrate 100 is featured in that a solder ball 40 for electrically connecting the boards 10 and 20 to each other is provided on a surface of the electronic component 30, which faces the other board 20.Type: ApplicationFiled: December 17, 2007Publication date: July 10, 2008Inventors: Akinobu Inoue, Sadakazu Akaike, Atsunori Kajiki, Yuya Yoshino, Takashi Tsubota, Norio Yamanishi
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Publication number: 20080157296Abstract: A package includes: a package body including a substrate, an electronic component mounted on a first surface of the substrate, and a sealing resin layer for sealing the electronic component; and a shield case for covering the sealing resin layer, the shield case being made of metal and having an inverted U-shape in a cross-sectional view, wherein a bent part of the shield case is formed in such a manner that at least a part of an end of the shield case is bent toward a second surface of the substrate opposite to the first surface, and the bent part abuts on the second surface so that the shield case is attached to the substrate.Type: ApplicationFiled: December 7, 2007Publication date: July 3, 2008Inventors: Yuya Yoshino, Akinobu Inoue, Atsunori Kajiki, Sadakazu Akaike, Norio Yamanishi, Takashi Tsubota
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Publication number: 20070252286Abstract: There is provided a mounting substrate on which a semiconductor chip is mounted using a flip chip bonding, having a plurality of connection pads which are connected to the semiconductor chip, and an insulation layer formed in such a manner as to cover the connection pads partially, wherein the insulation layer includes a first insulation layer which is formed in such a manner as to correspond to a center of the semiconductor chip and a second insulation layer which is formed in such a manner as to surround the first insulation layer, and wherein the plurality of connection pads include first connection pads which are partially covered by the first insulation layer and second connection pads which are partially covered by the second insulation layer.Type: ApplicationFiled: April 18, 2007Publication date: November 1, 2007Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Yuji Kunimoto, Atsunori Kajiki
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Patent number: 7261596Abstract: A semiconductor device is disclosed that comprises a board, a ground terminal disposed on the board, a connection terminal disposed on the board, a semiconductor chip mounted on the board, and a shield member electrically connected to the ground terminal. The semiconductor chip, the ground terminal, and the connection terminal are disposed on one side of the board, and the shield member is disposed directly on and covers the other side of the board.Type: GrantFiled: December 27, 2005Date of Patent: August 28, 2007Assignee: Shinko Electric Industries Co., Ltd.Inventors: Sadakazu Akaike, Akinobu Inoue, Atsunori Kajiki, Hiroyuki Takatsu, Takashi Tsubota, Norio Yamanishi
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Publication number: 20060244131Abstract: A resin layer in which adhesion to a conductive film is higher than that of a sealing resin to the conductive film is disposed on the sealing resin in which it is difficult to form the conductive film, and wiring patterns electrically connected to electronic components are disposed on the resin layer.Type: ApplicationFiled: April 25, 2006Publication date: November 2, 2006Applicant: Shinko Electric Industries Co., Ltd.Inventors: Tomoki Kobayashi, Toshiji Shimada, Akinobu Inoue, Atsunori Kajiki, Hiroyuki Kato, Hiroshi Shimizu
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Publication number: 20060148317Abstract: A semiconductor device is disclosed that comprises a board, a ground terminal disposed on the board, a connection terminal disposed on the board, a semiconductor chip mounted on the board, and a shield member electrically connected to the ground terminal. The semiconductor chip, the ground terminal, and the connection terminal are disposed on one side of the board, and the shield member is disposed directly on and covers the other side of the board.Type: ApplicationFiled: December 27, 2005Publication date: July 6, 2006Inventors: Sadakazu Akaike, Akinobu Inoue, Atsunori Kajiki, Hiroyuki Takatsu, Takashi Tsubota, Norio Yamanishi
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Publication number: 20060125077Abstract: A semiconductor device is provided that includes a semiconductor chip, a substrate on which the semiconductor chip is mounted, a mounting terminal that is arranged on a first side of the substrate, and a testing terminal that is arranged on a second side of the substrate which second side is opposite the first side of the substrate.Type: ApplicationFiled: December 1, 2005Publication date: June 15, 2006Inventors: Sadakazu Akaike, Akinobu Inoue, Atsunori Kajiki, Hiroyuki Takatsu, Takashi Tsubota, Norio Yamanishi
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Publication number: 20060113642Abstract: A semiconductor device is disclosed that includes a substrate, electronic components that are arranged at an electronic components mounting area of the substrate, a ground terminal that is arranged within the electronic components mounting area, transfer molded resin that covers the electronic components while exposing the ground terminal, a shield member that covers the electronic components and is connected to the ground terminal, and conductive adhesive that realizes electrical connection between the ground terminal and the shield member.Type: ApplicationFiled: October 13, 2005Publication date: June 1, 2006Inventors: Atsunori Kajiki, Hiroyuki Takatsu, Takashi Tsubota, Norio Yamanishi, Sadakazu Akaike, Akinobu Inoue
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Publication number: 20060113679Abstract: A semiconductor device includes a semiconductor chip, wirings, a substrate electrically connected to the semiconductor chip via the wirings and a plurality of discrete parts provided on a part of the substrate. The part is located closer to the center of the substrate than a wiring disposing area where the wirings are disposed.Type: ApplicationFiled: November 28, 2005Publication date: June 1, 2006Inventors: Hiroyuki Takatsu, Atsunori Kajiki, Takashi Tsubota, Norio Yamanishi, Sadakazu Akaike, Akinobu Inoue
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Publication number: 20040235287Abstract: A method of manufacturing a semiconductor package includes the steps of: forming, on one side of polyimide film (insulating substrate), a first metal wiring layer (first conductive pattern) having a first pad; forming, on the other side of the polyimide film, a fourth metal wiring layer (second conductive pattern) having a second pad; forming, on the polyimide film, a first solder resist layer having an opening of a size sufficient to expose all side surfaces of the first pad; electrically connecting a semiconductor element to the first pad through a first solder bump; filling insulating adhesive into a space between the polyimide film and the semiconductor element; and bonding a second solder bump with the second pad by heating the second solder bump.Type: ApplicationFiled: April 30, 2004Publication date: November 25, 2004Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Akinobu Inoue, Atsunori Kajiki, Norio Yamanishi, Takashi Tsubota, Hiroyuki Takatsu
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Publication number: 20040078966Abstract: A method of mounting electronic parts, on a wiring board, is provided in which a bare chip is bonded to connecting pads via thin solder layers by means of flip chip bonding and at least another soldered part is soldered to a mounting pad on the board via a thin solder layer. First, adhesive resin layers are formed on the connecting pads and the mounting pad. Solder particles are scattered so that the solder particles temporarily adhere to the connecting pads and the mounting pad. The soldering part is put on the mounting pad and a reflow process is conducted so that the solder particles are made to reflow to pre-coat the connecting pads with a thin solder layer and, simultaneously, the soldered part is mounted on the mounting pad via solder. Finally, the bare chip is positioned on the thin solder layer of the connecting pads and a flip-chip bonding process is conducted by which the bare chip is flip-chip bonded to the connecting pads.Type: ApplicationFiled: October 17, 2003Publication date: April 29, 2004Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Atsunori Kajiki