Patents by Inventor Atsuo Tsunoda
Atsuo Tsunoda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20150214424Abstract: A nitride semiconductor light emitting device includes a conductive substrate, a first metal layer, a second conductivity-type semiconductor layer, an emission layer, and a first conductivity-type semiconductor layer in this order. The nitride semiconductor light emitting device additionally has an insulating layer covering at least side surfaces of the second conductivity-type semiconductor layer, the emission layer and the first conductivity-type semiconductor layer. A method of manufacturing the same is provided. The nitride semiconductor light emitting device may further include a second metal layer. Thus, a reliable nitride semiconductor light emitting device and a method of manufacturing the same are provided in which short-circuit at the PN junction portion and current leak is reduced as compared with the conventional examples.Type: ApplicationFiled: April 10, 2015Publication date: July 30, 2015Applicant: Sharp Kabushiki KaishaInventors: Mayuko FUDETA, Atsuo TSUNODA
-
Patent number: 9029884Abstract: A nitride semiconductor light emitting device includes a conductive substrate, a first metal layer, a second conductivity-type semiconductor layer, an emission layer, and a first conductivity-type semiconductor layer in this order. The nitride semiconductor light emitting device additionally has an insulating layer covering at least side surfaces of the second conductivity-type semiconductor layer, the emission layer and the first conductivity-type semiconductor layer. A method of manufacturing the same is provided. The nitride semiconductor light emitting device may further include a second metal layer. Thus, a reliable nitride semiconductor light emitting device and a method of manufacturing the same are provided in which short-circuit at the PN junction portion and current leak is reduced as compared with the conventional examples.Type: GrantFiled: September 12, 2012Date of Patent: May 12, 2015Assignee: Sharp Kabushiki KaishaInventors: Mayuko Fudeta, Atsuo Tsunoda
-
Publication number: 20130001634Abstract: A nitride semiconductor light emitting device includes a conductive substrate, a first metal layer, a second conductivity-type semiconductor layer, an emission layer, and a first conductivity-type semiconductor layer in this order. The nitride semiconductor light emitting device additionally has an insulating layer covering at least side surfaces of the second conductivity-type semiconductor layer, the emission layer and the first conductivity-type semiconductor layer. A method of manufacturing the same is provided. The nitride semiconductor light emitting device may further include a second metal layer. Thus, a reliable nitride semiconductor light emitting device and a method of manufacturing the same are provided in which short-circuit at the PN junction portion and current leak is reduced as compared with the conventional examples.Type: ApplicationFiled: September 12, 2012Publication date: January 3, 2013Applicant: SHARP KABUSHIKI KAISHAInventors: Mayuko FUDETA, Atsuo Tsunoda
-
Patent number: 8324639Abstract: A nitride semiconductor light emitting device includes a conductive substrate, a first metal layer, a second conductivity-type semiconductor layer, an emission layer, and a first conductivity-type semiconductor layer in this order. The nitride semiconductor light emitting device additionally has an insulating layer covering at least side surfaces of the second conductivity-type semiconductor layer, the emission layer and the first conductivity-type semiconductor layer. A method of manufacturing the same is provided. The nitride semiconductor light emitting device may further include a second metal layer. Thus, a reliable nitride semiconductor light emitting device and a method of manufacturing the same are provided in which short-circuit at the PN junction portion and current leak is reduced as compared with the conventional examples.Type: GrantFiled: August 6, 2007Date of Patent: December 4, 2012Assignee: Sharp Kabushiki KaishaInventors: Mayuko Fudeta, Atsuo Tsunoda
-
Patent number: 7611992Abstract: A semiconductor light emitting element including a conductive substrate, a bonding metal layer formed on the conductive substrate, a barrier layer formed on the bonding metal layer, a reflective layer formed on the barrier layer, an ohmic electrode layer formed on the reflective layer, a second conductivity type semiconductor layer formed on the ohmic electrode layer, a light emitting layer formed on the second conductivity type semiconductor layer, and a first conductivity type semiconductor layer formed on the light emitting layer, wherein outer peripheries of the second conductivity type semiconductor layer, the light emitting layer, and the first conductivity type semiconductor layer are removed, and a method of manufacturing the same are provided.Type: GrantFiled: November 19, 2007Date of Patent: November 3, 2009Assignee: Sharp Kabushiki KaishaInventor: Atsuo Tsunoda
-
Publication number: 20080116472Abstract: A semiconductor light emitting element including a conductive substrate, a bonding metal layer formed on the conductive substrate, a barrier layer formed on the bonding metal layer, a reflective layer formed on the barrier layer, an ohmic electrode layer formed on the reflective layer, a second conductivity type semiconductor layer formed on the ohmic electrode layer, a light emitting layer formed on the second conductivity type semiconductor layer, and a first conductivity type semiconductor layer formed on the light emitting layer, wherein outer peripheries of the second conductivity type semiconductor layer, the light emitting layer, and the first conductivity type semiconductor layer are removed, and a method of manufacturing the same are provided.Type: ApplicationFiled: November 19, 2007Publication date: May 22, 2008Applicant: SHARP KABUSHIKI KAISHAInventor: Atsuo TSUNODA
-
Patent number: 7371595Abstract: A method for manufacturing a semiconductor laser device is provided in which deformation of a cap layer and a third cladding layer is inhibited and a protruding portion of an intermediate layer is removed. By coating outer peripheral portions facing an intermediate layer of a third cladding layer and an etching stop layer with a resist, inevitably removing at least the third cladding layer, and etching the intermediate layer and a cap layer in a second etching step, a protruding portion of the intermediate layer is removed, and the cap layer is prevented from being etched undesirably, whereby a ridge portion without irregularities with respect to a direction substantially perpendicular to a lamination direction is produced, and increase of an operation voltage and decrease of external differential quantum efficiency are prevented.Type: GrantFiled: October 28, 2005Date of Patent: May 13, 2008Assignee: Sharp Kabushiki KaishaInventors: Atsuo Tsunoda, Akiyoshi Sugahara
-
Publication number: 20080035949Abstract: A nitride semiconductor light emitting device includes a conductive substrate, a first metal layer, a second conductivity-type semiconductor layer, an emission layer, and a first conductivity-type semiconductor layer in this order. The nitride semiconductor light emitting device additionally has an insulating layer covering at least side surfaces of the second conductivity-type semiconductor layer, the emission layer and the first conductivity-type semiconductor layer. A method of manufacturing the same is provided. The nitride semiconductor light emitting device may further include a second metal layer. Thus, a reliable nitride semiconductor light emitting device and a method of manufacturing the same are provided in which short-circuit at the PN junction portion and current leak is reduced as compared with the conventional examples.Type: ApplicationFiled: August 6, 2007Publication date: February 14, 2008Applicant: SHARP KABUSHIKI KAISHAInventors: Mayuko Fudeta, Atsuo Tsunoda
-
Patent number: 7084433Abstract: In this semiconductor laser device, an InGaP etching block layer 11 as an etching selection layer having etching selectivity for an n-type AlInP current block layer 10, which is a non-optical-absorption layer, is formed on the n-type current block layer 10. Since this etching block layer 11 prevents the current block layer 10 on both sides of a ridge 20 from being etched during manufacture, a contact layer 12 can be prevented from entering gaps between the sides of this ridge 20 and the current block layer 10. Therefore, light oscillating in an active layer 4 is taken out from a device end surface without being absorbed in the contact layer 12. According to this semiconductor laser device, an oscillation threshold current and an operation current can be maintained low, deterioration of differential quantum efficiency can be prevented and reliability can be improved.Type: GrantFiled: March 4, 2003Date of Patent: August 1, 2006Assignee: Sharp Kabushiki KaishaInventors: Hiroyuki Hosoba, Atsuo Tsunoda, Hiroshi Hayashi
-
Publication number: 20060094141Abstract: A method for manufacturing a semiconductor laser device is provided in which deformation of a cap layer and a third cladding layer is inhibited and a protruding portion of an intermediate layer is removed. By coating outer peripheral portions facing an intermediate layer of a third cladding layer and an etching stop layer with a resist, inevitably removing at least the third cladding layer, and etching the intermediate layer and a cap layer in a second etching step, a protruding portion of the intermediate layer is removed, and the cap layer is prevented from being etched undesirably, whereby a ridge portion without irregularities with respect to a direction substantially perpendicular to a lamination direction is produced, and increase of an operation voltage and decrease of external differential quantum efficiency are prevented.Type: ApplicationFiled: October 28, 2005Publication date: May 4, 2006Applicant: SHARP KABUSHIKI KAISHAInventors: Atsuo Tsunoda, Akiyoshi Sugahara
-
Patent number: 6999488Abstract: A ridge section constructed of a p-type second AlGaInP clad layer 8, a p-type GaInP interlayer 9 and a p-type GaAs cap layer 10 is formed on an etching stop layer 7. A step of not smaller than 0.13 ?m is formed between the p-type interlayer 9 and the p-type second clad layer 8 by making the p-type interlayer 9 protrude in both widthwise directions beyond the p-type second clad layer 8. With this step, AlInP layers can be formed separately from each other on both sides of the ridge section and on the ridge section. Therefore, when the AlInP layer on the ridge section is removed by etching, an AlInP current constriction layer 13 located on both sides of the ridge section is reliably protected by a resist film and not over-etched. The AlInP current constriction layer 13 effectively puts a current constriction function into effect, so that a semiconductor laser device of low-threshold current and low-power consumption is obtained.Type: GrantFiled: June 25, 2003Date of Patent: February 14, 2006Assignee: Sharp Kabushiki KaishaInventor: Atsuo Tsunoda
-
Publication number: 20050100067Abstract: A ridge section constructed of a p-type second AlGaInP clad layer 8, a p-type GaInP interlayer 9 and a p-type GaAs cap layer 10 is formed on an etching stop layer 7. A step of not smaller than 0.13 ?m is formed between the p-type interlayer 9 and the p-type second clad layer 8 by making the p-type interlayer 9 protrude in both widthwise directions beyond the p-type second clad layer 8. With this step, AlInP layers can be formed separately from each other on both sides of the ridge section and on the ridge section. Therefore, when the AlInP layer on the ridge section is removed by etching, an AlInP current constriction layer 13 located on both sides of the ridge section is reliably protected by a resist film and not over-etched. The AlInP current constriction layer 13 effectively puts a current constriction function into effect, so that a semiconductor laser device of low-threshold current and low-power consumption is obtained.Type: ApplicationFiled: June 25, 2003Publication date: May 12, 2005Applicant: SHARP KABUSHIKI KAISHAInventor: Atsuo Tsunoda
-
Patent number: 6870870Abstract: The present invention relates to a ridge-stripe semiconductor laser device and a process for producing the same. More specifically, the object of the present invention is to control the formation of cavities at the side of the ridge without adding any step, and to provide a ridge stripe semiconductor laser device with good properties by strictly controlling its ridge width and a process for producing the same. Thereby, it is possible to form a ridge whose sidewalls stand almost vertically.Type: GrantFiled: June 11, 2002Date of Patent: March 22, 2005Assignee: Sharp Kabushiki KaishaInventors: Masahiko Sakata, Atsuo Tsunoda
-
Patent number: 6738402Abstract: By using a single semiconductor laser device, laser beams in infrared and red regions are generated at a distance between close light emitting spots. A semiconductor laser resonator having an oscillation wavelength in an infrared region and a semiconductor laser resonator having an oscillation wavelength in a red region are formed in parallel on the same semiconductor substrate.Type: GrantFiled: February 7, 2000Date of Patent: May 18, 2004Assignee: Sharp Kabushiki KaishaInventors: Masahiro Hosoda, Tadashi Takeoka, Atsuo Tsunoda
-
Publication number: 20030169793Abstract: In this semiconductor laser device, an InGaP etching block layer 11 as an etching selection layer having etching selectivity for an n-type AlInP current block layer 10, which is a non-optical-absorption layer, is formed on the n-type current block layer 10. Since this etching block layer 11 prevents the current block layer 10 on both sides of a ridge 20 from being etched during manufacture, a contact layer 12 can be prevented from entering gaps between the sides of this ridge 20 and the current block layer 10. Therefore, light oscillating in an active layer 4 is taken out from a device end surface without being absorbed in the contact layer 12. According to this semiconductor laser device, an oscillation threshold current and an operation current can be maintained low, deterioration of differential quantum efficiency can be prevented and reliability can be improved.Type: ApplicationFiled: March 4, 2003Publication date: September 11, 2003Applicant: SHARP KABUSHIKI KAISHAInventors: Hiroyuki Hosoba, Atsuo Tsunoda, Hiroshi Hayashi
-
Patent number: 6518159Abstract: An object of the present invention is provide an InGaAlP-based semiconductor layer of a good crystal quality at a higher temperature up to a re-evaporating temperature by MBE process. A buffer layer made of GaAs and a buffer layer made of GaInP are formed by MBE (molecular beam epitaxy) process on a GaAs substrate having a facet, which is to be a main facet, inclined by &thgr; in [011] direction from (100) facet. Then semiconductor layers are formed by MBE process so as to include cladding layers having a bandgap Egc and an AlGaInP active layer having a bandgap Ega which is adjusted by an amount of III-group element to be represented by Ega<Egc. The semiconductor laser device has a ridge stripe extending in [01-1] direction.Type: GrantFiled: October 19, 2000Date of Patent: February 11, 2003Assignee: Sharp Kabushiki KaishaInventor: Atsuo Tsunoda
-
Publication number: 20020187577Abstract: The present invention relates to a ridge-stripe semiconductor laser device and a process for producing the same. More specifically, the object of the present invention is to control the formation of cavities at the side of the ridge without adding any step, and to provide a ridge stripe semiconductor laser device with good properties by strictly controlling its ridge width and a process for producing the same. Thereby, it is possible to form a ridge whose sidewalls stand almost vertically.Type: ApplicationFiled: June 11, 2002Publication date: December 12, 2002Applicant: SHARP KABUSHIKI KAISHAInventors: Masahiko Sakata, Atsuo Tsunoda
-
Patent number: 6141514Abstract: A product, such as a process cartridge, is provided with a plurality of functional units that can be easily disassembled so as to be recycled. The product is constructed to have an equipment body having an attachment member in which to hold the functional units. A joint section portion of the attachment member has a through-slit provided which can be broken off and thereby facilitate removal of the respective functional units.Type: GrantFiled: December 22, 1998Date of Patent: October 31, 2000Assignee: Canon Kabushiki KaishaInventors: Ryohei Inaba, Tomomasa Nakano, Atsuo Tsunoda
-
Patent number: 5360762Abstract: On a GaAs substrate (Al.sub.Y Ga.sub.1-Y).sub.0.5 In.sub.0.5 P crystal layers (0.ltoreq.Y.ltoreq.1) is formed to be lattice-matched with the substrate. By radiating As molecular beams on the surface of the crystal layers while heating the layered substrate to a temperature at which In in the crystal layers evaporates, the portion near the surface of the crystal layers is changed into an Al.sub.Y Ga.sub.1-Y As crystal layer (0.ltoreq.Y.ltoreq.1) of a thickness of several molecules, on which layer an Al.sub.X Ga.sub.1-X As crystal layer (0.ltoreq.X.ltoreq.1) is formed. Since the surface of the Al.sub.Y Ga.sub.1-Y As crystal layer has been purl fled, the formed Al.sub.X Ga.sub.1-X As crystal layer has a high crystallinity, allowing production of a light emitting diode, a semiconductor laser device and the like with high efficiency.Type: GrantFiled: June 21, 1993Date of Patent: November 1, 1994Assignee: Sharp Kabushiki KaishaInventors: Kosei Takahashi, Masahiro Hosoda, Atsuo Tsunoda, Takahiro Suyama, Sadayoshi Matsui
-
Patent number: 5337326Abstract: A semiconductor laser device includes a substrate; a double hetero structure having an n-type cladding layer, an active layer, and a p-type cladding layer, which is formed on an upper face of the substrate; and electrodes formed on a lower face of the substrate and on an upper face of the double hetero structure, wherein the double hetero structure further includes a p-type hetero-barrier layer formed between the p-type cladding layer and the active layer, which is strained by compression due to a lattice mismatch.Type: GrantFiled: September 29, 1992Date of Patent: August 9, 1994Assignee: Sharp Kabushiki KaishaInventors: Yasuo Kan, Kosei Takahashi, Masahiro Hosoda, Atsuo Tsunoda, Kentaro Tani, Masanori Watanabe