Patents by Inventor Atsushi Hatakeyama
Atsushi Hatakeyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20090103005Abstract: It is to provide a light source module capable of downsizing an edge-light type backlight in thickness and reducing the usage amount of resin. A method of manufacturing a light source module includes a process of preparing a substrate with a first reflector including a reflecting surface mounted thereon, a process of mounting a plurality of light emitting elements on the substrate, a process of mounting a wiring board having an electrode on the substrate, a process of connecting the electrode of the light emitting element and the electrode of the wiring board with metal wire, a process of mounting a second reflector having a reflecting surface on the wiring board, and a process of filling the space between the first reflector and the second reflector, with resin.Type: ApplicationFiled: October 21, 2008Publication date: April 23, 2009Inventors: Norio NAKAZATO, Kimihiko SUDO, Hiroshi Akai, Naoki Yotsumoto, Hiroshi Oyama, Shigeyuki Sasaki, Atsushi Hatakeyama, Takaaki Maruyama, Kouichi Tanabe
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Publication number: 20090033876Abstract: An illuminator includes a color composition prism (24) consisting of first to third prisms (21-23), a red light emitting diode (1), a blue light emitting diode (2) and a green light emitting diode (3) emitting three light beams having different spectrum intervals, a first optical thin film (31) formed on the surface of the first prism (21) opposing the second prism (22) and having a cutoff wavelength between red and green, and a second optical thin film (32) formed on the surface of the second prism (22) opposing the third prism (23) and having a cutoff wavelength between blue and green. Consequently, it is possible to provide an illuminator that can conduct a color composition in which an optical loss at the time of color composition and a color unevenness occurring on the optical thin film due to the incident angle dependency are decreased even for natural light not under a polarization control.Type: ApplicationFiled: July 25, 2006Publication date: February 5, 2009Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Yusaku Shimaoka, Atsushi Hatakeyama
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Publication number: 20090031321Abstract: A business process management computer, when the load of a service execution computer etc. is increased, determines the condition of a service call step which is calling a service execution unit, etc. of said service execution computer, etc. If said condition is the bottleneck condition, it determines the condition of the service call step in other process which is calling said service execution unit, etc. If there is no condition other than the bottleneck in that condition, the addition of the resource for said service execution computer, etc. is determined and if there is a condition in which the throughput can be limited, it is determined that the throughput should be limited. In a process which is configured with a plurality of service call steps, when the resource insufficiency has occurred, a means to make the adequate addition of the resource possible can be provided.Type: ApplicationFiled: February 7, 2008Publication date: January 29, 2009Inventors: Takashi ISHIZAWA, Atsushi Hatakeyama, Naotsugu Toume, Ryo Kawai
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Publication number: 20090014366Abstract: A drinking water device including a water storage section that stores drinking water inside an installation type casing; a water outlet that is connected to the water storage section via a passage and is located outside the casing; filtering device that is provided in the passage on further upstream side of the water outlet so as to be freely attachable/detachable; and a flow rate switch, which is provided between the water storage section and the water outlet and which is capable of detecting flow rate of the drinking water and also capable of outputting an actuating signal upon detecting the flow rate within a preset flow rate range.Type: ApplicationFiled: February 14, 2007Publication date: January 15, 2009Applicant: MRC Home Products Co., LtdInventors: Hatsumi Takeda, Atsushi Hatakeyama, Futomitsu Horiuchi, Hiroki Sakakibara
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Publication number: 20080103796Abstract: A format conversion decision definition generating unit 104 stores information whether or not a response message format from a service unit 134 may be utilized in all later service callings of a business process without format conversion in a repository 121 as format conversion decision information 127, by referring to business process definition information 105 and adapter definition information 106. Then, when a business process operation control unit 132 executes the business process, an adapter operation control unit 133 refers to the format conversion decision information 127 about a target service 134 at the time, and skips the format conversion when information indicating that the format conversion is unnecessary is stored in the format conversion decision information 127.Type: ApplicationFiled: June 22, 2007Publication date: May 1, 2008Applicant: Hitachi, Ltd.Inventors: Ryo Kawai, Jun Yoshida, Mitsunobu Tasaka, Atsushi Hatakeyama
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Patent number: 7365721Abstract: The present invention provides an inexpensive projection display that allows a pixel grid as ineffective portions of respective pixels of a light valve to be made inconspicuous. The projection display includes a birefringent element (43) for spatially separating light from a transmission liquid crystal light valve (39). The birefringent element (43) includes a first birefringent plate (40) that the light from the liquid crystal light valve (39) enters, a second birefringent plate (41) that light from the first birefringent plate (40) enters, and a third birefringent plate (42) that light from the second birefringent plate (41) enters. A polarization direction of the light entering the first birefringent plate (40) forms an angle of n×45° (n is an integer other than 0) with an optic axis of the first birefringent plate (40) projected on an incident surface of the first birefringent plate (40).Type: GrantFiled: April 16, 2003Date of Patent: April 29, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takaaki Tanaka, Atsushi Hatakeyama, Shigekazu Yamagishi
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Patent number: 7360214Abstract: A method for collecting log information relating to specific processing from pieces of log information for integration is disclosed. Session information, which is given every time log information is processed and included in the log information held by a server, is recorded in a session-information management table. In addition, how session information associates with others among different pieces of log information is recorded in a session-information association table. Recursively searching the session-information association table by use of session information specified by a user through a target log entry input unit enables identification of a set of session information relating to the processing to which the user pays attention. Information corresponding to each of the session information related is collected from log information, and is integrated according to the recorded data and time of a log.Type: GrantFiled: May 14, 2003Date of Patent: April 15, 2008Assignee: Hitachi, Ltd.Inventors: Mitsunori Satomi, Atsushi Hatakeyama
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Patent number: 7316484Abstract: An illuminator comprising two light source sections (101, 102), a rod integrator (1), and a relay lens system (4) for introducing a light flux emitted from the rod integrator (1), wherein the rod integrator (1) is a columnar optical element having an incident end face (130F) and an exit end face (130B). One pair of opposite side faces out of four side faces are formed so that the planes face each other in parallel while the other pair of opposite side faces form a taper face where the planes face each other while inclining at a specified angle such that the opposite side faces recede from the incident end face (130F) toward the exit end face (130B). Lights from the two light source sections (101, 102) are converged to the vicinity of the incident end face (130F) of the rod integrator (1).Type: GrantFiled: October 8, 2003Date of Patent: January 8, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Atsushi Hatakeyama
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Patent number: 7307885Abstract: A nonvolatile semiconductor memory device includes a plurality of memory cells holding memory cell information, a plurality of bit lines connected to the plurality of memory cells, the plurality of bit lines including a first bit line conected to a selected one of the plurality of memory cells and a plurality of second bit lines connected to non-selected memory cells, a plurality of reference cells supplying different reference currents respectively, and a read-out circuit, wherein, when reading the memory cell information, the read-out circuit is coupled to the first bit line connected to the selected memory cell and coupled to one of the plurality of reference cells through one of the plurality of second bit lines connected to the non-selected memory cells.Type: GrantFiled: February 24, 2005Date of Patent: December 11, 2007Assignee: Fujitsu LimitedInventors: Toshimi Ikeda, Atsushi Hatakeyama, Nobutaka Taniguchi, Akira Kikutake, Kuninori Kawabata, Atsushi Takeuchi
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Patent number: 7224602Abstract: A semiconductor device includes a first memory cell array that includes memory cells for storing data and is managed on a sector basis, a second memory cell array including memory cells storing sector protection information on the sector basis, and a control circuit checking the sector protection information stored in the second memory cell array whenever the sector to be programmed or erased is selected. Thus, the sector protection information in all the sectors does not have to be latched at the time of power on. The latch circuit equal in number to the sector does not have to be provided. It is thus possible to reduce the number of the circuits drastically and the chip area can be reduced.Type: GrantFiled: May 11, 2005Date of Patent: May 29, 2007Assignee: Spansion LLCInventors: Kazunari Kido, Minoru Yamashita, Kazuhiro Kurihara, Atsushi Hatakeyama, Hiroaki Wada
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Patent number: 7184296Abstract: A memory device has a data line (DATA-BUS) for connection to a memory cell, a reference line (Reference-BUS) for reference, a precharge circuit (101), a load circuit (102), and an amplifier circuit (103). The precharge circuit is connected to the data line and the reference line and configured to precharge the data line and the reference line. The load circuit is connected to the data line and the reference line and configured to apply a first constant current to the data line and apply a second constant current which is smaller than the first constant current to the reference line. The amplification circuit is connected to the data line and the reference line and configured to amplify a differential voltage between the data line and the reference line.Type: GrantFiled: March 3, 2005Date of Patent: February 27, 2007Assignee: Fujitsu LimitedInventors: Atsushi Hatakeyama, Toshimi Ikeda, Nobutaka Taniguchi, Akira Kikutake, Kuninori Kawabata, Atsushi Takeuchi
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Patent number: 7185089Abstract: A method for collecting log information relating to specific processing from pieces of log information for integration is disclosed. Session information, which is given every time log information is processed and included in the log information held by a server, is recorded in a session-information management table. In addition, how session information associates with others among different pieces of log information is recorded in a session-information association table. Recursively searching the session-information association table by use of session information specified by a user through a target log entry input unit enables identification of a set of session information relating to the processing to which the user pays attention. Information corresponding to each of the session information related is collected from log information, and is integrated according to the recorded data and time of a log.Type: GrantFiled: May 14, 2003Date of Patent: February 27, 2007Assignee: Hitachi, Ltd.Inventors: Mitsunori Satomi, Atsushi Hatakeyama
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Publication number: 20060218279Abstract: A method for controlling a management computer connected to a server for permitting communications therebetween, wherein the server transmits to a client the result of processing executed in response to each processing request sent from the client. The management computer stores an allowance for a value indicative of a load on the server, receives from the server a value calculated on the basis of the number of processing requests from the client and the value indicative of the load on the server. The management computer calculates an allowance for the value calculated from the number of processing requests, based on the value calculated from the number of processing requests, the allowance for the value indicative of the load, and the value indicative of the load, and transmits to the server the calculated allowance for the value calculated from the number of processing requests.Type: ApplicationFiled: December 21, 2005Publication date: September 28, 2006Inventors: Akihiko Yamaguchi, Atsushi Hatakeyama
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Publication number: 20060103592Abstract: The present invention provides an inexpensive projection display that allows a pixel grid as ineffective portions of respective pixels of a light valve to be made inconspicuous. The projection display includes a birefringent element (43) for spatially separating light from a transmission liquid crystal light valve (39). The birefringent element (43) includes a first birefringent plate (40) that the light from the liquid crystal light valve (39) enters, a second birefringent plate (41) that light from the first birefringent plate (40) enters, and a third birefringent plate (42) that light from the second birefringent plate (41) enters. A polarization direction of the light entering the first birefringent plate (40) forms an angle of n×45° (n is an integer other than 0) with an optic axis of the first birefringent plate (40) projected on an incident surface of the first birefringent plate (40).Type: ApplicationFiled: April 16, 2003Publication date: May 18, 2006Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Takaaki Tanaka, Atsushi Hatakeyama, Shigekaza Yamagishi
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Publication number: 20050276125Abstract: A semiconductor device includes a first memory cell array that includes memory cells for storing data and is managed on a sector basis, a second memory cell array including memory cells storing sector protection information on the sector basis, and a control circuit checking the sector protection information stored in the second memory cell array whenever the sector to be programmed or erased is selected. Thus, the sector protection information in all the sectors does not have to be latched at the time of power on. The latch circuit equal in number to the sector does not have to be provided. It is thus possible to reduce the number of the circuits drastically and the chip area can be reduced.Type: ApplicationFiled: May 11, 2005Publication date: December 15, 2005Inventors: Kazunari Kido, Minoru Yamashita, Kazuhiro Kurihara, Atsushi Hatakeyama, Hiroaki Wada
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Publication number: 20050185465Abstract: A memory device includes plural banks (BNKA, BNKB, BNKC, and BNKD), and each of the banks includes a plural memory cells storing data and plural bit lines reading data from the plural memory cells. Bit line lengths of all of the plural banks are equal.Type: ApplicationFiled: April 21, 2005Publication date: August 25, 2005Inventors: Nobutaka Taniguchi, Atsushi Hatakeyama, Toshimi Ikeda, Akira Kikutake, Kuninori Kawabata, Atsushi Takeuchi
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Publication number: 20050162955Abstract: A nonvolatile semiconductor memory device comprises a memory cell array in which memory cells each holding memory cell information are arrayed, reference cells which supply different reference currents respectively, and a read-out circuit. When reading the memory cell information from a selected one of the memory cells, the read-out circuit is brought into conduction to a first global bit line which is connected to a bit line of the selected memory cell, and brought into conduction to one of a plurality of second global bit lines respectively which are provided near the first global bit line and connected to bit lines of non-selected memory cells but not connected to the bit line of the selected memory cell, so that the memory cell information is determined by comparing a read-out current from the selected memory cell with each of the reference currents from the reference cells.Type: ApplicationFiled: February 24, 2005Publication date: July 28, 2005Inventors: Toshimi Ikeda, Atsushi Hatakeyama, Nobutaka Taniguchi, Akira Kikutake, Kuninori Kawabata, Atsushi Takeuchi
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Publication number: 20050146891Abstract: An illuminator comprising two light source sections (101, 102), a rod integrator (1), and a relay lens system (4) for introducing a light flux emitted from the rod integrator (1), wherein the rod integrator (1) is a columnar optical element having an incident end face (130F) and an exit end face (130B). One pair of opposite side faces out of four side faces are formed so that the planes face each other in parallel while the other pair of opposite side faces form a taper face where the planes face each other while inclining at a specified angle such that the opposite side faces recede from the incident end face (130F) toward the exit end face (130B). Lights from the two light source sections (101, 102) are converged to the vicinity of the incident end face (130F) of the rod integrator (1).Type: ApplicationFiled: October 8, 2003Publication date: July 7, 2005Applicant: Matsushita Electric Industrial Co., Ltd.Inventor: Atsushi Hatakeyama
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Publication number: 20050141306Abstract: A memory device has a data line (DATA-BUS) for connection to a memory cell, a reference line (Reference-BUS) for reference, a precharge circuit (101), a load circuit (102), and an amplifier circuit (103). The precharge circuit is connected to the data line and the reference line and configured to precharge the data line and the reference line. The load circuit is connected to the data line and the reference line and configured to apply a first constant current to the data line and apply a second constant current which is smaller than the first constant current to the reference line. The amplification circuit is connected to the data line and the reference line and configured to amplify a differential voltage between the data line and the reference line.Type: ApplicationFiled: March 3, 2005Publication date: June 30, 2005Inventors: Atsushi Hatakeyama, Toshimi Ikeda, Nobutaka Taniguchi, Akira Kikutake, Kuninori Kawabata, Atsushi Takeuchi
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Patent number: 6774655Abstract: A semiconductor device mounted on a board or the like and having a test circuit, having the function of carrying out a contact test at a low cost on the terminals of the semiconductor, is disclosed. The semiconductor device comprises a terminal test circuit for testing a state of a contact of an external terminal and a test mode control circuit unit. The test mode control circuit unit outputs a signal indicating a first operation mode upon application of a power supply voltage thereto, outputs a test mode signal to the terminal test circuit in response to a control signal input to a specific terminal such as a chip select terminal, and outputs a signal indicating a second operation mode in response to the number of times in which the level of the control signal input to the specific terminal changes. Preferably, the first operation mode is a terminal test mode, and the second operation mode is a normal operation mode.Type: GrantFiled: July 21, 2003Date of Patent: August 10, 2004Assignee: Fujitsu LimitedInventors: Yasurou Matsuzaki, Masao Nakano, Toshiya Uchida, Atsushi Hatakeyama, Kenichi Kawasaki, Yasuhiro Fujii