Patents by Inventor Atsushi Himeno

Atsushi Himeno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130149815
    Abstract: A method of manufacturing a nonvolatile memory element includes: forming a first conductive film above a substrate; forming, above the first conductive film, a first metal oxide layer and a second metal oxide layer having different degrees of oxygen deficiency and a second conductive film; forming a second electrode by patterning the second conductive film; forming a variable resistance layer by patterning the first metal oxide layer and the second metal oxide layer; removing a side portion of the variable resistance layer in a surface parallel to a main surface of the substrate to a position that is further inward than an edge of the second electrode; and forming a first electrode by patterning the first conductive film after or during the removing.
    Type: Application
    Filed: September 10, 2012
    Publication date: June 13, 2013
    Inventors: Hideaki Murase, Takumi Mikawa, Yoshio Kawashima, Atsushi Himeno
  • Patent number: 8445883
    Abstract: A nonvolatile semiconductor memory device which can achieve miniaturization and a larger capacity in a cross-point structure in which memory cells are formed inside contact holes at cross points of word lines and bit lines, respectively, and a manufacturing method thereof are provided.
    Type: Grant
    Filed: July 16, 2009
    Date of Patent: May 21, 2013
    Assignee: Panasonic Corporation
    Inventors: Atsushi Himeno, Takumi Mikawa, Yoshio Kawashima
  • Publication number: 20130112935
    Abstract: A nonvolatile memory element according to the present invention includes a first metal line; a plug formed on the first metal line and connected to the first metal line; a stacked structure including a first electrode, a second electrode, and a variable resistance layer, the stacked structure being formed on a plug which is connected to the first electrode; a second metal line formed on the stacked structure and directly connected to the second electrode; and a side wall protective layer which covers the side wall of the stacked structure and has an insulating property and an oxygen barrier property, wherein part of a lower surface of the second metal line is located under an upper surface of the stacked structure.
    Type: Application
    Filed: November 30, 2011
    Publication date: May 9, 2013
    Inventors: Atsushi Himeno, Haruyuki Sorada, Yukio Hayakawa, Takumi Mikawa
  • Patent number: 8426836
    Abstract: There are provided a resistance variable nonvolatile memory device which changes its resistance stably at low voltages and is suitable for a miniaturized configuration, and a manufacturing method thereof. The nonvolatile memory device comprises: a substrate (100); a first electrode (101); an interlayer insulating layer (102); a memory cell hole (103) formed in the interlayer insulating layer; a first resistance variable layer (104a) formed in at least a bottom portion of the memory cell hole and connected to the first electrode; a second resistance variable layer (104b) formed inside the memory cell hole (103) and located on the first resistance variable layer (104a); and a second electrode (105); the first resistance variable layer (104a) and the second resistance variable layer (104b) respectively comprising metal oxides of the same kind; and the first resistance variable layer (104a) having a higher oxygen content than the second resistance variable layer (104b).
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: April 23, 2013
    Assignee: Panasonic Corporation
    Inventors: Takumi Mikawa, Yoshio Kawashima, Atsushi Himeno
  • Patent number: 8394669
    Abstract: A resistance variable element (100) used in a through-hole cross-point structure memory device, according to the present invention, and a resistance variable memory device including the resistance variable element, includes a substrate (7) and an interlayer insulating layer (3) formed on the substrate, and have a configuration in which a through-hole (4) is formed to penetrate the interlayer insulating layer, a first resistance variable layer (2) comprising transition metal oxide is formed outside the through-hole, a second resistance variable layer (5) comprising transition metal oxide is formed inside the through-hole, the first resistance variable layer is different in resistivity from the second resistance variable layer, and the first resistance variable layer and the second resistance variable layer are in contact with each other only in an opening (20) of the through-hole which is closer to the substrate.
    Type: Grant
    Filed: July 12, 2010
    Date of Patent: March 12, 2013
    Assignee: Panasonic Corporation
    Inventors: Koji Arita, Takumi Mikawa, Atsushi Himeno, Yoshio Kawashima, Kenji Tominaga
  • Publication number: 20120193600
    Abstract: A variable resistance nonvolatile memory element (10) is formed from a first electrode (101) comprising a material including a metal as a main component, a variable resistance layer (102) having a reversibly changing resistance value in response to applied predetermined electric pulses having different polarities, a semiconductor layer (103) comprising a material including a nitrogen-deficient silicon nitride as a main component, and a second electrode (104). The variable resistance layer (102) includes a first variable resistance layer (102a) adjacent to the first electrode (101) and a second variable resistance layer (102b), both comprising a material including an oxygen-deficient transition metal oxide as a main component. The first variable resistance layer (102a) has a higher oxygen content atomic percentage than the second variable resistance layer (102b).
    Type: Application
    Filed: July 1, 2011
    Publication date: August 2, 2012
    Inventors: Atsushi Himeno, Kiyotaka Tsuji
  • Publication number: 20120104350
    Abstract: A step of forming, on a substrate (11), lower layer copper lines (18) each being shaped into a strip, a step of forming electrode seed layers (21) each being shaped into a strip, on the surfaces of the respective lower layer copper lines (18) using electroless plating, a step of forming interlayer insulating layer (19) above the electrode seed layers (21) and the substrate (11), a step of forming, in the interlayer insulating layer (19), memory cell holes (20), penetrating through the interlayer insulating layer (19) and extending to the electrode seed layers (21), a step of forming noble metal electrode layers (29) on the surfaces of the electrode seed layers (21) exposed in the respective memory cell holes (20) using the electroless plating, a step of forming, in the respective memory cell holes (20), variable resistance layers (23) connected to the noble electrode layers (29), and a step of forming, above the interlayer insulating layer (19) and the variable resistance layers (23), upper layer copper lines
    Type: Application
    Filed: April 26, 2011
    Publication date: May 3, 2012
    Inventors: Atsushi Himeno, Haruyuki Sorada, Takumi Mikawa
  • Publication number: 20120097915
    Abstract: There are provided a resistance variable nonvolatile memory device which changes its resistance stably at low voltages and is suitable for a miniaturized configuration, and a manufacturing method thereof. The nonvolatile memory device comprises: a substrate (100); a first electrode (101); an interlayer insulating layer (102); a memory cell hole (103) formed in the interlayer insulating layer; a first resistance variable layer (104a) formed in at least a bottom portion of the memory cell hole and connected to the first electrode; a second resistance variable layer (104b) formed inside the memory cell hole (103) and located on the first resistance variable layer (104a); and a second electrode (105); the first resistance variable layer (104a) and the second resistance variable layer (104b) respectively comprising metal oxides of the same kind; and the first resistance variable layer (104a) having a higher oxygen content than the second resistance variable layer (104b).
    Type: Application
    Filed: June 30, 2009
    Publication date: April 26, 2012
    Inventors: Takumi Mikawa, Yoshio Kawashima, Atsushi Himeno
  • Publication number: 20110233511
    Abstract: A nonvolatile memory element (10) of the present invention comprises a substrate (11); a lower electrode layer (15) and a resistive layer (16) sequentially formed on the substrate (11); a resistance variable layer (31) formed on the resistive layer (16); a wire layer (20) formed above the lower electrode layer (15); an interlayer insulating layer (17) disposed between the substrate (11) and the wire layer (20) and covering at least the lower electrode layer (15) and the resistive layer (16), the interlayer insulating layer being provided with a contact hole (26) extending from the wire layer (20) to the resistance variable layer (31); and an upper electrode layer (19) formed inside the contact hole (26) such that the upper electrode layer is connected to the resistance variable layer (31) and to the wire layer (20); resistance values of the resistance variable layer (31) changing reversibly in response to electric pulses applied between the lower electrode layer (15) and the upper electrode layer (19).
    Type: Application
    Filed: December 4, 2009
    Publication date: September 29, 2011
    Inventors: Yoshio Kawashima, Takumi Mikawa, Zhiqiang Wei, Atsushi Himeno
  • Publication number: 20110220862
    Abstract: A resistance variable element (100) used in a through-hole cross-point structure memory device, according to the present invention, and a resistance variable memory device including the resistance variable element, includes a substrate (7) and an interlayer insulating layer (3) formed on the substrate, and have a configuration in which a through-hole (4) is formed to penetrate the interlayer insulating layer, a first resistance variable layer (2) comprising transition metal oxide is formed outside the through-hole, a second resistance variable layer (5) comprising transition metal oxide is formed inside the through-hole, the first resistance variable layer is different in resistivity from the second resistance variable layer, and the first resistance variable layer and the second resistance variable layer are in contact with each other only in an opening (20) of the through-hole which is closer to the substrate.
    Type: Application
    Filed: July 12, 2010
    Publication date: September 15, 2011
    Inventors: Koji Arita, Takumi Mikawa, Atsushi Himeno, Yoshio Kawashima, Kenji Tominaga
  • Publication number: 20110220861
    Abstract: A nonvolatile semiconductor memory device which can achieve miniaturization and a larger capacity in a cross-point structure in which memory cells are formed inside contact holes at cross points of word lines and bit lines, respectively, and a manufacturing method thereof are provided.
    Type: Application
    Filed: July 16, 2009
    Publication date: September 15, 2011
    Inventors: Atsushi Himeno, Takumi Mikawa, Yoshio Kawashima