Patents by Inventor Atsushi Komura

Atsushi Komura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11173555
    Abstract: To improve the adhesion resistance and wear resistance of a surface-coated cutting tool. The surface-coated cutting tool includes a tool substrate, and a single-component coating layer composed of a composite nitride of Cr (chromium), Al (aluminum), and V (vanadium) and disposed on the surface of the tool substrate. The composite nitride is characterized by being represented by a compositional formula: CraAlbVcN satisfying the following relations: 0.11?a?0.26; 0.73?b?0.85; 0<c?0.04; and a+b+c?1 (wherein a, b, and c each represent an atomic proportion). The single-component coating layer has both a hexagonal phase and a cubic phase.
    Type: Grant
    Filed: May 11, 2018
    Date of Patent: November 16, 2021
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Shota Nozaki, Fumihiro Kikkawa, Atsushi Komura
  • Publication number: 20210155550
    Abstract: A silicon nitride-based sintered body containing silicon nitride-based grains, which are formed of sialon grains. In the silicon nitride-based sintered body, when the size of each silicon nitride-based grain is represented by its maximum grain size, the ratio of the number of silicon nitride-based grains having a maximum grain size of 1 ?m or less to the number of the entire silicon nitride-based grains is 70% or higher. Furthermore, in the distribution profile of no. % of silicon nitride-based grains with respect to maximum grain size, the maximum value of no. % (i.e., maximum no. %) of silicon nitride-based grains is 15 no. % or higher. Also disclosed is a cutting insert, which is formed of the silicon nitride-based sintered body.
    Type: Application
    Filed: February 5, 2021
    Publication date: May 27, 2021
    Applicant: NGK SPARK PLUG CO., LTD.
    Inventors: Hiroko NAKAYAMA, Atsushi KOMURA
  • Publication number: 20200299199
    Abstract: A silicon nitride-based sintered body containing silicon nitride-based grains, which are silicon nitride grains or sialon grains. In the silicon nitride-based sintered body, when the size of each silicon nitride-based grain is represented by its maximum grain size, the ratio of the number of silicon nitride-based grains having a maximum grain size of 1 ?m or less to the number of the entire silicon nitride-based grains is 70% or higher. Furthermore, in the distribution profile of no. % of silicon nitride-based grains with respect to maximum grain size, the maximum value of no. % (i.e., maximum no. %) of silicon nitride-based grains is 15 no. % or higher. Also disclosed is a cutting insert, which is formed of the silicon nitride-based sintered body.
    Type: Application
    Filed: March 30, 2017
    Publication date: September 24, 2020
    Applicant: NGK SPARK PLUG CO., LTD.
    Inventors: Hiroko NAKAYAMA, Atsushi KOMURA
  • Publication number: 20200122248
    Abstract: To improve the adhesion resistance and wear resistance of a surface-coated cutting tool. The surface-coated cutting tool includes a tool substrate, and a single-component coating layer composed of a composite nitride of Cr (chromium), Al (aluminum), and V (vanadium) and disposed on the surface of the tool substrate. The composite nitride is characterized by being represented by a compositional formula: CraAlbVcN satisfying the following relations: 0.11?a?0.26; 0.73?b?0.85; 0<c?0.04; and a+b+c?1 (wherein a, b, and c each represent an atomic proportion). The single-component coating layer has both a hexagonal phase and a cubic phase.
    Type: Application
    Filed: May 11, 2018
    Publication date: April 23, 2020
    Applicant: NGK SPARK PLUG CO., LTD.
    Inventors: Shota NOZAKI, Fumihiro KIKKAWA, Atsushi KOMURA
  • Patent number: 10058925
    Abstract: A sialon sintered body and a cutting insert each having thermal shock resistance and VB wear resistance. The sialon sintered body and the cutting insert contain ?-sialon and 21R-sialon and exhibit an X-ray diffraction peak intensity ratio [(I21R/IA)×100] of 5% or greater and smaller than 30%, wherein IA represents the sum of the peak intensities of the sialon species, and I21R represents the peak intensity of 21R-sialon, the ratio being calculated from the peak intensities of the sialon species obtained by using X-ray diffractometry.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: August 28, 2018
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Ryoji Toyoda, Fumihiro Kikkawa, Atsushi Komura
  • Patent number: 9739927
    Abstract: Provided are a light source device capable of effectively coping with a luminance change in a light guide plate caused by a variation in an interval between a light source and the light guide plate at a low cost, and a display apparatus. A light source device which includes a light guide plate for emitting light made incident on one side surface from one surface thereof, is configured so as to, for the luminance change due to a change in an interval between a light source disposed on the one side surface side of the light guide plate and the light guide plate, previously increase only an average luminance of the light source side (one side surface side) in which an influence of the luminance change is largest.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: August 22, 2017
    Assignee: Sakai Display Products Corporation
    Inventors: Atsushi Komura, Yoshitake Ishimoto
  • Publication number: 20170216931
    Abstract: A sialon sintered body and a cutting insert each having thermal shock resistance and VB wear resistance. The sialon sintered body and the cutting insert contain ?-sialon and 21R-sialon and exhibit an X-ray diffraction peak intensity ratio R[(I21R/IA)×100] of 5% or greater and smaller than 30%, wherein IA represents the sum of the peak intensities of the sialon species, and I21R represents the peak intensity of 21R-sialon, the ratio being calculated from the peak intensities of the sialon species obtained by using X-ray diffractometry.
    Type: Application
    Filed: September 29, 2015
    Publication date: August 3, 2017
    Applicant: NGK SPARK PLUG CO., LTD.
    Inventors: Ryoji TOYODA, Fumihiro KIKKAWA, Atsushi KOMURA
  • Publication number: 20160109644
    Abstract: Provided are a light source device capable of effectively coping with a luminance change in a light guide plate caused by a variation in an interval between a light source and the light guide plate at a low cost, and a display apparatus. A light source device which includes a light guide plate for emitting light made incident on one side surface from one surface thereof, is configured so as to, for the luminance change due to a change in an interval between a light source disposed on the one side surface side of the light guide plate and the light guide plate, previously increase only an average luminance of the light source side (one side surface side) in which an influence of the luminance change is largest.
    Type: Application
    Filed: May 23, 2014
    Publication date: April 21, 2016
    Inventors: Atsushi Komura, Yoshitake Ishimoto
  • Patent number: 9196288
    Abstract: To produce an optical recording medium having a good concavo-convex shape whereby optical information recording/retrieving is stabilized. A process for producing an optical recording medium 100 provided with an interlayer 104 having a concavo-convex shape, which comprises a step of forming a recording layer 102 on a substrate 101 directly or via another layer; a step of placing a resin material layer 104a and a stamper 110 having a concavo-convex shape for transfer, in this order on the recording layer 102, and curing the resin material layer 104a in this laminated state to obtain a bonded body 112 comprising the substrate 101, the recording layer 102, the resin material layer 104a and the stamper 110, and a step of separating the stamper 110 from the resin material layer 104a so that the concavo-convex shape for transfer is transferred to the resin material layer 104a, and applying surface modification treatment to promote the curing of the resin material layer 104a, to form the interlayer 104.
    Type: Grant
    Filed: September 21, 2007
    Date of Patent: November 24, 2015
    Assignee: Mitsubishi Kagaku Media Co., Ltd.
    Inventors: Shigeyuki Furomoto, Masafumi Aga, Toshifumi Kawano, Hideharu Takeshima, Yukari Kiritou, Atsushi Komura, Kumi Mizuno, Yumi Matsumura
  • Patent number: 8446003
    Abstract: A semiconductor device includes a multilayer wiring substrate and a double-sided multi-electrode chip. The double-sided multi-electrode chip includes a semiconductor chip and has multiple electrodes on both sides of the semiconductor chip. The double-sided multi-electrode chip is embedded in the multilayer wiring substrate in such a manner that the double-sided multi-electrode chip is not exposed outside the multilayer wiring substrate. The electrodes of the double-sided multi-electrode chip are connected to wiring layers of the multilayer wiring substrate.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: May 21, 2013
    Assignee: DENSO CORPORATION
    Inventors: Atsushi Komura, Yasuhiro Kitamura, Nozomu Akagi, Yasutomi Asai
  • Patent number: 8007561
    Abstract: A cermet insert having a structure composed of a hard phase and a binding phase and, as a sintered body composition, containing Ti, Nb and/or Ta, and W in a total amount of Ti in terms of carbonitride, Nb and/or Ta in terms of carbide and W in terms of carbide of 70 to 95 wt. % of an entirety of the microstructure, and containing W in terms of carbide in an amount of 15 to 35 wt. % of the entirety of the microstructure, the sintered body composition further containing Co and/or Ni. The hard phase has one or two or more of the phases: (1) a first hard phase of a core-having structure whose core portion contains a titanium carbonitride phase and a peripheral portion containing a (Ti, W, Ta/Nb)CN phase, (2) a second hard phase of a core-having structure whose core portion and peripheral portion both contain a (Ti, W, Ta/Nb)CN phase, and (3) a third hard phase of single-phase structure including a titanium cabonitride phase.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: August 30, 2011
    Assignees: NGK Spark Plug Co., Ltd., Mitsubishi Materials Corporation
    Inventors: Tomoaki Shindo, Atsushi Komura, Hiroaki Takashima, Toshiyuki Taniuchi, Masafumi Fukumura, Kei Takahashi
  • Patent number: 7901967
    Abstract: A method for dicing a semiconductor substrate includes: forming a reforming layer in the substrate by irradiating a laser beam on the substrate; forming a groove on the substrate along with a cutting line; and applying a force to the substrate in order to cutting the substrate at the reforming layer as a starting point of cutting. The groove has a predetermined depth so that the groove is disposed near the reforming layer, and the force provides a stress at the groove.
    Type: Grant
    Filed: November 16, 2006
    Date of Patent: March 8, 2011
    Assignee: DENSO CORPORATION
    Inventors: Atsushi Komura, Muneo Tamura, Kazuhiko Sugiura, Hirotsugu Funato, Yumi Maruyama, Tetsuo Fujii, Kenji Kohno
  • Publication number: 20100295170
    Abstract: A semiconductor device includes a multilayer wiring substrate and a double-sided multi-electrode chip. The double-sided multi-electrode chip includes a semiconductor chip and has multiple electrodes on both sides of the semiconductor chip. The double-sided multi-electrode chip is embedded in the multilayer wiring substrate in such a manner that the double-sided multi-electrode chip is not exposed outside the multilayer wiring substrate. The electrodes of the double-sided multi-electrode chip are connected to wiring layers of the multilayer wiring substrate.
    Type: Application
    Filed: May 24, 2010
    Publication date: November 25, 2010
    Applicant: DENSO CORPORATION
    Inventors: Atsushi KOMURA, Yasuhiro Kitamura, Nozomu Akagi, Yasutomi Asai
  • Patent number: 7838331
    Abstract: A device separated from a wafer includes: a chip having a sidewall, which is provided by a dicing surface of the wafer in a case where the device is separated from the wafer; and a protection member disposed on the sidewall of the chip for protecting the chip from being contaminated by a dust from the dicing surface. In the device, the dicing surface of the wafer is covered with the protection member so that the chip is prevented from contaminated with the dust.
    Type: Grant
    Filed: November 14, 2006
    Date of Patent: November 23, 2010
    Assignee: Denso Corporation
    Inventors: Atsushi Komura, Tetsuo Fujii, Muneo Tamura, Makoto Asai
  • Patent number: 7762747
    Abstract: One aspect of this titanium carbonitride-based cermet insert has a microstructure including 75 to 90 area % of a hard phase and the balance as a binding phase, wherein the hard phase includes a first hard phase in which a core-having structure includes a TiCN phase and a peripheral portion includes a (Ti,W,Ta/Nb)CN phase, a second hard phase including a (Ti,W,Ta/Nb)CN phase, and a third hard phase including a TiCN phase, and the binding phase contains 18 to 33% of Co, 20 to 35% of Ni, 5% or less of Ti and Ta and/or Nb, and 40 to 60 mass % of W.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: July 27, 2010
    Assignees: Mitsubishi Materials Corporation, NGK Spark Plug Co., Ltd.
    Inventors: Toshiyuki Taniuchi, Masafumi Fukumura, Kei Takahashi, Tomoaki Shindo, Atsushi Komura, Hiroaki Takashima
  • Publication number: 20100090358
    Abstract: To produce an optical recording medium having a good concavo-convex shape whereby optical information recording/retrieving is stabilized. A process for producing an optical recording medium 100 provided with an interlayer 104 having a concavo-convex shape, which comprises a step of forming a recording layer 102 on a substrate 101 directly or via another layer; a step of placing a resin material layer 104a and a stamper 110 having a concavo-convex shape for transfer, in this order on the recording layer 102, and curing the resin material layer 104a in this laminated state to obtain a bonded body 112 comprising the substrate 101, the recording layer 102, the resin material layer 104a and the stamper 110, and a step of separating the stamper 110 from the resin material layer 104a so that the concavo-convex shape for transfer is transferred to the resin material layer 104a, and applying surface modification treatment to promote the curing of the resin material layer 104a, to form the interlayer 104.
    Type: Application
    Filed: September 21, 2007
    Publication date: April 15, 2010
    Applicant: MITSUBISHI KAGAKU MEDIA CO., LTD
    Inventors: Shigeyuki Furomoto, Masafumi Aga, Toshifumi Kawano, Hideharu Takeshima, Yukari Kiritou, Atsushi Komura, Kumi Mizuno, Yumi Matsumura
  • Publication number: 20100014930
    Abstract: One aspect of this titanium carbonitride-based cermet insert has a microstructure including 75 to 90 area % of a hard phase and the balance as a binding phase, wherein the hard phase includes a first hard phase in which a core-having structure includes a TiCN phase and a peripheral portion includes a (Ti,W,Ta/Nb)CN phase, a second hard phase including a (Ti,W,Ta/Nb)CN phase, and a third hard phase including a TiCN phase, and the binding phase contains 18 to 33% of Co, 20 to 35% of Ni, 5% or less of Ti and Ta and/or Nb, and 40 to 60 mass % of W.
    Type: Application
    Filed: June 13, 2006
    Publication date: January 21, 2010
    Applicants: Mitsubishi Materials Corporation, NGK Spark Plug Co., Ltd.
    Inventors: Toshiyuki Taniuchi, Masafumi Fukumura, Kei Takahashi, Tomoaki Shindo, Atsushi Komura, Hiroaki Takashima
  • Patent number: 7642653
    Abstract: A semiconductor device includes a substrate, an element formed in the substrate, an insulation film formed on the substrate, wiring layers, and an electrode pad. The wiring layers are multilayered and electrically coupled to the element through the insulation film. The electrode pad is electrically coupled to a top wiring layer of the wiring layers. The top wiring layer is configured to be a top wiring-electrode layer that doubles as an electrode layer disposed under the electrode pad. The electrode layer of the top wiring-electrode layer is disposed directly above the element. The electrode pad and the electrode layer are multilayered to form a pad structure.
    Type: Grant
    Filed: October 23, 2007
    Date of Patent: January 5, 2010
    Assignee: DENSO CORPORATION
    Inventors: Takeshi Kuzuhara, Atsushi Komura, Mitsutaka Katada, Takayoshi Naruse
  • Publication number: 20090049953
    Abstract: A cermet insert having a structure composed of a hard phase and a binding phase and, as a sintered body composition, containing Ti, Nb and/or Ta, and W in a total amount of Ti in terms of carbonitride, Nb and/or Ta in terms of carbide and W in terms of carbide of 70 to 95 wt. % of an entirety of the microstructure, and containing W in terms of carbide in an amount of 15 to 35 wt. % of the entirety of the microstructure, the sintered body composition further containing Co and/or Ni. The hard phase has one or two or more of the phases: (1) a first hard phase of a core-having structure whose core portion contains a titanium carbonitride phase and a peripheral portion containing a (Ti, W, Ta/Nb)CN phase, (2) a second hard phase of a core-having structure whose core portion and peripheral portion both contain a (Ti, W, Ta/Nb)CN phase, and (3) a third hard phase of single-phase structure including a titanium cabonitride phase.
    Type: Application
    Filed: June 13, 2006
    Publication date: February 26, 2009
    Applicants: NGK SPARK PLUG CO., LTD., MITSUBISHI MATERIALS CORPORATION
    Inventors: Tomoaki Shindo, Atsushi Komura, Hiroaki Takashima, Toshiyuki Taniuchi, Masafumi Fukumura, Kei Takahashi
  • Publication number: 20080258304
    Abstract: A semiconductor device includes: a substrate; and wiring layers on the substrate. Each wiring layer includes: an interlayer insulation film having a wiring groove with a via hole; a copper wiring in the groove and the hole; an barrier metal layer between an inner wall of the groove with the hole and the copper wiring; and an upper barrier metal layer on the interlayer insulation film and covering an upper surface of the copper wiring. The barrier metal layer prevents a copper component in the copper wiring from diffusing into the interlayer insulation film. The copper wiring of an upper layer is electrically coupled with the copper wiring of a lower layer. The upper barrier metal layer of the lower layer prevents a copper component in the copper wiring of the lower layer from diffusing into the interlayer insulation film of the upper layer.
    Type: Application
    Filed: April 22, 2008
    Publication date: October 23, 2008
    Applicant: DENSO CORPORATION
    Inventors: Atsushi KOMURA, Takeshi KUZUHARA, Takayoshi NARUSE, Mitsutaka KATADA