Patents by Inventor Atsushi KYUTOKU

Atsushi KYUTOKU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210233885
    Abstract: A semiconductor device includes: an inner substrate on which a semiconductor chip is mounted, and has a surface on which terminals including electric path terminals are formed; a lead frame which has a chip connecting electrode portion which is electrically connected to a surface of the semiconductor chip via a conductive bonding member, substrate connecting electrode portions which are electrically connected to the electric path terminals of the inner substrate, and horizontal surface support portions which bulge to the outside from the chip connecting electrode portion or the substrate connecting electrode portions; and pin terminals which are mounted upright over the inner substrate in a direction perpendicular to flat surfaces of the substrate connecting electrode portions of the lead frame, wherein the horizontal surface support portions bulge to the outside of the inner substrate.
    Type: Application
    Filed: April 10, 2019
    Publication date: July 29, 2021
    Inventors: Soichiro UMEDA, Atsushi KYUTOKU
  • Patent number: 11075154
    Abstract: A semiconductor device includes: a lead frame that has one end in contact with the upper surface of the second terminal of the semiconductor element in the sealing portion, and that has the other end exposed from the sealing portion; and a control conductive bonding material that bonds between the upper surface of the second terminal of the semiconductor element and the one end of the lead frame, and the control conductive bonding material having electric conductivity.
    Type: Grant
    Filed: October 26, 2017
    Date of Patent: July 27, 2021
    Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Soichiro Umeda, Atsushi Kyutoku
  • Patent number: 11069538
    Abstract: The one end portion of the connector of the semiconductor device includes: a horizontal portion; a first inclined portion that is connected to the horizontal portion and is located closer to the tip end side of the one end than the horizontal portion, and the first inclined portion having a shape inclined downward from the horizontal portion; and a control bending portion that is connected to the first inclined portion and positioned at the tip of the one end portion, and the control bending portion bent downwardly along the bending axis direction. The lower surface of the control bending portion is in contact with an upper surface of the second terminal.
    Type: Grant
    Filed: October 26, 2017
    Date of Patent: July 20, 2021
    Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Soichiro Umeda, Atsushi Kyutoku
  • Publication number: 20210217721
    Abstract: A semiconductor device including a substrate; a chip on which a surface electrode is formed; and a lead. The lead includes a first electrode connecting portion disposed on the surface electrode and electrically connected to the surface electrode of the chip via a conductive bonding material; a second electrode connecting portion electrically connected to an electrode portion of a wiring pattern. A lead connected to the first electrode connecting portion and the second electrode connecting portion. The lead further has a thermal shrinking stress equalizing structure on a portion of an outer periphery of the first electrode connecting portion. The lead is configured to make a thermal shrinking stress applied to a conductive bonding material between the first electrode connecting portion and the surface electrode equal.
    Type: Application
    Filed: April 8, 2019
    Publication date: July 15, 2021
    Inventors: Soichiro UMEDA, Atsushi KYUTOKU
  • Patent number: 10957630
    Abstract: A semiconductor device includes: a circuit unit including a semiconductor chip; a plurality of pin terminals formed in a rod shape extending in a same direction from the circuit unit and electrically connected to the circuit unit; a sealing resin portion sealing the circuit unit and first portions of the plurality of pin terminals positioned on a side of the circuit unit; and a plurality of covering resin portions integrally extending from an outer surface of the sealing resin portion from which second portions of the plurality of pin terminals protrude, the plurality of covering resin portions being formed in a cylindrical shape respectively covering base end portions of the second portions of the plurality of pin terminals, which are positioned on a side of the sealing resin portion.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: March 23, 2021
    Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Soichiro Umeda, Atsushi Kyutoku
  • Publication number: 20200395284
    Abstract: A semiconductor device includes: a lead frame that has one end in contact with the upper surface of the second terminal of the semiconductor element in the sealing portion, and that has the other end exposed from the sealing portion; and a control conductive bonding material that bonds between the upper surface of the second terminal of the semiconductor element and the one end of the lead frame, and the control conductive bonding material having electric conductivity.
    Type: Application
    Filed: October 26, 2017
    Publication date: December 17, 2020
    Inventors: Soichiro Umeda, Atsushi Kyutoku
  • Publication number: 20200350236
    Abstract: A semiconductor device includes: a circuit unit including a semiconductor chip; a plurality of pin terminals formed in a rod shape extending in a same direction from the circuit unit and electrically connected to the circuit unit; a sealing resin portion sealing the circuit unit and first portions of the plurality of pin terminals positioned on a side of the circuit unit; and a plurality of covering resin portions integrally extending from an outer surface of the sealing resin portion from which second portions of the plurality of pin terminals protrude, the plurality of covering resin portions being formed in a cylindrical shape respectively covering base end portions of the second portions of the plurality of pin terminals, which are positioned on a side of the sealing resin portion.
    Type: Application
    Filed: December 19, 2018
    Publication date: November 5, 2020
    Inventors: Soichiro UMEDA, Atsushi KYUTOKU
  • Publication number: 20200227280
    Abstract: The one end portion of the connector of the semiconductor device includes: a horizontal portion; a first inclined portion that is connected to the horizontal portion and is located closer to the tip end side of the one end than the horizontal portion, and the first inclined portion having a shape inclined downward from the horizontal portion; and a control bending portion that is connected to the first inclined portion and positioned at the tip of the one end portion, and the control bending portion bent downwardly along the bending axis direction. The lower surface of the control bending portion is in contact with an upper surface of the second terminal.
    Type: Application
    Filed: October 26, 2017
    Publication date: July 16, 2020
    Inventors: Soichiro Umeda, Atsushi Kyutoku
  • Patent number: 10243477
    Abstract: A semiconductor device 1 of an embodiment is provided, including an insulating substrate 2, conductive pattern parts 51, 52, 53, 54, and 55 formed on the insulating substrate, semiconductor switching parts 10 and 20, and a bypass capacitor 80, the semiconductor switching part 10 provided on the conductive pattern part 51, the semiconductor switching part 20 provided on the conductive pattern part 52, the semiconductor switching part 10 having a side S1 and a side S2, the semiconductor switching part 20 having a side S3 and a side S4, an imaginary line L1 extending along the side S1 and an imaginary line L2 extending along the side S3 intersecting each other.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: March 26, 2019
    Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Yuji Morinaga, Atsushi Kyutoku, Yoshihiko Kikuchi
  • Patent number: 10199486
    Abstract: A semiconductor device 1 of an embodiment is provided, including an insulating substrate 2, conductive pattern parts 51, 52, 53, 54, and 55 formed on the insulating substrate, a GaN-HEMI 10 disposed on the conductive pattern part 51, and a GaN-HEMT 20 disposed on the conductive pattern part 52, wherein an imaginary line L1 of the GaN-HEMT 10 and an imaginary line L2 of the GaN-HEMT 20 intersect each other, a GaN gate electrode 23 of the GaN-HEMT 20 is electrically connected to the conductive pattern part 55 via a metal wire 6, and the metal wire 6 is perpendicular to a side 55 of the GaN-HEMT 20 and a conductive pattern side 55S of the conductive pattern part 55.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: February 5, 2019
    Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Yuji Morinaga, Atsushi Kyutoku, Yoshihiko Kikuchi
  • Publication number: 20180367054
    Abstract: A semiconductor device 1 of an embodiment is provided, including an insulating substrate 2, conductive pattern parts 51, 52, 53, 54, and 55 formed on the insulating substrate, semiconductor switching parts 10 and 20, and a bypass capacitor 80, the semiconductor switching part 10 provided on the conductive pattern part 51, the semiconductor switching part 20 provided on the conductive pattern part 52, the semiconductor switching part 10 having a side S1 and a side S2, the semiconductor switching part 20 having a side S3 and a side S4, an imaginary line L1 extending along the side SI and an imaginary line L2 extending along the side S3 intersecting each other.
    Type: Application
    Filed: June 19, 2017
    Publication date: December 20, 2018
    Applicant: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Yuji MORINAGA, Atsushi KYUTOKU, Yoshihiko KIKUCHI
  • Publication number: 20180366567
    Abstract: A semiconductor device 1 of an embodiment is provided, including an insulating substrate 2, conductive pattern parts 51, 52, 53, 54, and 55 formed on the insulating substrate, a GaN-HEMT 10 disposed on the conductive pattern part 51, and a GaN-HEMT 20 disposed on the conductive pattern part 52, wherein an imaginary line L1 of the GaN-HEMT 10 and an imaginary line L2 of the GaN-HEMT 20 intersect each other, a GaN gate electrode 23 of the GaN-HEMT 20 is electrically connected to the conductive pattern part 55 via a metal wire 6, and the metal wire 6 is perpendicular to a side 55 of the GaN-HEMT 20 and a conductive pattern side 55S of the conductive pattern part 55.
    Type: Application
    Filed: June 19, 2017
    Publication date: December 20, 2018
    Inventors: Yuji MORINAGA, Atsushi KYUTOKU, Yoshihiko KIKUCHI
  • Patent number: D920937
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: June 1, 2021
    Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Soichiro Umeda, Atsushi Kyutoku