Patents by Inventor Atsushi Miki
Atsushi Miki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5787240Abstract: A printer control apparatus provided with a CPU for converting video data supplied from an external unit to video data tailored to the operation of the printer; a memory holding various types of data during that conversion processing; and a read/write control unit performing the read/write control of the data between the memory, CPU, and the printer, which includes latch units which respectively latch the address and data from the CPU and thereby perform the processing at the minimum bus cycle. Also, the upper bit side of that address is made to include the control data from the CPU, and an autonomous read/write control is carried out. Further, that read/write control is carried out while using the video buffer comprising several standard size pages and by freely using that page.Type: GrantFiled: February 2, 1995Date of Patent: July 28, 1998Assignees: Fujitsu Ltd., Clan Systems Ltd.Inventors: Igor Hansen, Keiji Fujiwara, Shinichi Takahashi, Atsushi Miki, Satoshi Fukui
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Patent number: 5436924Abstract: Successively formed on an n-type InP substrate are an n-type InP first clad layer 1, an undoped GainAsP first light guide layer 11, an active layer 3 of the multiple quantum well structure arranged with the number of wells being 5 to 10 and the radiation wavelength being about 1.3 .mu.m, an undoped GainAsP second light guide layer 12, and a p-type InP clad layer 2, which are processed to constitute a mesa-type active region. The width of the active layer 3 is not less than 0.7 .mu.m and not more than 1.0 .mu.m, whereby the spectral width can be made not more than 2.5 nm in the temperature range of -45.degree. to +85.degree. C.Type: GrantFiled: August 5, 1994Date of Patent: July 25, 1995Assignee: Sumitomo Electric Industries, Ltd.Inventors: Hidenori Kamei, Atsushi Miki
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Patent number: 5401099Abstract: The present invention relates to a method of measuring junction temperature of a diode junction within a semiconductor device. The method has the steps of measuring current/voltage characteristics for various diodes at room temperature, determining an ideal factor for each diode, changing the temperature of the diodes to a selected temperature, remeasuring current/voltage characteristics for each diode, and comparing the measurements that have been made so as to obtain a temperature coefficients.Type: GrantFiled: October 13, 1992Date of Patent: March 28, 1995Assignee: Sumitomo Electric Industries, Ltd.Inventors: Hideaki Nishizawa, Masanori Nishiguchi, Atsushi Miki, Mitsuaki Fujihira
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Patent number: 5348214Abstract: A method of mounting a plurality of semiconductor elements each having bump electrodes on a wiring board by pressing the semiconductor elements to the wiring board while aligning the electrodes and heating the structure. In the mounting method, one or more heat sinks are previously joined to the backs opposite to the surfaces with the bump electrodes formed thereon of the semiconductor elements.Type: GrantFiled: February 2, 1993Date of Patent: September 20, 1994Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masanori Nishiguchi, Atsushi Miki
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Patent number: 5302854Abstract: The present invention comprises the steps of electrically connecting at least one pair of bumps on a semiconductor device, bringing the bumps into contact with a surface of the packaging substrate and moving the semiconductor device relative to the packaging substrate while monitoring whether at least one pair of electrode terminals formed on the surface of the packaging substrate are electrically connected to each other, positioning the semiconductor device with respect to the packaging substrate at a position where the electrode terminals whose electrical connection is monitored are electrically connected to each other, and packaging the semiconductor electrode on the packaging substrate.Type: GrantFiled: October 18, 1991Date of Patent: April 12, 1994Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masanori Nishiguchi, Atsushi Miki
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Patent number: 5298460Abstract: A substrate for packaging a semiconductor device having a bump thereon according to the present invention is characterized by that the substrate has an electrode terminal to which the bump is to be connected, the electrode terminal has a recess formed thereon to the receive at least a top of the bump, and at least a top of the surface of the electrode terminal is covered by a metal layer having a lower melting point than that of the bump.Type: GrantFiled: December 18, 1992Date of Patent: March 29, 1994Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masanori Nishiguchi, Atsushi Miki
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Patent number: 5262355Abstract: This invention is directed to a method for packaging a semiconductor flip chip on a substrate by face-down bonding in which coherent light is used to irradiate a bonding head and the substrate, and the light reflected by the bonding head and the substrate form interference patterns. Adjustment of the inclination of the bonding head against the substrate is performed by observation of the interference fringes caused by the interference between the light reflected by the bonding head and the light reflected by the substrate.Type: GrantFiled: March 15, 1993Date of Patent: November 16, 1993Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masanori Nishiguchi, Atsushi Miki
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Patent number: 5244142Abstract: A method of mounting a plurality of semiconductor elements each having bump electrodes on a wiring board by pressing the semiconductor elements to the wiring board while aligning the electrodes and heating the structure. In the mounting method, one or more heat sinks are previously joined to the backs opposite to the surfaces with the bump electrodes formed thereon of the semiconductor elements.Type: GrantFiled: November 19, 1991Date of Patent: September 14, 1993Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masanori Nishiguchi, Atsushi Miki
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Patent number: 5212880Abstract: This invention is directed to an apparatus for packaging a semiconductor flip chip on a substrate by face-down bonding in which coherent light is used to irradiate a bonding head and the substrate, and the light reflected by the bonding head and the substrate form interference patterns. Adjustment of the inclination of the bonding head against the substrate is performed by observation of the interference fringes caused by the interference between the light reflected by the bonding head and the light reflected by the substrate.Type: GrantFiled: June 18, 1991Date of Patent: May 25, 1993Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masanori Nishiguchi, Atsushi Miki
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Patent number: 5214308Abstract: A substrate for packaging a semiconductor device having a bump thereon according to the present invention is characterized by that the substrate has an electrode terminal to which the bump is to be connected, and a recess for receiving at least a top of the bump is formed in the electrode terminal.Type: GrantFiled: January 23, 1991Date of Patent: May 25, 1993Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masanori Nishiguchi, Atsushi Miki
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Patent number: 5196726Abstract: A substrate for packaging a semiconductor device having a bump thereon according to the present invention is characterized by that the substrate has an electrode terminal to which the bump is to be connected, the electrode terminal has a recess formed thereon to the receive at least a top of the bump, and at least a top of the surface of the electrode terminal is covered by a metal layer having a lower melting point than that of the bump.Type: GrantFiled: January 23, 1991Date of Patent: March 23, 1993Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masanori Nishiguchi, Atsushi Miki
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Patent number: 5165791Abstract: A method of using infrared light for measuring the temperature of a semiconductor element with a surface layer formed by two kinds of materials that have different emissivities and optical reflectances is disclosed. The method includes the step of taking an image with diffused light reflected from the surface of a semiconductor element by an image taking device.Type: GrantFiled: September 13, 1991Date of Patent: November 24, 1992Assignee: Sumitomo Electric Industries, Ltd.Inventors: Atsushi Miki, Masanori Nishiguchi
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Patent number: 5153892Abstract: A novel gas laser apparatus is disclosed, which comprises a hermetic container with a gas laser medium sealed therein, a plurality of main discharge electrodes arranged in the hermetic container for causing the main discharge in the gas laser medium thereby to generate a laser beam, and a device for subjecting the discharge space between the main discharge electrodes to preionization over a wide range thereof before the main discharge by use of a reflected laser beam or an ultraviolet ray lamp.Type: GrantFiled: January 11, 1991Date of Patent: October 6, 1992Assignee: Hitachi, Ltd.Inventors: Yukio Kawakubo, Yoshiyuki Kubota, Kouji Sasaki, Atsushi Miki, Satoshi Ogura
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Patent number: 5092033Abstract: The present invention comprises the steps of electrically connecting at least one pair of bumps on the semiconductor device, bringing the bumps into contact with a surface of the packaging substrate and moving the semiconductor device relative to the packaging substrate while monitoring whether at least one pair of electrode terminals formed on the surface of the packaging substrate are electrically connected to each other, positioning the semiconductor device with respect to the packaging substrate at a position where the electrode terminals whose electrical connection is monitored are electrically connected to each other, and packaging the semiconductor electrode on the packaging substrate.Type: GrantFiled: January 23, 1991Date of Patent: March 3, 1992Assignee: Sumitomo Electric Industries, Ltd.Inventors: Masanori Nishiguchi, Atsushi Miki
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Patent number: 4808492Abstract: An electrolyte-type fuel cell, i.e., a fuel cell using a liquid electrolyte, which comprises at least one unit cell comprising a matrix for retaining a liquid electrolyte and a pair of gas diffusible electrodes each having a gas flow passage and provided at both sides of the matrix and in direct contact with the matrix, and a pair of gas supply-discharge means for supplying and discharging a necessary gas to and from the gas passages of the corresponding gas-diffusible electrodes of the unit cell, at least one of the gas passages of the gas-diffusible electrodes being communicated with the matrix through at least one liquid electrolyte passage, at least one demister being provided in the gas flow passage and on the liquid electrolyte passage exposed in the gas flow passage, and a means for generating electrolyte mists being provided at the supplying side of at least one of the gas supply-discharge means can supply a liquid electrolyte to the matrix with a high trapping efficiency of liquid electrolyte mists.Type: GrantFiled: December 8, 1987Date of Patent: February 28, 1989Assignee: Hitachi. Ltd.Inventors: Norihira Uozumi, Koji Amakawa, Yoshiyuki Kubota, Atsushi Miki, Yasuyuki Tsutsumi
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Patent number: 4571570Abstract: A winding for a static induction apparatus such as a transformer, a reactor and the like comprises a plurality of interleaved coils each formed by winding an electrically insulated strand conductor in a radial spiral. The coils are stacked axially and electrically connected in series between a line terminal and another terminal such as a neutral terminal. The winding is divided into a plurality of blocks each including a plurality of ones of the interleaved coils. The number of turns of each coil belonging to the block on the other terminal side is decreased as compared with that of each coil belonging to the block located closer to the line terminal, to thereby reduce the series electrostatic capacitance of the coils stepwise from one to another block starting from the one located on the line terminal side. The distribution constant is thus decreased. Favorable surge withstanding characteristics are attained, reliable insulation is assured and the winding can be realized in a reduced size.Type: GrantFiled: October 5, 1984Date of Patent: February 18, 1986Assignee: Hitachi, Ltd.Inventors: Atsushi Miki, Etsunori Mori, Minoru Hoshi, Masaru Higaki
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Patent number: 4554523Abstract: A winding for a static induction apparatus such as a transformer, a reactor and the like comprises a plurality of interleaved coils each formed by winding an electrically insulated strand conductor in a radial spiral. The coils are stacked axially and electrically connected in series between a line terminal and another terminal such as a neutral terminal. The winding is divided into a plurality of blocks each including a plurality of ones of the interleaved coils. The number of turns of each coil belonging to the block on the other terminal side is decreased as compared with that of each coil belonging to the block located closer to the line terminal, to thereby reduce the series electrostatic capacitance of the coils stepwise from one to another block starting from the one located on the line terminal side. The distribution constant is thus decreased. Favorable surge withstanding characteristics are attained, reliable insulation is assured and the winding can be realized in a reduced size.Type: GrantFiled: October 5, 1984Date of Patent: November 19, 1985Assignee: Hitachi, Ltd.Inventors: Atsushi Miki, Etsunori Mori, Minoru Hoshi, Masaru Higaki