Patents by Inventor Atsushi Ogura
Atsushi Ogura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20040173745Abstract: Disclosed is a defect evaluation apparatus comprising a source section having a source for generating positrons and a moderator for decelerating the positrons, a sample holding section for holding a sample to be measured, a transfer section for transferring the positrons from the source section to the sample holding section, and detection means for detecting &ggr; rays emitted from the sample being measured, characterized in that the apparatus further comprises heating means for heating the moderator in a position where there is a possibility of the source being thermally damaged if there is no protection means mentioned below in the source section, and protection means for protecting the source from the heating means and heated moderator when the moderator is being heated using the heating means.Type: ApplicationFiled: August 28, 2003Publication date: September 9, 2004Applicant: SEMICONDUCTOR TECHNOLOGY ACADEMIC RESEARCH CENTERInventors: Akira Uedono, Atsushi Ogura
-
Publication number: 20040129975Abstract: A semiconductor device includes a semiconductor layer formed on an insulator, a gate insulating film formed on the semiconductor layer, a gate electrode formed on the gate insulating film and extending in a first direction, source/drain regions formed in the semiconductor layer on both sides of the gate electrode, a body contact region in the semiconductor layer, a partial isolating region in which a field insulating film thicker than the gate insulating film intervenes between the semiconductor layer and an extending portion of the gate electrode, and a full isolating region in which the semiconductor layer on the insulator is removed. The full isolating region is formed to be in contact with at least a part of a side parallel to the first direction of the source/drain regions.Type: ApplicationFiled: September 24, 2003Publication date: July 8, 2004Applicant: NEC CORPORATIONInventors: Risho Koh, Shigeharu Yamagami, Jong-wook Lee, Hitoshi Wakabayashi, Yukishige Saito, Atsushi Ogura, Mitsuru Narihiro, Kohichi Arai, Hisashi Takemura, Tohru Mogami, Toyoji Yamamoto, Yukinori Ochiai
-
Patent number: 6548379Abstract: A SOI substrate includes a SiO2 film (230) having a center located at the depth of the damage peak where the crystal damage is maximum after the Si substrate (10) is ion-implanted with oxygen ions. Even if a crystal defect (240) remains at the depth of the density peak where the density is maximum, the crystal defect does not effect the device operation because it is outside the active layer. By using a low-dose SIMOX process, a lower-cost SOI substrate can be obtained wherein crystal defects formed in the active layer are reduced.Type: GrantFiled: May 29, 2001Date of Patent: April 15, 2003Assignee: NEC CorporationInventor: Atsushi Ogura
-
Patent number: 6506662Abstract: A method for forming a silicon on insulator substrate includes the step of dissociating a plasma of molecules including at least any one of oxygen and nitrogen to obtain ions. The ions are accelerated by passage through gaps between acceleration electrodes at a predetermined acceleration energy for irradiation of the accelerated ions onto a silicon substrate which is heated to form an insulation film within the silicon substrate.Type: GrantFiled: February 9, 2000Date of Patent: January 14, 2003Inventors: Atsushi Ogura, Youichirou Numasawa, Akira Doi, Masayasu Tanjyo
-
Patent number: 6489654Abstract: There is provided a method of fabricating a silicon-on-insulator substrate, including the steps of (a) forming a silicon substrate at a surface thereof with an oxygen-containing region containing oxygen at such a concentration that oxygen is not precipitated in the oxygen-containing region in later mentioned heat treatment, (b) forming a silicon oxide film at a surface of the silicon substrate, (c) implanting hydrogen ions into the silicon substrate through the silicon oxide film, (d) overlapping the silicon substrate and a support substrate each other so that the silicon oxide film makes contact with the support substrate, and (e) applying heat treatment to the thus overlapped silicon substrate and support substrate to thereby separate the silicon substrate into two pieces at a region into which the hydrogen ions have been implanted, one of the two pieces remaining on the silicon oxide film as a silicon-on-insulator active layer.Type: GrantFiled: March 3, 2000Date of Patent: December 3, 2002Assignee: NEC CorporationInventor: Atsushi Ogura
-
Publication number: 20020155679Abstract: A method for forming a silicon on insulator substrate includes the step of dissociating a plasma of molecules including at least any one of oxygen and nitrogen to obtain ions. The ions are accelerated by passage through gaps between acceleration electrodes at a predetermined acceleration energy for irradiation of the accelerated ions onto a silicon substrate which is heated to form an insulation film within the silicon substrate.Type: ApplicationFiled: February 9, 2000Publication date: October 24, 2002Inventors: Atsushi Ogura, Youichirou Numasawa, Akira Doi, Masayasu Tanjyo
-
Publication number: 20020153563Abstract: There is provided a method of fabricating a silicon-on-insulator substrate, including the steps of (a) forming a silicon substrate at a surface thereof with an oxygen-containing region containing oxygen at such a concentration that oxygen is not precipitated in the oxygen-containing region in later mentioned heat treatment, (b) forming a silicon oxide film at a surface of the silicon substrate, (c) implanting hydrogen ions into the silicon substrate through the silicon oxide film, (d) overlapping the silicon substrate and a support substrate each other so that the silicon oxide film makes contact with the support substrate, and (e) applying heat treatment to the thus overlapped silicon substrate and support substrate to thereby separate the silicon substrate into two pieces at a region into which the hydrogen ions have been implanted, one of the two pieces remaining on the silicon oxide film as a silicon-on-insulator active layer.Type: ApplicationFiled: March 3, 2000Publication date: October 24, 2002Inventor: Atsushi Ogura
-
Patent number: 6316337Abstract: After O2+ ions are implanted in a silicon substrate (10), heat treatment is applied to the silicon substrate at a temperature of from 1,200° C. to 1,410° C., both inclusive, in an atmosphere having an oxygen content of from 0.1% to 1%, both inclusive, whereby a buried oxide layer (50) is formed. Subsequent to the above heat treatment, post heat treatment may be applied to the silicon substrate (10) at a temperature of from 1,200° C. to 1,410° C., both inclusive, in an atmosphere having an oxygen content of from 1% to 30%, both inclusive. Further, prior to the heat treatment, provisional heat treatment may be applied to the silicon substrate 10 at a temperature of form 350° C. to 1,000° C., both inclusive, for 1 hour or longer.Type: GrantFiled: September 21, 1998Date of Patent: November 13, 2001Assignee: NEC CorporationInventor: Atsushi Ogura
-
Patent number: 6211041Abstract: There is provided a method of fabricating a silicon-on-insulator substrate, including the steps of (a) forming a silicon substrate at a surface thereof with an oxygen-containing region containing oxygen at such a concentration that oxygen is not precipitated in the oxygen-containing region in later mentioned heat treatment, (b) forming a silicon oxide film at a surface of the silicon substrate, (c) implanting hydrogen ions into the silicon substrate through the silicon oxide film, (d) overlapping the silicon substrate and a support substrate each other so that the silicon oxide film makes contact with the support substrate, and (e) applying heat treatment to the thus overlapped silicon substrate and support substrate to thereby separate the silicon substrate into two pieces at a region into which the hydrogen ions have been implanted, one of the two pieces remaining on the silicon oxide film as a silicon-on-insulator active layer.Type: GrantFiled: April 16, 1999Date of Patent: April 3, 2001Assignee: NEC CorporationInventor: Atsushi Ogura
-
Patent number: 6162539Abstract: A luminous fiber described below, which does not exert a harmful effect on human bodies and is capable of emitting light for a long period of time with a high luminance, and a process for producing the luminous fiber are provided.A high luminance luminous fiber comprising a core component containing a polyolefin resin and 10-60% by weight, relative to the core component, of a luminous pigment comprising sintered fine powders represented by the formula of(M.sub.0.9995-0.998 Eu.sub.0.0005-0.002)Al.sub.2 O.sub.4.(M.sub.0.9995-0.998 Eu.sub.0.0005-0.002)O.n(Al.sub.1-b-a B.sub.b Q.sub.a).sub.2 O.sub.3,wherein M represents at least one element selected from the group consisting of Sr, Ca, Mg and Ba, Q represents at least one element selected from the group consisting of Y, lanthanoid elements, Mn and Bi, a is 0.0005-0.002, b is 0.001-0.35 and n is an integer of 1-8, and a sheath component comprising a polyolefin resin containing no luminous pigment.Type: GrantFiled: August 23, 1999Date of Patent: December 19, 2000Assignees: Mitsubishi Rayon Co., Ltd., Chemitech, Inc. Ltd.Inventors: Yoshishige Shimizu, Ken Ogasawara, Hideo Sakakura, Atsushi Ogura, Daiji Goto
-
Patent number: 6074928Abstract: An oxygen ion is implanted into a silicon substrate at a dose of 3.times.10.sup.17 (cm.sup.-2) or lower. Then, the silicon substrate is heated at 1250.degree. C. or lower for 40 minute or longer. And the silicon substrate is heated at 1300.degree. C. or higher in an inert gas atmosphere. Further, the silicon substrate is heated at 1300.degree. C. or higher in an atmosphere containing an oxygen gas in an amount of 1% by volume or more.Type: GrantFiled: February 12, 1998Date of Patent: June 13, 2000Assignee: NEC CorporationInventor: Atsushi Ogura
-
Patent number: 5888297Abstract: The invention provides a method of fabricating an SOI substrate including the steps of introducing crystal defects at a desired depth in a silicon substrate, and thereafter, implanting oxygen or nitrogen ions into the silicon substrate, and thermally annealing the silicon substrate. The method of the present invention makes it possible to fabricate an SOI substrate with fewer crystal defects and lower fabrication cost than is possible according to the prior art.Type: GrantFiled: December 11, 1995Date of Patent: March 30, 1999Assignee: NEC CorporationInventor: Atsushi Ogura
-
Patent number: 5853614Abstract: Long decay luminescent materials having improved long decay time and improved high brightness is represented by the formula asSr.sub.0.9995 .about..sub.0.998 Eu.sub.0.0005 .about..sub.0.002)Al.sub.2 O.sub.4 .multidot.(Sr.sub.0.9995 .about..sub.0.998 Eu.sub.0.0005 .about..sub.0.002)O .multidot.n(Al.sub.1-a-b B.sub.b Dy.sub.a).sub.2 O.sub.3in it a=0.0005.about.0.0002, b=0.0001.about.0.35, n=1.about.8 and the method for manufacturing the long decay luminescent materials is characterized in heating the raw materials as SrCo.sub.3, .alpha. type alumina, .gamma. type alumina, boron-containing compound, Eu.sub.2 O.sub.3 and Dy.sub.2 O.sub.3 gradually from 400.degree. C. up to 1250.degree. C..about.1600.degree. C. during 7.about.10 hours, firing it at 1250.degree. C..about.1600.degree. C. for 3.about.5 hours and then cooing it gradually from 1250.degree. C..about.1600.degree. C. down to 200.degree. C. during 7.about.Type: GrantFiled: July 21, 1997Date of Patent: December 29, 1998Assignees: Beijing Hongye Coating Materials Company, Chemitech, Inc.Inventors: Qinglong Hao, Qian Xu, Jun Li, Pengcheng Li, Baochan Liu, Atsushi Ogura, Qingfen Hao
-
Patent number: 5668046Abstract: In a field intensity relaxation of the drain end of a MOSFET, a projective area is not increased with a reduced electrostatic coupling of the source or drain with the gate. The MOSFET satisfying such condition is fabricated on the SOIS film formed by processes of the lateral vapor phase epitaxial growth and the like. A U-shape low concentration impurity region is provided on a gate electrode through a gate dioxide film and high concentration impurity regions are formed at the tops of protrusions. The gate electrode is embedded in insulation films, and the transistor region is fabricated by the lateral vapor phase epitaxial growth and the like.Type: GrantFiled: March 30, 1995Date of Patent: September 16, 1997Assignee: NEC CorporationInventors: Risho Koh, Atsushi Ogura
-
Patent number: 5650042Abstract: In an SOI substrate having a base substrate, an insulating film and a semiconductor active layer, a potential difference is given between the base substrate and an etching solution or among the base substrate, the semiconductor active layer and the etching solution to form a uniform depletion layer on the active layer side from the interface between the insulating film and the active layer. The semiconductor active layer is uniformly thinned down by etching using a solution or by the combination of chemical or electro-chemical surface and etching with the resultant reaction product. In this case, the individual electrodes are provided with seal members to prevent the base substrate electrode and the active layer electrode from contacting the etching solution or the reaction solution due to the etching using the etching solution or the chemical reaction using the reaction solution.Type: GrantFiled: September 27, 1995Date of Patent: July 22, 1997Assignee: NEC CorporationInventor: Atsushi Ogura
-
Patent number: 5556503Abstract: In an SOI substrate having a base substrate, an insulating film and a semiconductor active layer, a potential difference is given between the base substrate and an etching solution or among the base substrate, the semiconductor active layer and the etching solution to form a uniform depletion layer on the active layer side from the interface between the insulating film and the active layer. The semiconductor active layer is uniformly thinned down by etching using a solution or by the combination of chemical or electro-chemical surface and etching with the resultant reaction product. In this case, the individual electrodes are provided with seal members to prevent the base substrate electrode and the active layer electrode from contacting the etching solution or the reaction solution due to the etching using the etching solution or the chemical reaction using the reaction solution.Type: GrantFiled: September 27, 1995Date of Patent: September 17, 1996Assignee: NEC CorporationInventor: Atsushi Ogura
-
Patent number: 5427976Abstract: In a field intensity relaxation of the drain end of a MOSFET, a projective area is not increased with a reduced electrostatic coupling of the source or drain with the gate. The MOSFET satisfying such condition is fabricated on the SOIS film formed by processes of the lateral vapor phase epitaxial growth and the like. A U-shape low concentration impurity region is provided on a gate electrode through a gate dioxide film and high concentration impurity regions are formed at the tops of protrusions. The gate electrode is embedded in insulation films, and the transistor region is fabricated by the lateral vapor phase epitaxial growth and the like.Type: GrantFiled: March 26, 1992Date of Patent: June 27, 1995Assignee: NEC CorporationInventors: Risho Koh, Atsushi Ogura
-
Patent number: 5271969Abstract: A metal oxide ceramic composite powder has crystals of a reacted and precipitated metal oxide distributed on fine particles of a ceramic material. The metal oxide is derived from an aqueous solution of metal chloride, which in the presence of a magnetic field, forms a complex ion solution. The complex ion may comprise a proportional blend of metallic and semi-metallic elements to produce specific properties. The complex ion is reacted and precipitated with an alkaline material to deposit a high purity metal oxide on the ceramic material. Each ceramic particle thus has a uniform coating of a high purity metal oxide deposited thereon.Type: GrantFiled: May 4, 1992Date of Patent: December 21, 1993Assignee: Atsushi OguraInventor: Atsushi Ogura
-
Patent number: 5120611Abstract: A metal oxide ceramic composite powder has crystals of a reacted and precipitated metal oxide distributed on fine particles of a ceramic material. The metal oxide is derived from an aqueous solution of metal chloride, which in the presence of a magnetic field, forms a complex ion solution. The complex ion may comprise a proportional blend of metallic and semi-metallic elements to produce specific properties. The complex ion is reacted and precipitated with an alkaline material to deposit a high purity metal oxide on the ceramic material. Each ceramic particle thus has a uniform coating of a high purity metal oxide deposited thereon.Type: GrantFiled: August 9, 1990Date of Patent: June 9, 1992Assignee: Atsushi OguraInventor: Atsushi Ogura
-
Patent number: 5110774Abstract: A metal oxide-ceramic composite powder consisting of fine ceramic particles having a metal oxide coating firmly bonded to the surface thereof is molten at high temperature and then cooled to produce a material in the form of a solid solution in which the metal oxide component and the ceramic component are substantially homogeneously mixed together. Also, the metal oxide-ceramic composite powder is mixed with fine particles of a second ceramic and/or particles of a metal, and the mixture is baked to produce a sintered material.Type: GrantFiled: August 9, 1990Date of Patent: May 5, 1992Assignee: Atsushi OguraInventor: Atsushi Ogura