Abstract: An R-T-B permanent magnet that contains: main-phase grains composed of an R2T14B compound (where R is a rare earth element, T is a transition metal element, and B is boron); and grain boundaries. R includes Ce. The grain boundaries include multi-grain grain boundaries that are adjacent to three or more main-phase grains. The multi-grain grain boundaries include an R-rich phase, and lamellar or acicular R-T precipitates are present in the R-rich phase.

Abstract: A compound represented by formula (1-1): wherein b represents an integer of 1 to 5; and Z is a group represented by formula (Z-1), formula (Z-2), formula (Z-3), formula (Za-1), formula (Za-2), formula (Za-3), formula (Za-4) or formula (Za-5), or a salt thereof.

Abstract: A compound represented by formula (1-1): wherein b represents an integer of 1 to 5; and Z is a group represented by formula (Z-1), formula (Z-2), formula (Z-3), formula (Za-1), formula (Za-2), formula (Za-3), formula (Za-4) or formula (Za-5), or a salt thereof.

Abstract: An agent for eliminating a pluripotent stem cell, the agent comprising an antibody-drug conjugate that releases a compound represented by formula (1-1): wherein b represents an integer of 1 to 5; and Z represents a group represented by formula (Z-1) or formula (Z-2), or a salt thereof.

Abstract: A compound represented by formula (1): wherein b represents an integer of 1 to 5; X represents —NH— or —CO—; Z represents a group represented, for example, by formula (Z-1); R1 represents a hydrogen atom or (AB)m; AB represents a particular amino acid residue, and when there is a plurality of ABs, each AB may be the same as or different from each other and ABs are bonded to each other via an amide bond; m represents an integer of 1 to 9; R2 represents a hydroxy group or (AC)g; AC represents a particular amino acid residue, and when there is a plurality of ACs, each AC may be the same as or different from each other and ACs are bonded to each other via an amide bond; and g represents an integer of 1 to 9, or a salt thereof.

Abstract: A compound represented by formula (1): wherein R1 represents a hydrogen atom or a sulfonyl group; and Z represents a group represented by formula (Z-1), or a salt thereof.

Abstract: An amplifier circuit according to the present invention includes a first block, a second block, a transformer, and a reference node and operates as a negative impedance converter circuit. A circuit configuration formed by a first transistor and at least one first passive component in the first block with respect to a first terminal of the transformer and a circuit configuration formed by a second transistor and at least one second passive component in the second block with respect to a second terminal of the transformer are the same as each other.

Abstract: A compound represented by formula (1): wherein AA represents a particular amino acid residue or a C1-6 alkyl ester thereof, and when there is a plurality of AAs, each AA may be the same as or different from each other and AAs are bonded to each other via an amide bond; an N-terminal nitrogen atom of (AA)m forms an amide bond together with carbonyl (a); Q represents an unsubstituted phenyl group, or a group represented by formula (Q-1), formula (Qa-2), formula (Qa-3), formula (Qa-4), formula (Qa-5), formula (Qa-6) or formula (Qa-7); R1a and R1b each independently represent a hydrogen atom or a C1-6 alkyl group; and m represents an integer of 1 to 10, or a salt thereof.

Abstract: A compound represented by formula (1-1): wherein b represents an integer of 1 to 5; and Z is a group represented by formula (Z-1), formula (Z-2), formula (Z-3), formula (Za-1), formula (Za-2), formula (Za-3), formula (Za-4) or formula (Za-5), or a salt thereof.

Abstract: An electromagnetic wave shielding member includes a dielectric layer, first conductor plates arranged on one surface of the dielectric layer, and second conductor plates arranged opposed to the first conductor plates on the other surface of the dielectric layer, wherein the first and second conductor plates are arranged at regular intervals to have three or more-fold rotational symmetry about an optional reference point on the one surface of the dielectric layer on which the first conductor plates are arranged, and are arranged independent from each other.

Abstract: A bandpass filter includes a combination of a BAW filter and a patterned planar filter with stubs. The BAW filter is composed of a plurality of piezoelectric resonators to give a specific frequency bandpass, while the planer filter is configured to attenuate frequencies near and outside the bandpass. The resonators are connected in a ladder configuration between a first signal transmission path and a ground. The planar filter includes a strip line formed on a dielectric layer to define a second signal transmission path. The BAW filter and the planar filter are formed on a common substrate with the first and second transmission paths connected to each other. The BAW filter, in combination with the patterned planar filter added with the stub, can improve a deep near-band rejection inherent to the BAW filter, exhibiting an excellent out-of-band rejection over certain adjacent frequency ranges outside of the bandpass, and therefore give a sharp and wide bandpass.

Abstract: A bandpass filter includes a combination of a BAW filter and a patterned planar filter with stubs. The BAW filter is composed of a plurality of piezoelectric resonators to give a specific frequency bandpass, while the planer filter is configured to attenuate frequencies near and outside the bandpass. The resonators are connected in a ladder configuration between a first signal transmission path and a ground. The planar filter includes a strip line formed on a dielectric layer to define a second signal transmission path. The BAW filter and the planar filter are formed on a common substrate with the first and second transmission paths connected to each other. The BAW filter, in combination with the patterned planar filter added with the stub, can improve a deep near-band rejection inherent to the BAW filter, exhibiting an excellent out-of-band rejection over certain adjacent frequency ranges outside of the bandpass, and therefore give a sharp and wide bandpass.

Abstract: A common terminal 500 is connected to drains of FETs 101 and 102 via a capacitor 400. FETs 111 to 114 are serially connected, and inserted between a source of the FET 101 and a terminal 501 via a capacitor 401. Similarly, each of: FETs 121 to 124; FETs 131 to 133; FETs 141 to 143; FETs 151 to 153; and FETs 161 to 163 is inserted between the source of the FET 101 or an FET 102 and a corresponding one of terminals 502 to 506. This configuration allows a stray capacitance value of a transmission/reception path to be reduced at the time of transmission/reception, thereby obtaining a favorable radio-frequency characteristic.

Abstract: A common terminal 500 is connected to drains of FETs 101 and 102 via a capacitor 400. FETs 111 to 114 are serially connected, and inserted between a source of the FET 101 and a terminal 501 via a capacitor 401. Similarly, each of: FETs 121 to 124; FETs 131 to 133; FETs 141 to 143; FETs 151 to 153; and FETs 161 to 163 is inserted between the source of the FET 101 or an FET 102 and a corresponding one of terminals 502 to 506. This configuration allows a stray capacitance value of a transmission/reception path to be reduced at the time of transmission/reception, thereby obtaining a favorable radio-frequency characteristic.

Abstract: Four switching circuit sections consisting of four FETs connected in series are provided between a plurality of input/output terminals which output and input a high frequency signal. Gate control voltages are individually applied to gate terminals of four FETs, respectively, so that an on-state and an off-state are achieved. Further drain control voltages are individually applied to drain terminals or source terminals of the FET in each switching circuit section, and a voltage according to an electric power value of the high frequency signal supplied to each of switching circuit sections is supplied as the gate control voltage and the drain control voltage.

Abstract: A field effect transistor switch circuit may include: (1) first, second, and third switch terminals; (2) a first field effect transistor, a pair of the main electrodes of which are connected respectively to the first switch terminal and the second switch terminal; and (3) a second field effect transistor, a pair of the main electrodes of which are connected respectively to the first switch terminal and the third switch terminal. A first resistor is connected between a control electrode and any one of the pair of the main electrodes of the first field effect transistor, and a second resistor is connected between a control electrode and any one of the pair of the main electrodes of the second field effect transistor.

Abstract: A switching circuit includes: an antenna terminal; a plurality of input/output terminals each for receiving and outputting a signal; and a plurality of basic switching sections each connected between the antenna terminal and an associated one of the input/output terminals. Each of the basic switching sections includes: a through switch formed by FETs connected in series; and a shunt switch. The sources of the FETs forming the through switch and the shunt switch are connected to a first potential fixing terminal through resistors. The resistor connected to the source of the FET at the first stage in the shunt switch is connected to a potential fixing terminal through a diode connected in the forward direction.

Abstract: An object is to provide an antenna switch semiconductor integrated circuit which reduces a consumption current. To this end, of two control input signals which are fed to a logic circuit which controls turning on and off of a plurality of switching FETs, a control input signal for switching between a sending mode and a receiving mode is fed to an oscillation circuit, thereby making the oscillation circuit operate only during the sending mode under which the logic circuit needs a high voltage. A voltage raising circuit accordingly operates, whereby a raised voltage is supplied to the logic circuit. During the receiving mode, the oscillation circuit stops, and the voltage raising circuit stops. With a switch turned on using the logic circuit, a power source voltage is supplied directly to the logic circuit when the voltage raising circuit is not in operation. This shortens the operation time of the voltage raising circuit and reduces the consumption current.

Abstract: First and second through-side field effect transistors are connected between first and second high frequency signal input/output terminals, and an antenna, respectively. The first and the second high frequency signal input/output terminals are connected with one end of the first and the second shunt-side field effect transistors, respectively. A series resonant circuit including a shunt capacitor and a bonding wire is connected between the other end of the first and the second shunt-side field effect transistors, and a ground.

Abstract: Four switching circuit sections consisting of four FETs connected in series are provided between a plurality of input/output terminals which output and input a high frequency signal. Gate control voltages are individually applied to gate terminals of four FETs, respectively, so that an on-state and an off-state are achieved. Further drain control voltages are individually applied to drain terminals or source terminals of the FET in each switching circuit section, and a voltage according to an electric power value of the high frequency signal supplied to each of switching circuit sections is supplied as the gate control voltage and the drain control voltage.