Patents by Inventor Aurore Constant
Aurore Constant has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11721736Abstract: An electronic device can include a gate structure. In an embodiment, the gate structure can include a gate electrode including a doped semiconductor material, a metal-containing member, a pair of conductive sidewall spacers. The first metal-containing member can overlie the gate electrode. The conductive sidewall spacers can overlie the gate electrode and along opposite sides of the first metal-containing member. In another embodiment, the gate structure can include a gate electrode, a first metal-containing member overlying the gate electrode, and a second metal-containing member overlying the first metal-containing member. The first metal-containing member can have a length that is greater than the length of the second metal-containing member and substantially the same length as the gate electrode.Type: GrantFiled: February 10, 2021Date of Patent: August 8, 2023Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Aurore Constant, Joris Baele
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Patent number: 11444090Abstract: An embodiment of a method of forming a programming element using a III/V semiconductor material may include forming one or more recesses in a first portion of a gate material and forming a first conductor on the one or more recesses. In an embodiment, the method may include configuring a programming circuit to form a voltage across the one or more recesses that is greater than a breakdown voltage of the gate material underlying the one or more recesses.Type: GrantFiled: April 20, 2020Date of Patent: September 13, 2022Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Jaume Roig-Guitart, Aurore Constant
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Publication number: 20220254894Abstract: An electronic device can include a gate structure. In an embodiment, the gate structure can include a gate electrode including a doped semiconductor material, a metal-containing member, a pair of conductive sidewall spacers. The first metal-containing member can overlie the gate electrode. The conductive sidewall spacers can overlie the gate electrode and along opposite sides of the first metal-containing member. In another embodiment, the gate structure can include a gate electrode, a first metal-containing member overlying the gate electrode, and a second metal-containing member overlying the first metal-containing member. The first metal-containing member can have a length that is greater than the length of the second metal-containing member and substantially the same length as the gate electrode.Type: ApplicationFiled: February 10, 2021Publication date: August 11, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Aurore CONSTANT, Joris BAELE
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Publication number: 20220052163Abstract: In a high electron mobility transistor (HEMT), dielectric material may be included between edge portions of a HEMT gate and gate field plates in contact with a HEMT gate electrode. At least some portions of the HEMT gate and HEMT gate electrode remain in direct contact with one another, and the HEMT gate electrode and gate field plates may be further connected to a gate metal.Type: ApplicationFiled: October 1, 2020Publication date: February 17, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Peter COPPENS, Aurore CONSTANT, Piet VANMEERBEEK
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Publication number: 20220020857Abstract: A HEMT is described in which a gate contact interlayer is included between a surface dielectric and a gate contact. Further, source, drain, and gate contacts may be self-aligned and formed using a single or same metal and metallization process. A gate may be formed in contact with, and covering a portion of, a barrier layer of the HEMT, with a gate contact formed in contact with the gate. The gate contact interlayer may be formed between a surface dielectric formed on the barrier layer and at least a portion of the gate contact.Type: ApplicationFiled: October 1, 2020Publication date: January 20, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Aurore CONSTANT, Peter COPPENS
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Publication number: 20210327886Abstract: An embodiment of a method of forming a programming element using a III/V semiconductor material may include forming one or more recesses in a first portion of a gate material and forming a first conductor on the one or more recesses. In an embodiment, the method may include configuring a programming circuit to form a voltage across the one or more recesses that is greater than a breakdown voltage of the gate material underlying the one or more recesses.Type: ApplicationFiled: April 20, 2020Publication date: October 21, 2021Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Jaume ROIG-GUITART, Aurore CONSTANT
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Patent number: 11152497Abstract: A semiconductor transistor device includes a GaN transistor including a drain, a gate, and a source, the GaN transistor having a driving voltage applied across the gate and the source and configured to switch between an on-voltage associated with an on-state of the GaN transistor and an off-voltage associated with an off-state of the GaN transistor. The semiconductor transistor device further includes a variable gate-source resistor connected between the gate and the source and having a variable resistance that varies in response to changes in the driving voltage when switching between the on-state and the off-state of the GaN transistor.Type: GrantFiled: October 24, 2018Date of Patent: October 19, 2021Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Jaume Roig-Guitart, Aurore Constant, Frederick Johan G Declercq
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Patent number: 10790374Abstract: Implementations of an ohmic contact for a gallium nitride (GaN) device may include: a first layer including aluminum coupled directly with the GaN device; the GaN having a heterostructure with an undoped GaN channel and a semi-insulating aluminum gallium nitride (AlGaN) barrier, all the foregoing operatively coupled with a substrate; a second layer including titanium coupled over the first layer; and a third layer including an anti-diffusion material coupled with the second layer. A passivation layer may be coupled between the AlGaN barrier and the first layer of the ohmic contact. The passivation layer may surround the ohmic contact.Type: GrantFiled: June 25, 2018Date of Patent: September 29, 2020Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Aurore Constant, Peter Coppens
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Patent number: 10741494Abstract: An electronic device can include a semiconductor layer and a contact structure forming an ohmic contact with the layer. In an embodiment, the semiconductor layer can include a III-N material, and the contact structure includes a first phase and a second phase, wherein the first phase includes Al, the second phase includes a metal, and the first phase contacts the semiconductor layer. In another embodiment, the semiconductor layer can be a monocrystalline layer having a surface along a crystal plane. The contact structure can include a polycrystalline material including crystals having surfaces that contact the surface of the monocrystalline layer, wherein a lattice mismatch between the surface of the monocrystalline layer and the surfaces of the crystals is at most 20%.Type: GrantFiled: November 7, 2018Date of Patent: August 11, 2020Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Aurore Constant, Peter Coppens, Joris Baele
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Patent number: 10680092Abstract: An electronic device can include a channel layer, a first carrier supply layer, a gate electrode of a HEMT, and a drain electrode of the HEMT. The HEMT can have a 2DEG along an interface between the channel and first carrier supply layers. In an aspect, the 2DEG can have a highest density that is the highest at a point between the drain and gate electrodes. In another aspect, the HEMT can further comprise first and second carrier supply layers, wherein the first carrier supply layer is disposed between the channel and second carrier supply layers. The second carrier supply layer be thicker at a location between the drain and gate electrodes. In a further aspect, a process of forming an electronic device can include the HEMT. In a particular embodiment, first and second carrier supply layers can be epitaxially grown from an underlying layer.Type: GrantFiled: October 1, 2018Date of Patent: June 9, 2020Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Peter Moens, Aurore Constant, Peter Coppens, Abhishek Banerjee
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Publication number: 20200144194Abstract: An electronic device can include a semiconductor layer and a contact structure forming an ohmic contact with the layer. In an embodiment, the semiconductor layer can include a III-N material, and the contact structure includes a first phase and a second phase, wherein the first phase includes Al, the second phase includes a metal, and the first phase contacts the semiconductor layer. In another embodiment, the semiconductor layer can be a monocrystalline layer having a surface along a crystal plane. The contact structure can include a polycrystalline material including crystals having surfaces that contact the surface of the monocrystalline layer, wherein a lattice mismatch between the surface of the monocrystalline layer and the surfaces of the crystals is at most 20%.Type: ApplicationFiled: November 7, 2018Publication date: May 7, 2020Applicant: Semiconductor Components Industries, LLCInventors: Aurore CONSTANT, Peter COPPENS, Joris BAELE
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Publication number: 20200135907Abstract: A semiconductor transistor device includes a GaN transistor including a drain, a gate, and a source, the GaN transistor having a driving voltage applied across the gate and the source and configured to switch between an on-voltage associated with an on-state of the GaN transistor and an off-voltage associated with an off-state of the GaN transistor. The semiconductor transistor device further includes a variable gate-source resistor connected between the gate and the source and having a variable resistance that varies in response to changes in the driving voltage when switching between the on-state and the off-state of the GaN transistor.Type: ApplicationFiled: October 24, 2018Publication date: April 30, 2020Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Jaume ROIG-GUITART, Aurore CONSTANT, Frederick Johan G DECLERCQ
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Publication number: 20200105916Abstract: An electronic device can include a channel layer, a first carrier supply layer, a gate electrode of a HEMT, and a drain electrode of the HEMT. The HEMT can have a 2DEG along an interface between the channel and first carrier supply layers. In an aspect, the 2DEG can have a highest density that is the highest at a point between the drain and gate electrodes. In another aspect, the HEMT can further comprise first and second carrier supply layers, wherein the first carrier supply layer is disposed between the channel and second carrier supply layers. The second carrier supply layer be thicker at a location between the drain and gate electrodes. In a further aspect, a process of forming an electronic device can include the HEMT. In a particular embodiment, first and second carrier supply layers can be epitaxially grown from an underlying layer.Type: ApplicationFiled: October 1, 2018Publication date: April 2, 2020Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Peter MOENS, Aurore CONSTANT, Peter COPPENS, Abhishek BANERJEE
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Patent number: 10504884Abstract: In an aspect, a circuit can include drain and source terminals; a HEMT having a drain and a source, wherein the drain is coupled to the drain terminal; and a variable resistor having a first electrode and a second electrode. The first electrode can be coupled to the source of the HEMT, and the second electrode can be coupled to the source terminal. In another aspect, an electronic device can include a source terminal; a heterojunction between a channel layer and a barrier layer; a source electrode of a HEMT overlying the channel layer; a first resistor electrode overlying the channel layer and spaced apart from the source electrode, wherein the first resistor electrode is coupled to the source terminal; and a variable resistor, wherein from a top view, the variable resistor is disposed along the heterojunction between the source electrode and the first resistor electrode.Type: GrantFiled: May 11, 2018Date of Patent: December 10, 2019Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Jaume Roig-Guitart, Aurore Constant
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Publication number: 20190348410Abstract: In an aspect, a circuit can include drain and source terminals; a HEMT having a drain and a source, wherein the drain is coupled to the drain terminal; and a variable resistor having a first electrode and a second electrode. The first electrode can be coupled to the source of the HEMT, and the second electrode can be coupled to the source terminal. In another aspect, an electronic device can include a source terminal; a heterojunction between a channel layer and a barrier layer; a source electrode of a HEMT overlying the channel layer; a first resistor electrode overlying the channel layer and spaced apart from the source electrode, wherein the first resistor electrode is coupled to the source terminal; and a variable resistor, wherein from a top view, the variable resistor is disposed along the heterojunction between the source electrode and the first resistor electrode.Type: ApplicationFiled: May 11, 2018Publication date: November 14, 2019Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Jaume ROIG-GUITART, Aurore CONSTANT
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Publication number: 20190334021Abstract: An electronic device can include a first layer including a III-V material, and a conductive layer including a first film that contacts the first layer, wherein the first film includes Ta—Si compound. In an embodiment, the electronic device can be a high electron mobility transistor (HEMT), the first layer can be a barrier layer between a channel layer and the source and drain electrodes. The source and drain electrodes are formed from the conductive layer. In a particular embodiment, the barrier layer can include AlGaN and be undoped or unintentional doped, and a Ta—Si compound can be the first film that contacts AlGaN within the barrier layer. The Ta—Si compound allows for relatively low contact resistance to be achieved without a relatively high temperature anneal or unusual sensitivity to the thickness of the first film that contains the Ta—Si compound.Type: ApplicationFiled: July 12, 2019Publication date: October 31, 2019Applicant: Semiconductor Components Industries, LLCInventors: Peter Coppens, Aurore Constant
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Publication number: 20190252509Abstract: An electronic device can include a first layer including a III-V material, and a conductive layer including a first film that contacts the first layer, wherein the first film includes Ta—Si compound. In an embodiment, the electronic device can be a high electron mobility transistor (HEMT), the first layer can be a barrier layer between a channel layer and the source and drain electrodes. The source and drain electrodes are formed from the conductive layer. In a particular embodiment, the barrier layer can include AlGaN, and TaSi can be the first film that contacts AlGaN within the barrier layer. The Ta—Si compound allows for relatively low contact resistance to be achieved without a relatively high temperature anneal or unusual sensitivity to the thickness of the first film that contains the Ta—Si compound.Type: ApplicationFiled: February 9, 2018Publication date: August 15, 2019Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Peter COPPENS, Aurore CONSTANT
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Publication number: 20180308946Abstract: Implementations of an ohmic contact for a gallium nitride (GaN) device may include: a first layer including aluminum coupled directly with the GaN device; the GaN having a heterostructure with an undoped GaN channel and a semi-insulating aluminum gallium nitride (AlGaN) barrier, all the foregoing operatively coupled with a substrate; a second layer including titanium coupled over the first layer; and a third layer including an anti-diffusion material coupled with the second layer. A passivation layer may be coupled between the AlGaN barrier and the first layer of the ohmic contact. The passivation layer may surround the ohmic contact.Type: ApplicationFiled: June 25, 2018Publication date: October 25, 2018Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Aurore CONSTANT, Peter COPPENS
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Patent number: 10032880Abstract: Implementations of an ohmic contact for a gallium nitride (GaN) device may include: a first layer including aluminum coupled directly with the GaN device; the GaN having a heterostructure with an undoped GaN channel and a semi-insulating aluminum gallium nitride (AlGaN) barrier, all the foregoing operatively coupled with a substrate; a second layer including titanium coupled over the first layer; and a third layer including an anti-diffusion material coupled with the second layer. The passivation layer may be coupled between the AlGaN barrier and the first layer of the ohmic contact. The passivation layer may surround the ohmic contact.Type: GrantFiled: October 10, 2016Date of Patent: July 24, 2018Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Aurore Constant, Peter Coppens
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Publication number: 20180102416Abstract: Implementations of an ohmic contact for a gallium nitride (GaN) device may include: a first layer including aluminum coupled directly with the GaN device; the GaN having a heterostructure with an undoped GaN channel and a semi-insulating aluminum gallium nitride (AlGaN) barrier, all the foregoing operatively coupled with a substrate; a second layer including titanium coupled over the first layer; and a third layer including an anti-diffusion material coupled with the second layer. Where a passivation layer is coupled between the AlGaN barrier and the first layer of the ohmic contact. Where the passivation layer surrounds the ohmic contact.Type: ApplicationFiled: October 10, 2016Publication date: April 12, 2018Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Aurore CONSTANT, Peter COPPENS