Patents by Inventor Avraham Kliger

Avraham Kliger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10938444
    Abstract: A full duplex repeater includes an upstream echo canceller and noise reduction circuitry. The noise reduction circuitry is configured to receive an upstream signal from the upstream echo canceller, separate the upstream signal into a plurality of Fast Fourier Transform (FFT) blocks, multiply the upstream signal by a 100% raised cosine window, convert the upstream signal into frequency domain using FFT, clean predetermined portions of the upstream signal in the FFT blocks based on a predetermined threshold, convert the upstream signal from frequency domain to time domain using Inverse FFT; and recombine the FFT blocks.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: March 2, 2021
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Avraham Kliger, Anatoli Shindler, Yitshak Ohana
  • Publication number: 20210013924
    Abstract: A full duplex repeater includes an upstream echo canceller and noise reduction circuitry. The noise reduction circuitry is configured to receive an upstream signal from the upstream echo canceller, separate the upstream signal into a plurality of Fast Fourier Transform (FFT) blocks, multiply the upstream signal by a 100% raised cosine window, convert the upstream signal into frequency domain using FFT, clean predetermined portions of the upstream signal in the FFT blocks based on a predetermined threshold, convert the upstream signal from frequency domain to time domain using Inverse FFT; and recombine the FFT blocks.
    Type: Application
    Filed: August 20, 2019
    Publication date: January 14, 2021
    Applicant: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Avraham Kliger, Anatoli Shindler, Yitshak Ohana
  • Patent number: 10560437
    Abstract: A device may include a processor circuit configured to transmit, over a network medium, a request for transmission of a data communication to a first device of a network, and receive, over the network medium, a grant of the request. When the first device is associated with a first security profile, the processor circuit may be configured to encrypt the data communication based at least on a first password associated with the first security profile. When the first device is associated with a second security profile, the processor circuit may be configured to encrypt the data communication based at least on a second password associated with the second security profile. The second password may be associated with a higher password strength than the first password. The processor circuit may be configured to transmit, over the network medium, the encrypted data communication to the first device in response to the grant.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: February 11, 2020
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Philippe Klein, Avraham Kliger, Yitshak Ohana
  • Patent number: 10237824
    Abstract: A device for power efficient networking may include a processor circuit configured to identify a time to enter a low power state. The processor circuit may be further configured to transmit, prior to the identified time, transmission parameters to a network coordinator device for a network of devices, the transmission parameters being associated with a transmission from at least one of the devices to the device. The processor circuit may be further configured to enter the low power state at the identified time. The processor circuit may be further configured to, upon exiting the low power state, receive the transmission from at least one of the devices based at least in part on the transmission parameters. The processor circuit may be further configured to receive the transmission without participating in a node admission process after exiting the low power state.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: March 19, 2019
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Avraham Kliger, Yitshak Ohana
  • Publication number: 20190081749
    Abstract: A device for coordinating frequency division multiplexing transmissions over a shared transmission medium may include a processor circuit configured to receive bandwidth requests from devices for transmissions over the shared transmission medium during a time period. A first bandwidth request may correspond to a point-to-multipoint transmission over the shared transmission medium. The processor circuit may be further configured to schedule bandwidth allocations on the shared transmission medium for the time period based at least in part on the bandwidth requests, where a first bandwidth allocation that corresponds to the first point-to-multipoint transmission is scheduled during the time period prior to other bandwidth allocations. The processor circuit may be further configured to transmit, over the shared transmission medium, an indication of the bandwidth allocations.
    Type: Application
    Filed: November 9, 2018
    Publication date: March 14, 2019
    Inventors: Avraham KLIGER, Yitshak OHANA
  • Patent number: 10225108
    Abstract: A device implementing a channel estimation for multi-channel transmissions system may include at least one processor configured to receive a set of signals over a set of channels, wherein each signal of the set of signals includes one of a set of channel estimation sequences. The set of channel estimation sequences may have been selected based at least in part on a signal quality metric, such as a peak-to-average power ratio, associated with a combination of the set of signals. The at least one processor may be further configured to perform a channel estimation for each channel based at least in part on the channel estimation sequence included in the signal received over each channel. In one or more implementations, the set of channel estimation sequences may be selected to minimize the signal quality metric associated with the combination of the plurality of channels.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: March 5, 2019
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Avraham Kliger, Leo Montreuil
  • Publication number: 20190014091
    Abstract: A device may include a processor circuit configured to transmit, over a network medium, a request for transmission of a data communication to a first device of a network, and receive, over the network medium, a grant of the request. When the first device is associated with a first security profile, the processor circuit may be configured to encrypt the data communication based at least on a first password associated with the first security profile. When the first device is associated with a second security profile, the processor circuit may be configured to encrypt the data communication based at least on a second password associated with the second security profile. The second password may be associated with a higher password strength than the first password. The processor circuit may be configured to transmit, over the network medium, the encrypted data communication to the first device in response to the grant.
    Type: Application
    Filed: September 17, 2018
    Publication date: January 10, 2019
    Inventors: Philippe KLEIN, Avraham KLIGER, Yitshak OHANA
  • Patent number: 10158457
    Abstract: A device for coordinating frequency division multiplexing transmissions over a shared transmission medium may include a processor circuit configured to receive bandwidth requests from devices for transmissions over the shared transmission medium during a time period. A first bandwidth request may correspond to a point-to-multipoint transmission over the shared transmission medium. The processor circuit may be further configured to schedule bandwidth allocations on the shared transmission medium for the time period based at least in part on the bandwidth requests, where a first bandwidth allocation that corresponds to the first point-to-multipoint transmission is scheduled during the time period prior to other bandwidth allocations. The processor circuit may be further configured to transmit, over the shared transmission medium, an indication of the bandwidth allocations.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: December 18, 2018
    Assignee: Avago Technologies International Sales PTE. Limited
    Inventors: Avraham Kliger, Yitshak Ohana
  • Patent number: 10079808
    Abstract: A device may include a processor circuit configured to transmit, over a network medium, a request for transmission of a data communication to a first device of a network, and receive, over the network medium, a grant of the request. When the first device is associated with a first security profile, the processor circuit may be configured to encrypt the data communication based at least on a first password associated with the first security profile. When the first device is associated with a second security profile, the processor circuit may be configured to encrypt the data communication based at least on a second password associated with the second security profile. The second password may be associated with a higher password strength than the first password. The processor circuit may be configured to transmit, over the network medium, the encrypted data communication to the first device in response to the grant.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: September 18, 2018
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: Philippe Klein, Avraham Kliger, Yitshak Ohana
  • Patent number: 9992748
    Abstract: A communication device (device) includes a communication interface and a processor, among other possible circuitries, components, elements, etc. to support communications with other device(s) and to generate and process signals for such communications. The device receives a ranging instruction signal, which includes an initial power and at least one power step, from another device. The device processes the ranging instruction generates a first ranging signal based on the initial power. The device then transmits the first ranging signal to the another device. When a ranging response to the first ranging signal is received from the another device, the device determines that the device is successfully ranged to the another device. Alternatively, when no ranging response is received, the device generates a second ranging signal based on the initial power and the at least one power step and transmit the second ranging signal to the another device.
    Type: Grant
    Filed: June 11, 2015
    Date of Patent: June 5, 2018
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Avraham Kliger, Anatoli Shindler
  • Patent number: 9807692
    Abstract: A network device includes one or more memories and one or more processor circuits coupled to the one or more memories. The one or more processor circuits are configured to cause providing for transmission a request directed to a network controller to change a power state of the network device, receiving a grant from the network controller in response to the request, and changing the power state of the network device in response to receiving the grant. The power state of the network device includes a running power state and a standby power state, where the standby power state includes an active mode and an idle mode. A network controller for granting a request from the network device to change a power state of the network device is also disclosed.
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: October 31, 2017
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Philippe Klein, Avraham Kliger, Yitshak Ohana
  • Publication number: 20170163447
    Abstract: A device implementing a channel estimation for multi-channel transmissions system may include at least one processor configured to receive a set of signals over a set of channels, wherein each signal of the set of signals includes one of a set of channel estimation sequences. The set of channel estimation sequences may have been selected based at least in part on a signal quality metric, such as a peak-to-average power ratio, associated with a combination of the set of signals. The at least one processor may be further configured to perform a channel estimation for each channel based at least in part on the channel estimation sequence included in the signal received over each channel. In one or more implementations, the set of channel estimation sequences may be selected to minimize the signal quality metric associated with the combination of the plurality of channels.
    Type: Application
    Filed: December 8, 2016
    Publication date: June 8, 2017
    Inventors: Avraham KLIGER, Leo MONTREUIL
  • Publication number: 20170078252
    Abstract: A device may include a processor circuit configured to transmit, over a network medium, a request for transmission of a data communication to a first device of a network, and receive, over the network medium, a grant of the request. When the first device is associated with a first security profile, the processor circuit may be configured to encrypt the data communication based at least on a first password associated with the first security profile. When the first device is associated with a second security profile, the processor circuit may be configured to encrypt the data communication based at least on a second password associated with the second security profile. The second password may be associated with a higher password strength than the first password. The processor circuit may be configured to transmit, over the network medium, the encrypted data communication to the first device in response to the grant.
    Type: Application
    Filed: November 17, 2015
    Publication date: March 16, 2017
    Inventors: Philippe KLEIN, Avraham KLIGER, Yitshak OHANA
  • Publication number: 20160286492
    Abstract: A device for power efficient networking may include a processor circuit configured to identify a time to enter a low power state. The processor circuit may be further configured to transmit, prior to the identified time, transmission parameters to a network coordinator device for a network of devices, the transmission parameters being associated with a transmission from at least one of the devices to the device. The processor circuit may be further configured to enter the low power state at the identified time. The processor circuit may be further configured to, upon exiting the low power state, receive the transmission from at least one of the devices based at least in part on the transmission parameters. The processor circuit may be further configured to receive the transmission without participating in a node admission process after exiting the low power state.
    Type: Application
    Filed: March 24, 2016
    Publication date: September 29, 2016
    Inventors: Avraham KLIGER, Yitshak OHANA
  • Patent number: 9432143
    Abstract: A communication device is configured to communicate coded information to other communication device(s). The communication device uses NCPs to indicate locations of codewords within signal(s) transmitted to the other communication device(s). The communication device is configured to encode NCP(s) using an FEC code to generate coded NCP(s) and also to encode the NCP(s) using a cyclic redundancy check (CRC) code to generate NCP CRC bits. The communication device is also configured to encode the NCP CRC bits using the FEC code to generate coded NCP CRC bits. The communication device is then configured to generate OFDM or OFDMA symbol(s) include the coded NCP(s) and the coded NCP CRC bits to indicate beginnings of codeword(s) within at least one of the OFDM symbol(s) and/or additional OFDM symbol(s). The communication device is also configured to transmit the OFDM or OFDMA symbols to another communication device via a communication interface of the communication device.
    Type: Grant
    Filed: June 5, 2014
    Date of Patent: August 30, 2016
    Assignee: Broadcom Corporation
    Inventors: Niki Roberta Pantelias, Ba-Zhong Shen, Tak Kwan Lee, Avraham Kliger, Richard Stephen Prodan
  • Publication number: 20160241303
    Abstract: A communication device includes a communication interface, a number of variable power amplifiers (VPAs), and a processor. Some of the VPAs are configured to process analog signals to generate processed analog signals (e.g., each VPA configured to process one of the analog signals to generate one of the processed analog signals based on a respective VPA control signal). A composite VPA processes a summation of the processed analog signals, which are generated by certain of the VPA, to generate a processed composite signal based on a composite VPA control signal. The processor generates the a first, a second, and a composite VPA control signals based, at least in part, on configuration information from another communication device via the communication interface. The processor may be configured to consider other information as well, such as locally generated information (within the communication device), operational history, current operating conditions, etc.
    Type: Application
    Filed: April 22, 2016
    Publication date: August 18, 2016
    Applicant: BROADCOM CORPORATION
    Inventors: Ramon Alejandro Gomez, Avraham Kliger, Thomas Joseph Kolze, Kevin Lee Miller, Joseph Leonard Laskowski
  • Patent number: 9379848
    Abstract: A communication device (device) includes a processor configured to generate an initial ranging LDPC coded signal based on a first LDPC code and then transmits the initial ranging LDPC coded signal to another device (e.g., via a communication interface) for use by the other device for coarse power and timing adjustment. Then, the processor processes a received transmit opportunity signal to identify a transmit opportunity time period. The processor then generates a fine ranging LDPC coded signal based on a second LDPC code and transmits the fine ranging LDPC coded signal to the other device during the transmit opportunity time period for use by the other device for fine power and timing adjustment. In some instances, the processor may be configured to generate one or more wideband probe signals for transmission to the other device in conjunction with or instead of the fine ranging LDPC coded signals.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: June 28, 2016
    Assignee: BROADCOM CORPORATION
    Inventors: Avraham Kliger, Ba-Zhong Shen
  • Publication number: 20160156439
    Abstract: A device for coordinating frequency division multiplexing transmissions over a shared transmission medium may include a processor circuit configured to receive bandwidth requests from devices for transmissions over the shared transmission medium during a time period. A first bandwidth request may correspond to a point-to-multipoint transmission over the shared transmission medium. The processor circuit may be further configured to schedule bandwidth allocations on the shared transmission medium for the time period based at least in part on the bandwidth requests, where a first bandwidth allocation that corresponds to the first point-to-multipoint transmission is scheduled during the time period prior to other bandwidth allocations. The processor circuit may be further configured to transmit, over the shared transmission medium, an indication of the bandwidth allocations.
    Type: Application
    Filed: December 2, 2015
    Publication date: June 2, 2016
    Inventors: Avraham KLIGER, Yitshak OHANA
  • Patent number: 9325372
    Abstract: A communication device includes a communication interface, a number of variable power amplifiers (VPAs), and a processor. Some of the VPAs are configured to process analog signals to generate processed analog signals (e.g., each VPA configured to process one of the analog signals to generate one of the processed analog signals based on a respective VPA control signal). A composite VPA processes a summation of the processed analog signals, which are generated by certain of the VPA, to generate a processed composite signal based on a composite VPA control signal. The processor generates the a first, a second, and a composite VPA control signals based, at least in part, on configuration information from another communication device via the communication interface. The processor may be configured to consider other information as well, such as locally generated information (within the communication device), operational history, current operating conditions, etc.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: April 26, 2016
    Assignee: BROADCOM CORPORATION
    Inventors: Ramon Alejandro Gomez, Avraham Kliger, Thomas Joseph Kolze, Kevin Lee Miller, Joseph Leonard Laskowski
  • Publication number: 20150373715
    Abstract: A communication device (device) includes a communication interface and a processor, among other possible circuitries, components, elements, etc. to support communications with other device(s) and to generate and process signals for such communications. The device receives a ranging instruction signal, which includes an initial power and at least one power step, from another device. The device processes the ranging instruction generates a first ranging signal based on the initial power. The device then transmits the first ranging signal to the another device. When a ranging response to the first ranging signal is received from the another device, the device determines that the device is successfully ranged to the another device. Alternatively, when no ranging response is received, the device generates a second ranging signal based on the initial power and the at least one power step and transmit the second ranging signal to the another device.
    Type: Application
    Filed: June 11, 2015
    Publication date: December 24, 2015
    Applicant: BROADCOM CORPORATION
    Inventors: Avraham Kliger, Anatoli Shindler