Patents by Inventor Aydin Babakhani
Aydin Babakhani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190180065Abstract: Remote measuring and sensing. Some example embodiment related to optical energy harvesting by identification device, such as infrared identification device GRID devices). Other embodiments relate to RFID device localization using low frequency source signals. Yet still other embodiments related to energy harvesting by RFID in electric fields in both conductive and non-conductive environments.Type: ApplicationFiled: May 25, 2017Publication date: June 13, 2019Applicant: WILLIAM MARSH RICE UNIVERSITYInventors: Aydin BABAKHANI, Seyed Mohammad Kazem POUR, Mahdi FORGHANI, Yuxiang SUN, Yaswanth Kumar CHERIVIRALA
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Patent number: 10222468Abstract: A radar system may comprise a trigger, driver, switching circuit, and antenna for generating an ultra-short impulse without utilizing an oscillator. A radar imaging system for imaging a formation or a cross section of a pipeline may include at least one radar sensor. The system may transmit a high-frequency, short impulse signal to a formation or pipeline and measure a reflected signal. A high speed impulse generator may allow the short impulse signals to be generated. This impulse generator may utilize a switching circuit and digital driver to provide the short impulse signals. The images provide useful information about complex permittivity of the formation, the geometry of the pipeline, deposition thickness of asphaltenes and wax, velocity of the fluid, as well as size, type, concentration of gas bubbles, water, or solid particles in the flow, or combinations thereof.Type: GrantFiled: September 29, 2014Date of Patent: March 5, 2019Assignee: William Marsh Rice UniversityInventors: M. Mahdi Assefzadeh, Aydin Babakhani
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Patent number: 10211528Abstract: A fully-programmable digital-to-impulse radiator with a programmable delay is discussed herein. The impulse radiator may be part of an array of impulse radiators. Each individual element of the array may be equipped with an integrated programmable delay that can shift the timing of a digital trigger. The digital trigger may be fed to an amplifier, switch, and impulse matching circuitry, whereas the data signal path may be provided from a separate path. An antenna coupled to the impulse matching circuitry may then radiate ultra-short impulses. The radiating array may provide the ability to control delay at each individual element, perform near-ideal spatial combing, and/or beam steering.Type: GrantFiled: May 18, 2016Date of Patent: February 19, 2019Assignee: WILLIAM MARSH RICE UNIVERSITYInventors: Mohammad Mahdi Assefzadeh, Aydin Babakhani
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Patent number: 10204697Abstract: A novel nonlinear impulse sampler is presented that provides a clock sharpening circuit, sampling stage, and post-sampling block. The clock sharpening circuit sharpens the incoming clock while acting as a buffer, and the sharpened clock is fed to the input of the sampling stage. The impulse sampling stage has two main transistors, where one transistor generates the impulse and the other transistor samples the input signal. Post-sampling block processes the sampled signal and acts as a sample and hold circuit. The architecture uses an ultrafast transmission-line based inductive peaking technique to turn on a high-speed sampling bipolar transistor for a few picoseconds. It is shown that the sampler can detect impulses as short as 100 psec or less.Type: GrantFiled: February 25, 2017Date of Patent: February 12, 2019Assignee: WILLIAM MARSH RICE UNIVERSITYInventors: Himanshu Aggrawal, Aydin Babakhani
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Patent number: 10191454Abstract: Ultra-short pulse detection. At least some example embodiments are methods including: receiving by an antenna a series of ultra-short pulses of electromagnetic energy at a repetition frequency, the receiving creates a pulse signal; self-mixing or intermodulating the pulse signal by applying the pulse signal to a non-linear electrical device, thereby creating a modulated signal; and filtering the modulated signal to recover a filtered signal having an intermodulated frequency being the repetition frequency.Type: GrantFiled: June 13, 2017Date of Patent: January 29, 2019Assignee: William Marsh Rice UniversityInventors: Aydin Babakhani, Babak Jamali
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Patent number: 10168478Abstract: According to an aspect of the present principles, methods are provided for fabricating an integrated structure. A method includes forming a very large scale integration (VLSI) structure including a semiconductor layer at a top of the VLSI structure. The method further includes mounting the VLSI structure to a support structure. The method additionally includes removing at least a portion of the semiconductor layer from the VLSI structure. The method also includes attaching an upper layer to the top of the VLSI structure. The upper layer is primarily composed of a material that has at least one of a higher resistivity or a higher transparency than the semiconductor layer. The upper layer includes at least one hole for at least one of a photonic device or an electronic device. The method further includes releasing said VLSI structure from the support structure.Type: GrantFiled: March 23, 2017Date of Patent: January 1, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Aydin Babakhani, Steven A. Cordes, Jean-Olivier Plouchart, Scott K. Reynolds, Peter J. Sorce, Robert E. Trzcinski
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Patent number: 10168477Abstract: According to an aspect of the present principles, methods are provided for fabricating an integrated structure. A method includes forming a very large scale integration (VLSI) structure including a semiconductor layer at a top of the VLSI structure. The method further includes mounting the VLSI structure to a support structure. The method additionally includes removing at least a portion of the semiconductor layer from the VLSI structure. The method also includes attaching an upper layer to the top of the VLSI structure. The upper layer is primarily composed of a material that has at least one of a higher resistivity or a higher transparency than the semiconductor layer. The upper layer includes at least one hole for at least one of a photonic device or an electronic device. The method further includes releasing said VLSI structure from the support structure.Type: GrantFiled: November 17, 2016Date of Patent: January 1, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Aydin Babakhani, Steven A. Cordes, Jean-Olivier Plouchart, Scott K. Reynolds, Peter J. Sorce, Robert E. Trzcinski
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Patent number: 10110370Abstract: Systems and methods providing wireless synchronization of wave arrays may include an antenna that receives a wireless injection signal and another antenna that radiates a locked wave signal corresponding to the injection signal. In some embodiments, these systems may also provide a low noise amplifier, voltage controlled oscillator (VCO), buffer amplifier(s), phase shifter, and/or multi-stage amplifier. In some embodiments, the injection signal may be provided on an even harmonic, and the intended transmission frequency signal is on an odd harmonic of the locked signal. The substrate thickness may be designed to radiate electromagnetic waves in odd harmonics of the locked signal. In yet another embodiment, polarization of a receiving antenna may be orthogonal to a transmitter antenna.Type: GrantFiled: May 17, 2016Date of Patent: October 23, 2018Assignee: William Marsh Rice UniversityInventors: Charles Chen, Aydin Babakhani
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Publication number: 20180224414Abstract: Certain aspects of the present disclosure provide methods and apparatus for closed-loop control of a system using one or more electron paramagnetic resonance (EPR) sensors located on-site. With such EPR sensors, a change can be applied to the system, the EPR sensors can measure the effect(s) of the change, and then adjustments can be made in real-time. This feedback process may be repeated continuously to control the system.Type: ApplicationFiled: February 7, 2018Publication date: August 9, 2018Inventors: Omar Kulbrandstad, Aydin Babakhani, Manuel Godoy, John Lovell
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Publication number: 20180120390Abstract: An active cancellation system may be utilized to cancel interference, such as from transmitter leakage or self-interference in a transceiver of an electron paramagnetic resonance (EPR) spectrometer. The active cancellation system may be inserted between the transmitter and receiver. The active cancellation system may receive the output of the transmitter, and generate a cancellation signal with the same amplitude, but phase shifted relative to the self-interference signal. The cancellation system may include an attenuator/amplitude tuner, buffer, VQ generator, and phase shifter.Type: ApplicationFiled: May 18, 2016Publication date: May 3, 2018Applicant: William Marsh Rice UniversityInventors: Aydin Babakhani, Xuebei Yang
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Publication number: 20180010441Abstract: A method of wellbore analysis using TM01 and TE01 modes of radar waveforms can include transmitting, at a first time, a radar waveform from a wellhead into a tubing disposed in a wellbore positioned in a reservoir. The radar waveform is either a TM01 mode or a TE01 mode waveform. The tubing includes a fluid, and the surface of the wellbore includes the wellhead. At a second time, a reflected waveform generated by reflecting the transmitted radar waveform on a fluid surface of the fluid is received at the wellhead. A fluid level of the fluid is determined based on the time difference between the first time and the second time, and on a transmission speed of the radar waveform from the wellhead to the fluid surface. The fluid level is a distance between the wellhead and the fluid surface of the fluid.Type: ApplicationFiled: June 16, 2017Publication date: January 11, 2018Inventors: Sunder Ramachandran, Aydin Babakhani
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Patent number: 9857447Abstract: A method includes generating, from an integrated oscillator circuit, an oscillating output signal and generating, by an integrated power amplifier (PA) circuit, an amplified oscillating output signal based on the oscillating output signal. The method further includes receiving, by integrated receiver amplifier circuit, an electron spin resonance (ESR) signal from biological samples that include a magnetic species and generating, by the integrated receiver amplifier circuit, an amplified ESR signal based on the received ESR signal. The method further includes receiving, by the integrated receiver amplifier circuit, an electron spin resonance (ESR) signal from magnetic nanoparticles that are loaded with drugs or attached to human cells.Type: GrantFiled: September 30, 2013Date of Patent: January 2, 2018Assignee: WILLIAM MARSH RICE UNIVERSITYInventors: Xuebei Yang, Charles Chen, Payam Seifi, Aydin Babakhani
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Publication number: 20170357220Abstract: Ultra-short pulse detection. At least some example embodiments are methods including: receiving by an antenna a series of ultra-short pulses of electromagnetic energy at a repetition frequency, the receiving creates a pulse signal; self-mixing or intermodulating the pulse signal by applying the pulse signal to a non-linear electrical device, thereby creating a modulated signal; and filtering the modulated signal to recover a filtered signal having an intermodulated frequency being the repetition frequency.Type: ApplicationFiled: June 13, 2017Publication date: December 14, 2017Applicant: WILLIAM MARSH RICE UNIVERSITYInventors: Aydin Babakhani, Babak Jamali
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Publication number: 20170250793Abstract: A novel nonlinear impulse sampler is presented that provides a clock sharpening circuit, sampling stage, and post-sampling block. The clock sharpening circuit sharpens the incoming clock while acting as a buffer, and the sharpened clock is fed to the input of the sampling stage. The impulse sampling stage has two main transistors, where one transistor generates the impulse and the other transistor samples the input signal. Post-sampling block processes the sampled signal and acts as a sample and hold circuit. The architecture uses an ultrafast transmission-line based inductive peaking technique to turn on a high-speed sampling bipolar transistor for a few picoseconds. It is shown that the sampler can detect impulses as short as 100psec or less.Type: ApplicationFiled: February 25, 2017Publication date: August 31, 2017Applicant: William Marsh Rice UniversityInventors: Himanshu Aggrawal, Aydin Babakhani
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Publication number: 20170242091Abstract: An integrated electron spin resonance (ESR) circuit chip includes a chip substrate, a transmitter circuit, and a receiver circuit. The transmitter circuit and receiver circuit are disposed on the chip substrate. The transmitter circuit includes an oscillator circuit configured to generate an oscillating output signal and a power amplifier (PA) circuit configured to generate an amplified oscillating output signal based on the oscillating output signal. The receiver circuit receives an ESR signal from an ESR probe. The receiver circuit includes a receiver amplifier circuit configured to generate an amplified ESR signal based on the received ESR signal, a mixer circuit configured to receive the amplified ESR signal and to down-convert the amplified ESR signal to a baseband signal, and a baseband amplifier circuit configured to generate an amplified baseband signal based on the baseband signal.Type: ApplicationFiled: May 10, 2017Publication date: August 24, 2017Applicant: William Marsh Rice UniversityInventors: Xuebei Yang, Charles Chen, Payam Seifi, Aydin Babakhani
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Publication number: 20170204721Abstract: Systems and methods for fracture mapping may utilize frequency changing to aid in providing high-resolution mapping. Integrated chips may be injected into a well and dispersed into a formation. A downhole tool that provides a transmitter and receiver may be positioned in the well. The transmitter may transmit electromagnetic (EM) signals into the formation. The dispersed integrated chips may receive the transmitted EM signal and return a frequency-changed signal to the receiver of the downhole tool. Utilizing the returned frequency changed signal, the system is able to determine the locations of the integrated chips that have been dispersed into the formation and provide fracture mapping.Type: ApplicationFiled: March 5, 2015Publication date: July 20, 2017Applicant: William Marsh Rice UniversityInventor: Aydin Babakhani
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Publication number: 20170204719Abstract: A well monitoring system may provide a plurality of integrated chips dispersed in cement surrounding a well casing. Each of the integrated chips may provide energy harvesting circuitry, EM transceiver, modulator, additional sensor(s), processor or microprocessor, memory, power source, or the like. Upon analyzing data gather from the sensor(s), emitted and detected EM waves, the system may provide information about the cement thickness at different parts of the well, cement setting/curing, local electrical permittivity, local magnetic permeability, temperature, pressure, pH, local NMR spectrum, local ESR spectrum, local florescence response, local porosity, local permeability, etc. Further, the integrated chips may be utilized to transmit/receive the abovementioned data, other data (e.g. command data, power signal, etc.), or the like to/from the main transceiver.Type: ApplicationFiled: July 31, 2015Publication date: July 20, 2017Applicant: William Marsh Rice UniversityInventor: Aydin Babakhani
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Publication number: 20170192172Abstract: According to an aspect of the present principles, methods are provided for fabricating an integrated structure. A method includes forming a very large scale integration (VLSI) structure including a semiconductor layer at a top of the VLSI structure. The method further includes mounting the VLSI structure to a support structure. The method additionally includes removing at least a portion of the semiconductor layer from the VLSI structure. The method also includes attaching an upper layer to the top of the VLSI structure. The upper layer is primarily composed of a material that has at least one of a higher resistivity or a higher transparency than the semiconductor layer. The upper layer includes at least one hole for at least one of a photonic device or an electronic device. The method further includes releasing said VLSI structure from the support structure.Type: ApplicationFiled: March 23, 2017Publication date: July 6, 2017Inventors: Aydin Babakhani, Steven A. Cordes, Jean-Olivier Plouchart, Scott K. Reynolds, Peter J. Sorce, Robert E. Trzcinski
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Patent number: 9689954Abstract: An integrated electron spin resonance (ESR) circuit chip includes a chip substrate, a transmitter circuit, and a receiver circuit. The transmitter circuit and receiver circuit are disposed on the chip substrate. The transmitter circuit includes an oscillator circuit configured to generate an oscillating output signal and a power amplifier (PA) circuit configured to generate an amplified oscillating output signal based on the oscillating output signal. The receiver circuit receives an ESR signal from an ESR probe. The receiver circuit includes a receiver amplifier circuit configured to generate an amplified ESR signal based on the received ESR signal, a mixer circuit configured to receive the amplified ESR signal and to down-convert the amplified ESR signal to a baseband signal, and a baseband amplifier circuit configured to generate an amplified baseband signal based on the baseband signal.Type: GrantFiled: September 30, 2013Date of Patent: June 27, 2017Assignee: WILLIAM MARSH RICE UNIVERSITYInventors: Xuebei Yang, Charles Chen, Payam Seifi, Aydin Babakhani
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Patent number: 9632251Abstract: According to an aspect of the present principles, methods are provided for fabricating an integrated structure. A method includes forming a very large scale integration (VLSI) structure including a semiconductor layer at a top of the VLSI structure. The method further includes mounting the VLSI structure to a support structure. The method additionally includes removing at least a portion of the semiconductor layer from the VLSI structure. The method also includes attaching an upper layer to the top of the VLSI structure. The upper layer is primarily composed of a material that has at least one of a higher resistivity or a higher transparency than the semiconductor layer. The upper layer includes at least one hole for at least one of a photonic device or an electronic device. The method further includes releasing said VLSI structure from the support structure.Type: GrantFiled: April 2, 2014Date of Patent: April 25, 2017Assignee: International Business Machines CorporationInventors: Aydin Babakhani, Steven A. Cordes, Jean-Olivier Plouchart, Scott K. Reynolds, Peter J. Sorce, Robert E. Trzcinski