Patents by Inventor Bang-Chiang Lan

Bang-Chiang Lan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9988264
    Abstract: A method of fabricating an integrated structure for MEMS device and semiconductor device comprises steps of: providing a substrate having a transistor thereon in a semiconductor device region and a first MEMS component thereon in a MEMS region; performing a interconnect process on the substrate in the semiconductor device region to form a plurality of first dielectric layers, at least a conductive plug and at least a conductive layer in the first dielectric layers; forming a plurality of second dielectric layers and an etch stopping device in the second dielectric layers on the substrate in a etch stopping device region; forming a plurality of third dielectric layers and at least a second MEMS component in the third dielectric layers on the substrate in the MEMS region; and performing an etching process to remove the third dielectric layers in the MEMS region.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: June 5, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Bang-Chiang Lan, Li-Hsun Ho, Wei-Cheng Wu, Hui-Min Wu, Min Chen, Tzung-I Su, Chien-Hsin Huang
  • Patent number: 9783408
    Abstract: A structure of micro-electro-mechanical systems (MEMS) electroacoustic transducer is disclosed. The MEMS electroacoustic transducer includes a substrate having a MEMS device region, a diaphragm having openings and disposed in the MEMS device region, a silicon material layer disposed on the diaphragm and sealing the diaphragm, and a conductive pattern disposed beneath the diaphragm in the MEMS device region. Preferably, a first cavity is also formed between the diaphragm and the substrate.
    Type: Grant
    Filed: June 18, 2014
    Date of Patent: October 10, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Bang-Chiang Lan, Ming-I Wang, Li-Hsun Ho, Hui-Min Wu, Min Chen, Chien-Hsin Huang
  • Patent number: 9150407
    Abstract: A method for fabricating a microelectromechanical system (MEMS) device of the present invention includes the following steps: providing a substrate, comprising a circuit region and a MEMS region separated from each other; forming an interconnection structure on the substrate in the circuit region, and simultaneously forming a plurality of dielectric layers and a first electrode on the substrate in the MEMS region, wherein the first electrode comprises at least two metal layers formed in the dielectric layers and a protection ring formed in the dielectric layers and connecting two adjacent metal layers, so as to define an enclosed space between the two adjacent metal layers; forming a second electrode on the first electrode; and removing the dielectric layers outside the enclosed space in the MEMS region to form a cavity between the electrodes.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: October 6, 2015
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventors: Tzung-Han Tan, Bang-Chiang Lan, Ming-I Wang, Chien-Hsin Huang, Meng-Jia Lin
  • Publication number: 20150004732
    Abstract: A method of fabricating an integrated structure for MEMS device and semiconductor device comprises steps of: providing a substrate having a transistor thereon in a semiconductor device region and a first MEMS component thereon in a MEMS region; performing a interconnect process on the substrate in the semiconductor device region to form a plurality of first dielectric layers, at least a conductive plug and at least a conductive layer in the first dielectric layers; forming a plurality of second dielectric layers and an etch stopping device in the second dielectric layers on the substrate in a etch stopping device region; forming a plurality of third dielectric layers and at least a second MEMS component in the third dielectric layers on the substrate in the MEMS region; and performing an etching process to remove the third dielectric layers in the MEMS region.
    Type: Application
    Filed: September 18, 2014
    Publication date: January 1, 2015
    Inventors: Bang-Chiang Lan, Li-Hsun Ho, Wei-Cheng Wu, Hui-Min Wu, Min Chen, Tzung-I Su, Chien-Hsin Huang
  • Patent number: 8872287
    Abstract: The present invention relates to an integrated structure for a MEMS device and a semiconductor device and a method of fabricating the same, in which an etch stopping element is included on a substrate between the MEMS device and the semiconductor device for protecting the semiconductor device from lateral damage when an oxide releasing process is performed to fabricate the MEMS device. The etch stopping element has various profiles and is selectively formed by an individual fabricating process or is simultaneously formed with the semiconductor device in the same fabricating process. It is a singular structure or a combined stacked multilayered structure, for example, a plurality of rows of pillared etch-resistant material plugs, one or a plurality of wall-shaped etch-resistant material plugs, or a multilayered structure of a stack of which and an etch-resistant material layer.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: October 28, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Bang-Chiang Lan, Li-Hsun Ho, Wei-Cheng Wu, Hui-Min Wu, Min Chen, Tzung-I Su, Chien-Hsin Huang
  • Patent number: 8865500
    Abstract: A method of fabricating a MEMS microphone includes: first providing a substrate having a first surface and a second surface. The substrate is divided into a logic region and a MEMS region. The first surface of the substrate is etched to form a plurality of first trenches in the MEMS region. An STI material is then formed in the plurality of first trenches. Subsequently, the second surface of the substrate is etched to form a second trench in the MEMS region, wherein the second trench connects with each of the first trenches. Finally, the STI material in the first trenches is removed.
    Type: Grant
    Filed: February 3, 2010
    Date of Patent: October 21, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Chien-Hsin Huang, Bang-Chiang Lan, Hui-Min Wu, Tzung-I Su, Chao-An Su, Tzung-Han Tan
  • Publication number: 20140291787
    Abstract: A structure of micro-electro-mechanical systems (MEMS) electroacoustic transducer is disclosed. The MEMS electroacoustic transducer includes a substrate having a MEMS device region, a diaphragm having openings and disposed in the MEMS device region, a silicon material layer disposed on the diaphragm and sealing the diaphragm, and a conductive pattern disposed beneath the diaphragm in the MEMS device region. Preferably, a first cavity is also formed between the diaphragm and the substrate.
    Type: Application
    Filed: June 18, 2014
    Publication date: October 2, 2014
    Inventors: Bang-Chiang Lan, Ming-I Wang, Li-Hsun Ho, Hui-Min Wu, Min Chen, Chien-Hsin Huang
  • Patent number: 8798291
    Abstract: A structure of a micro-electro-mechanical systems (MEMS) electroacoustic transducer includes a substrate, a diaphragm, a silicon material layer, and a conductive pattern. The substrate includes an MEMS device region. The diaphragm has openings, and is disposed in the MEMS device region. A first cavity is formed between the diaphragm and the substrate. The silicon material layer is disposed on the diaphragm and seals the diaphragm. The conductive pattern is disposed beneath the diaphragm in the MEMS device region.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: August 5, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Bang-Chiang Lan, Ming-I Wang, Li-Hsun Ho, Hui-Min Wu, Min Chen, Chien-Hsin Huang
  • Patent number: 8710601
    Abstract: A micro electro mechanical system (MEMS) structure is disclosed. The MEMS structure includes a backplate electrode and a 3D diaphragm electrode. The 3D diaphragm electrode has a composite structure so that a dielectric is disposed between two metal layers. The 3D diaphragm electrode is adjacent to the backplate electrode to form a variable capacitor together.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: April 29, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Chien-Hsin Huang, Bang-Chiang Lan, Ming-I Wang, Hui-Min Wu, Tzung-I Su, Chao-An Su, Tzung-Han Tan, Min Chen, Meng-Jia Lin
  • Patent number: 8642986
    Abstract: An integrated circuit (IC) having a microelectromechanical system (MEMS) device buried therein is provided. The integrated circuit includes a substrate, a metal-oxide semiconductor (MOS) device, a metal interconnect, and the MEMS device. The substrate has a logic circuit region and a MEMS region. The MOS device is located on the logic circuit region of the substrate. The metal interconnect, formed by a plurality of levels of wires and a plurality of vias, is located above the substrate to connect the MOS device. The MEMS device is located on the MEMS region, and includes a sandwich membrane located between any two neighboring levels of wires in the metal interconnect and connected to the metal interconnect.
    Type: Grant
    Filed: September 23, 2009
    Date of Patent: February 4, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Tzung-Han Tan, Bang-Chiang Lan, Ming-I Wang, Tzung-I Su, Chien-Hsin Huang, Hui-Min Wu, Chao-An Su, Min Chen, Meng-Jia Lin
  • Patent number: 8587078
    Abstract: A fabricating method of integrated circuit is provided. During the fabricating process of an interconnecting structure of the integrated circuit, a micro electromechanical system (MENS) diaphragm is formed between two adjacent dielectric layers of the interconnecting structure. The method of forming the MENS diaphragm includes the following steps. Firstly, a plurality of first openings is formed within any dielectric layer to expose corresponding conductive materials of the interconnecting structure. Secondly, a bottom insulating layer is formed on the dielectric layer and filling into the first openings. Third, portions of the bottom insulating layer located in the first openings are removed to form at least a first trench for exposing the corresponding conductive materials. Then, a first electrode layer and a top insulating layer are sequentially formed on the bottom insulating layer, and the first electrode layer filled into the first trench and is electrically connected to the conductive materials.
    Type: Grant
    Filed: April 6, 2010
    Date of Patent: November 19, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Chien-Hsin Huang, Li-Che Chen, Ming-I Wang, Bang-Chiang Lan, Tzung-Han Tan, Hui-Min Wu, Tzung-I Su
  • Publication number: 20130302933
    Abstract: A microelectromechanical system (MEMS) device and a method for fabricating the same are described. The method of the present invention includes the following steps. A substrate is provided, including a circuit region and a MEMS region separated from each other. An interconnection structure is formed on the substrate in the circuit region, and simultaneously a plurality of dielectric layers and a first electrode are formed on the substrate in the MEMS region. The first electrode includes at least two metal layers and a protection ring. The metal layers and the protection ring are formed in the dielectric layers. The protection ring connects two adjacent metal layers, so as to define an enclosed space between the two adjacent metal layers. A second electrode is formed on the first electrode. The dielectric layers outside the enclosed space in the MEMS region are removed to form a cavity between the electrodes.
    Type: Application
    Filed: July 18, 2013
    Publication date: November 14, 2013
    Inventors: Tzung-Han TAN, Bang-Chiang Lan, Ming-I Wang, Chien-Hsin Huang, Meng-Jia Lin
  • Patent number: 8558336
    Abstract: A semiconductor photodetector structure is provided. The structure includes a substrate, a photodetecting element and a semiconductor layer disposed on the photodetecting element. The substrate includes a first semiconductor material and includes a deep trench. The surface of the deep trench includes a first type dopant. The photodetecting element is disposed in the deep trench. The photodetecting element includes a second semiconductor material. The semiconductor layer includes a second type dopant.
    Type: Grant
    Filed: August 17, 2009
    Date of Patent: October 15, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Tzung-I Su, Bang-Chiang Lan, Chao-An Su, Hui-Min Wu, Ming-I Wang, Chien-Hsin Huang, Tzung-Han Tan, Min Chen, Meng-Jia Lin, Wen-Yu Su
  • Patent number: 8525389
    Abstract: A microelectromechanical system (MEMS) device and a method for fabricating the same are described. The MEMS device includes a first electrode and a second electrode. The first electrode is disposed on a substrate, and includes at least two metal layers, a first protection ring and a dielectric layer. The first protection ring connects two adjacent metal layers, so as to define an enclosed space between two adjacent metal layers. The dielectric layer is disposed in the enclosed space and connects two adjacent metal layers. The second electrode is disposed on the first electrode, wherein a cavity is formed between the first electrode and the second electrode.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: September 3, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Tzung-Han Tan, Bang-Chiang Lan, Ming-I Wang, Chien-Hsin Huang, Meng-Jia Lin
  • Patent number: 8502382
    Abstract: A protection structure of a pad is provided. The pad is disposed in a dielectric layer on a semiconductor substrate and the pad includes a connection region and a peripheral region which encompasses the connection region. The protection structure includes at least a barrier, an insulation layer and a mask layer. The barrier is disposed in the dielectric layer in the peripheral region. The insulation layer is disposed on the dielectric layer. The mask layer is disposed on the dielectric layer and covers the insulation layer and the mask layer includes an opening to expose the connection region of the pad.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: August 6, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Bang-Chiang Lan, Ming-I Wang, Hui-Min Wu, Min Chen, Chien-Hsin Huang, Tzung-I Su, Chao-An Su, Tzung-Han Tan, Li-Che Chen, Meng-Jia Lin
  • Patent number: 8460960
    Abstract: A method for fabricating integrated circuit is provided. First, a first interconnect structure including a plurality of first dielectric layers and a plurality of first conductive patterns stacked therewith alternately is formed on a MEMS region of a conductive substrate. Next, an interlayer is formed on the first interconnect structure and covering the first conductive patterns. Next, a poly silicon mask layer corresponding to the first conductive patterns is formed on the interlayer and exposing a portion of the media layer. Next, the portion of the interlayer exposed by the poly silicon mask layer and a portion of the first dielectric layer corresponding thereto are removed to form a plurality of openings. Then, a portion of the conductive substrate in the MEMS region is removed.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: June 11, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Meng-Jia Lin, Bang-Chiang Lan, Ming-I Wang, Chien-Hsin Huang
  • Patent number: 8384214
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a dielectric layer, a pad structure and a protection structure. The dielectric layer is disposed on the substrate. The pad structure is disposed in the dielectric layer. The pad structure includes a plurality of first metal layers and a plurality of plugs which are electrically connected to each other vertically. There is no contact plug disposed between the pad structure and the substrate. The protection structure is disposed in the dielectric layer and encompasses the pad structure.
    Type: Grant
    Filed: October 13, 2009
    Date of Patent: February 26, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Hui-Min Wu, Bang-Chiang Lan, Ming-I Wang, Tzung-I Su, Chien-Hsin Huang, Chao-An Su, Tzung-Han Tan, Min Chen, Meng-Jia Lin
  • Patent number: 8368153
    Abstract: A wafer level package of micro electromechanical system (MEMS) microphone includes a substrate, a number of dielectric layers stacked on the substrate, a MEMS diaphragm, a number of supporting rings and a protective layer. The MEMS diaphragm is disposed between two adjacent dielectric layers. A first chamber is between the MEMS diaphragm and the substrate. The supporting rings are disposed in some dielectric layers and stacked with each other. An inner diameter of the lower supporting ring is greater than that of the upper supporting ring. The protective layer is disposed on the upmost supporting ring and covers the MEMS diaphragm. A second chamber is between the MEMS diaphragm and the protective layer. The protective layer defines a number of first through holes for exposing the MEMS diaphragm. The wafer level package of MEMS microphone has an advantage of low cost.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: February 5, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Chien-Hsin Huang, Li-Che Chen, Ming-I Wang, Bang-Chiang Lan, Hui-Min Wu, Tzung-I Su
  • Publication number: 20130023081
    Abstract: A method for fabricating integrated circuit is provided. First, a first interconnect structure including a plurality of first dielectric layers and a plurality of first conductive patterns stacked therewith alternately is formed on a MEMS region of a conductive substrate. Next, an interlayer is formed on the first interconnect structure and covering the first conductive patterns. Next, a poly silicon mask layer corresponding to the first conductive patterns is formed on the interlayer and exposing a portion of the media layer. Next, the portion of the interlayer exposed by the poly silicon mask layer and a portion of the first dielectric layer corresponding thereto are removed to form a plurality of openings. Then, a portion of the conductive substrate in the MEMS region is removed.
    Type: Application
    Filed: July 20, 2011
    Publication date: January 24, 2013
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Meng-Jia LIN, Bang-Chiang Lan, Ming-I Wang, Chien-Hsin Huang
  • Patent number: 8310065
    Abstract: A fabrication method of a wafer structure includes: providing a substrate having a plurality of die regions and an edge region surrounding the die regions defined thereon; then, forming a dielectric layer, a plurality of MEMS devices, a plurality of metal-interconnect structures and a plurality bonding pads on the substrate in the die regions; next, removing the dielectric layer disposed on the substrate of the edge region to expose the substrate; and thereafter, forming a passivation layer to cover the substrate and the dielectric layer.
    Type: Grant
    Filed: January 6, 2011
    Date of Patent: November 13, 2012
    Assignee: United Microelectronics Corp.
    Inventors: Hui-Min Wu, Bang-Chiang Lan, Chien-Hsin Huang, Kuan-Yu Wang, Chao-An Su, Tzung-I Su