Abstract: A method of fabricating MEMS device includes: providing a substrate with a first surface and a second surface. The substrate includes at least one logic region and at least one MEMS region. The logic region includes at least one logic device positioned on the first surface of the substrate. Then, an interlayer material is formed on the first surface of the substrate within the MEMS region. Finally, the second surface of the substrate within the MEMS region is patterned. After the pattern process, a vent pattern is formed in the second surface of the substrate within the MEMS region. The interlayer material does not react with halogen radicals. Therefore, during the formation of the vent pattern, the substrate is protected by the interlayer material and the substrate can be prevented from forming any undercut.

Abstract: An integrated circuit (IC) having a microelectromechanical system (MEMS) device buried therein is provided. The integrated circuit includes a substrate, a metal-oxide semiconductor (MOS) device, a metal interconnect, and the MEMS device. The substrate has a logic circuit region and a MEMS region. The MOS device is located on the logic circuit region of the substrate. The metal interconnect, formed by a plurality of levels of wires and a plurality of vias, is located above the substrate to connect the MOS device. The MEMS device is located on the MEMS region, and includes a sandwich membrane located between any two neighboring levels of wires in the metal interconnect and connected to the metal interconnect.

Abstract: A microelectromechanical system (MEMS) device and a method for fabricating the same are described. The MEMS device includes a first electrode and a second electrode. The first electrode is disposed on a substrate, and includes at least two metal layers, a first protection ring and a dielectric layer. The first protection ring connects two adjacent metal layers, so as to define an enclosed space between two adjacent metal layers. The dielectric layer is disposed in the enclosed space and connects two adjacent metal layers. The second electrode is disposed on the first electrode, wherein a cavity is formed between the first electrode and the second electrode.

Abstract: A MEMS device includes a vent hole structure and a MEMS structure disposed on a same side of a substrate. The vent hole structure adjoins the MEMS structure with an etch stop structure therebetween. The MEMS structure includes a chamber, the vent hole structure includes a metal layer having at least a hole thereon as a vent hole to connect the chamber of the MEMS structure through the etch stop structure. Accordingly, the MEMS device has a lateral vent hole. Furthermore, as the vent hole structure and the MEMS structure are disposed on the same side of the substrate, the manufacturing process is convenient and timesaving.

Abstract: A semiconductor photodetector structure is provided. The structure includes a substrate, a photodetecting element and a semiconductor layer disposed on the photodetecting element. The substrate includes a first semiconductor material and includes a deep trench. The surface of the deep trench includes a first type dopant. The photodetecting element is disposed in the deep trench. The photodetecting element includes a second semiconductor material. The semiconductor layer includes a second type dopant.

Abstract: A protection structure of a pad is provided. The pad is disposed in a dielectric layer on a semiconductor substrate and the pad includes a connection region and a peripheral region which encompasses the connection region. The protection structure includes at least a barrier, an insulation layer and a mask layer. The barrier is disposed in the dielectric layer in the peripheral region. The insulation layer is disposed on the dielectric layer. The mask layer is disposed on the dielectric layer and covers the insulation layer and the mask layer includes an opening to expose the connection region of the pad.

Abstract: A method for fabricating a MEMS is described as follows. A substrate is provided, including a circuit region and an MEMS region separated from each other. A first metal interconnection structure is formed on the substrate in the circuit region, and simultaneously a first dielectric structure is formed on the substrate in the MEMS region. A second metal interconnection structure is formed on the first metal interconnection structure, and simultaneously a second dielectric structure, at least two metal layers and at least one protection ring are formed on the first dielectric structure. The metal layers and the protection ring are formed in the second dielectric structure and the protection ring connects two adjacent metal layers to define an enclosed space between two adjacent metal layers. The first dielectric structure and the second dielectric structure outside the enclosed space are removed to form an MEMS device in the MEMS region.

Abstract: A microelectromechanical system (MEMS) structure and a fabricating method thereof are described. The MEMS structure includes a fixed part and a movable part. The fixed part is disposed on and connects with a substrate. The movable part including at least two first metal layers, a first protection ring and a first dielectric layer is suspended on the substrate. The first protection ring connects two adjacent first metal layers, so as to define a first enclosed space between the two adjacent first metal layers. The first dielectric layer is disposed in the enclosed space and connects the two adjacent first metal layers.

Abstract: A structure of a micro-electro-mechanical systems (MEMS) electroacoustic transducer includes a substrate, a diaphragm, a silicon material layer, and a conductive pattern. The substrate includes an MEMS device region. The diaphragm has openings, and is disposed in the MEMS device region. A first cavity is formed between the diaphragm and the substrate. The silicon material layer is disposed on the diaphragm and seals the diaphragm. The conductive pattern is disposed beneath the diaphragm in the MEMS device region.

Abstract: A microelectromechanical system (MEMS) structure and a fabricating method thereof are described. The MEMS structure includes a fixed part and a movable part. The fixed part is disposed on and connects with a substrate. The movable part including at least two first metal layers, a first protection ring and a first dielectric layer is suspended on the substrate. The first protection ring connects two adjacent first metal layers, so as to define a first enclosed space between the two adjacent first metal layers. The first dielectric layer is disposed in the enclosed space and connects the two adjacent first metal layers.

Abstract: A MEMS device includes a vent hole structure and a MEMS structure disposed on a same side of a substrate. The vent hole structure adjoins the MEMS structure with an etch stop structure therebetween. The MEMS structure includes a chamber, the vent hole structure includes a metal layer having at least a hole thereon as a vent hole to connect the chamber of the MEMS structure through the etch stop structure. Accordingly, the MEMS device has a lateral vent hole. Furthermore, as the vent hole structure and the MEMS structure are disposed on the same side of the substrate, the manufacturing process is convenient and timesaving.

Abstract: The present invention relates to an integrated structure for a MEMS device and a semiconductor device and a method of fabricating the same, in which an etch stopping device is included on a substrate between the MEMS device and the semiconductor device for protecting the semiconductor device from lateral damage when an oxide releasing process is performed to fabricate the MEMS device. The etch stopping device has various profiles and is selectively formed by an individual fabricating process or is simultaneously formed with the semiconductor device in the same fabricating process. It is a singular structure or a combined stacked multilayered structure, for example, a plurality of rows of pillared etch-resistant material plugs, one or a plurality of wall-shaped etch-resistant material plugs, or a multilayered structure of a stack of which and an etch-resistant material layer.

Abstract: A method of fabrication of a metal oxide semiconductor field effect transistor includes first providing a substrate on which a gate structure is formed. Afterwards, a portion of the substrate is removed to form a first recess in the substrate at both ends of the gate structure. Additionally, a source/drain extension layer is deposited in the first recess and a number of spacers are formed at both ends of the gate structure. Subsequently, a portion of the source/drain extension and the substrate are removed to form a second recess in the source/drain extension and a portion of the substrate outside of the spacer. In addition, a source/drain layer is deposited in the second recess. Because the source/drain extension and the source/drain layer have specific materials and structures, short channel effect is improved and the efficiency of the metal oxide semiconductor field effect transistor is improved.

Abstract: A method of fabricating photodiode includes: a substrate comprising a well is provided, next, a first doping region is formed in the well, following that a conductive layer is formed on the surface of the first doping region by an epitaxial growth process, meanwhile, the conductive layer is in-situ doped to form a second doping region in the conductive layer. The method for fabricating the photodiode in the present invention can prevent the lattice structure from being damaged during the high dozes implantation process. Therefore, the dark current can be reduced and the sensitivity of the photodiode will be increased.

Abstract: A method of manufacturing a metal oxide semiconductor is provided. The method includes forming an offset spacer and a disposable spacer around the offset spacer. Then, forming a plurality of epitaxial layers outside the disposable spacer and removing the disposable spacer. In addition, the method includes forming a plurality of source/drain extension areas in the substrate outside the offset spacer and the epitaxial layers. Because the source/drain extension areas are formed after the selective epitaxial growth process, the thermal of the selective epitaxial growth process does not damage the source/drain extension areas.

Abstract: A method of fabrication of a metal oxide semiconductor field effect transistor is disclosed. At first, a substrate on which a gate structure is formed is provided. Afterward, a portion of the substrate is removed to form a first recess in the substrate at both ends of the gate structure. Additionally, a source/drain extension layer is deposited in the first recess and a plurality of spacers are formed at both ends of the gate structure. Subsequently, a portion of the source/drain extension and the substrate are removed to form a second recess in the source/drain extension and a portion of the substrate outside of the spacer. In addition, a source/drain layer is deposited in the second recess. Because the source/drain extension and the source/drain layer have specific materials and structures, short channel effect is improved and the efficiency of the metal oxide semiconductor field effect transistor is improved.

Abstract: First, a substrate having a plurality of NMOS transistor regions and PMOS transistor regions is provided. The substrate further includes a plurality of gate structures respectively positioned in the NMOS transistor regions and the PMOS transistor regions. A high-tensile thin film is then formed on the substrate and the plurality of gate structures. Subsequently, an annealing process is performed, and the high-tensile thin film is removed after the annealing process.

Abstract: First, a substrate having a plurality of NMOS transistor regions and PMOS transistor regions is provided. The substrate further includes a plurality of gate structures respectively positioned in the NMOS transistor regions and the PMOS transistor regions. A high-tensile thin film is then formed on the substrate and the plurality of gate structures. Subsequently, an annealing process is performed, and the high-tensile thin film is removed after the annealing process.