Abstract: Planar silicon device structures are fabricated by refilling grooves etched in an oxide-coated silicon substrate using liquid phase epitaxial growth from a tin melt. Since tin does not wet silicon dioxide, silicon nucleation on the oxide-covered areas of the substrate is precluded. Consequently, epitaxial growth selectively occurs in the grooves, without undesirable silicon growth over the oxide. This avoids the short-circuits and surface nonplanarity resulting from the growth of polycrystalline silicon on the oxide layer covering the unetched areas when vapor phase epitaxial growth is employed.

Abstract: High quality p-n junctions are formed in silicon grown epitaxially onto a silicon substrate of one conductivity type from a melt undersaturated with silicon and containing opposite conductivity type determining impurities. Lowering the substrate into the melt causes same of the substrate dopant to enter the melt. With a substrate doping level exceeding that of the epitaxial layer that would grow in the absence of meltback, the epitaxial layer initially grows with the one conductivity type. However, as epitaxial layer thickness increases, the substrate dopant atoms in the melt are consumed and the epitaxial layer grown thereafter is of opposite conductivity type, producing a p-n junction in the epitaxial layer away from the substrate.

Abstract: A high power field effect transistor having a buried grid is fabricated by epitaxially growing from the liquid phase, on a lightly doped silicon substrate, a silicon layer heavily doped with the same conductivity type determining impurities. The substrate is thinned, and a grid region heavily doped with opposite conductivity type determining impurities is diffused into the substrate. An upper layer lightly doped with the same conductivity type determining impurities as those in the substrate is then grown epitaxially from the liquid phase atop the grid region, followed by diffusion of the same conductivity type determining impurities into the upper layer. The resulting structure exhibits relatively large source-to-drain conduction area in the grid region.

Abstract: Buried regions of predetermined conductivity in silicon semiconductor devices are formed with substantially no out diffusion from the substrate and buried region, and with substantially no lateral autodoping, by diffusing the region into a monocrystalline silicon wafer doped to one conductivity type, and depositing silicon from a melt supersaturated with silicon and containing conductivity type determining impurities, epitaxially atop the wafer. The device is completed by performing conventional diffusion of conductivity type determining impurities into the epitaxially deposited layer.