Abstract: A disclosed example method to suspend and resume a device includes: after detecting a low-power suspend mode request, determining a storage performance of the device to store suspend state data; based on the storage performance of the device, setting a suspend flag to indicate a low-power suspend mode to a processor platform; when resuming from the low-power suspend mode, confirming a setting of a resume flag from the processor platform, the resume flag to notify an operating system to resume from the low-power suspend mode; and when the resume flag is set, restoring state data corresponding to an operating system context from a non-volatile dual-purpose system and storage memory.

Abstract: In an embodiment, a processor includes multiple cores and a power controller. The power controller may include a hardware duty cycle (HDC) logic to cause at least one logical processor of one of the cores to enter into a forced idle state even though the logical processor has a workload to execute. In addition, the HDC logic may cause the logical processor to exit the forced idle state prior to an end of an idle period if at least one other logical processor is prevented from entry into the forced idle state. Other embodiments are described and claimed.

Abstract: Embodiments are generally directed to sharing of environmental data for client device usage. An embodiment of a client device includes a processor; an environmental sensor to sense an environmental condition, an output of the sensor being a local environmental sensor value; and a wireless receiver to receive environmental data for a certain proximity area from a second client device according to an environmental data sharing protocol via a wireless network. The environmental data sharing protocol allows receipt of the environmental data without requiring pairing, bonding, or other relationship of client devices.

Abstract: Various embodiments are generally directed to an apparatus, method and other techniques for receiving information to invoke a transition from a first operating system to a second operating system, copying a system context for the second operating system from a location of a non-volatile memory to a volatile memory, the location associated with the second operating system and transitioning from the first operating system to the second operating system using the system context for the second operating system.

Abstract: An electronic device may be provided that includes a first controller, a second controller, and a bus to connect between the first controller and the second controller. The electronic device may also include a first signal line between the first controller and the second controller, and the first controller to provide a first signal on the first signal line to the second controller to wake up the second controller from a low power mode.

Abstract: In one embodiment, a processor includes at least one core to execute instructions and a power control logic to receive power capability information from a plurality of devices to couple to the processor and allocate a platform power budget to the devices, set a first power level for the devices at which the corresponding device is allocated to be powered, communicate the first power level to the devices, and dynamically reduce a first power to be allocated to a first device and increase a second power to be allocated to a second device responsive to a request from the second device for a higher power level. Other embodiments are described and claimed.

Abstract: Standby power entry can be performed without latency tolerance information. The embodiments disclosed herein enable a power delivery system of a computing system to enter the requested low power state while ignoring any latency tolerance information throughout the platform. For example, an operating system (OS) can request a Forced Cx state (also known as a Forced C state), such as a Forced C10 state, allowing the system to ignore any latency tolerance information throughout the platform. This Forced Cx state can be used as a test mechanism to determine if a problematic device or integrated circuit is blocking entry into the low power state.

Abstract: A power delivery system of a computing system that is on alternating current (AC) power limits software administrative tasks to a system-controlled and tunable broadcast window. This window limitation allows a computing system to enter and stay in low-power states without variable disturbances from administrative functions that can be relegated to the window. For example, maintenance is restricted until the computing system broadcasts a notification. Legacy software and devices that do not understand these notifications can be told the AC power is not present nominally, and then be notified of AC power presence during maintenance intervals.

Abstract: An apparatus is provided that includes a transceiver to transmit and receive data between an upstream device and the apparatus, and further includes service latency reporting logic coupled to the transceiver to provide a service latency tolerance value of the apparatus to the upstream device, the service latency tolerance value corresponding to an activity state of the apparatus. The service latency tolerance value for an idle activity state can be greater than the service latency tolerance value for an active activity state.

Abstract: In one embodiment, a system includes: a plurality of compute nodes to couple in a chassis; a first shared power supply to provide a baseline power level to the plurality of compute nodes; and an auxiliary power source to provide power to one or more of the plurality of compute nodes during operation at a higher power level than the baseline power level. Other embodiments are described and claimed.

Abstract: Various embodiments are generally directed to an apparatus, method and other techniques for receiving information to invoke a transition from a first operating system to a second operating system, copying a system context for the second operating system from a location of a non-volatile memory to a volatile memory, the location associated with the second operating system and transitioning from the first operating system to the second operating system using the system context for the second operating system.

Abstract: In one example an electronic device comprises a power supply comprising an operating power rail and a standby power rail, a processing platform capable to switch between an operating power state and at least one low power state, a switch to selectively couple a power input of the processing platform to one of the operating power rail or the standby power output rail and logic, at least partially including hardware logic, to activate the switch based at least in part on the operating state of the processing platform. Other examples may be described.

Abstract: A system to provide an indication to a power supply unit that a computing device operably coupled to the power supply unit is idle. The system includes an interface including power rails to provide power from the power supply unit to the computing device and an idle control line to provide an indication from the computing device to the power supply unit that the computing device is idle.

Abstract: In one embodiment, a system includes: a plurality of compute nodes to couple in a chassis; a first shared power supply to provide a baseline power level to the plurality of compute nodes; and an auxiliary power source to provide power to one or more of the plurality of compute nodes during operation at a higher power level than the baseline power level. Other embodiments are described and claimed.

Abstract: A load associated with one or more components coupled via one or more ports to a first power supply rail is monitored. The one or more components are switched to a second power supply rail, if the load is greater than a predetermined load.

Abstract: In an embodiment, a processor includes multiple cores and a power controller. The power controller may include a hardware duty cycle (HDC) logic to cause at least one logical processor of one of the cores to enter into a forced idle state even though the logical processor has a workload to execute. In addition, the HDC logic may cause the logical processor to exit the forced idle state prior to an end of an idle period if at least one other logical processor is prevented from entry into the forced idle state. Other embodiments are described and claimed.

Abstract: An electronic device may be provided that includes a first controller, a second controller, and a bus to connect between the first controller and the second controller. The electronic device may also include a first signal line between the first controller and the second controller, and the first controller to provide a first signal on the first signal line to the second controller to wake up the second controller from a low power mode.

Abstract: An apparatus is provided that includes a processor, a memory controller coupled to the processor to provide access to a system memory, and an interface controller to communicate with an endpoint device. The interface controller is coupled to the processor and configured to access a register of the endpoint device, the register to be mapped into a memory space of the system, the register to store a service latency tolerance value of the endpoint device. The endpoint device has a service latency tolerance value for a first state and a service latency tolerance value for a second state. The service latency tolerance value for the first state is greater than the service latency tolerance value for the second state.

Abstract: A power delivery system of a computing system can switch the computing platform from a set of main rails to a standby rail in a low-power state. For example, using a power optimizer framework, a platform controller hardware (PCH) and/or platform management controller (PCU) can transition an idle computing system to a low-power state using a standby rail with the main rails off. The PCU can instruct a processor in a C10 state to switch from main power rails to a standby rail. Once confirmed that the processor is in the C10 state, the PCU can turn off a processor voltage regulator and assert a platform sleep signal. After confirming the platform has entered the sleep state in which the platform has moved to the standby rails, the PCH or PCU can request a power supply to turn off the main rails but leave the standby rail active.

Abstract: A load associated with one or more components coupled via one or more ports to a first power supply rail is monitored. The one or more components are switched to a second power supply rail, if the load is greater than a predetermined load.