Patents by Inventor Barry Wright

Barry Wright has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9734050
    Abstract: A multi-layer memory and method for performing background maintenance operations are disclosed. The memory includes a plurality of flash memory die having multiple layers, where each layer is made up of flash memory cells having a greater bit per cell storage capacity than then prior layer and each layer may have a plurality of partitions for different data types. A controller managing the flash memory die is configured to identify an idle die and determine if a layer in the die satisfies a background maintenance criterion. Upon identifying a layer satisfying the background maintenance criterion, the valid data from reclaim blocks in the layer is relocated into a relocation block in the same layer until the relocation block is filled and the background maintenance cycle ends.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: August 15, 2017
    Assignee: SanDisk Technologies LLC
    Inventors: Alan Welsh Sinclair, Nicholas James Thomas, Barry Wright
  • Patent number: 9734911
    Abstract: A mass storage memory system and method of operation are disclosed. The memory system includes an interface adapted to receive data from a host system, a plurality of memory die and a controller, where the controller is configured to read or write data synchronously across a plurality of die connected to different channels based on a first command, and to read or write data asynchronously and independently in different die in the same channel based on a second command. The controller may program data in a maximum unit of programming for a single memory die. The controller may be a plurality of controllers each configured to select which die of an exclusive subset of die to write data based on characteristics of the die in the subset. The plurality of die may be multi-layer, and multi-partition per layer, flash memory die.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: August 15, 2017
    Assignee: SanDisk Technologies LLC
    Inventors: Alan Welsh Sinclair, Nicholas James Thomas, Barry Wright
  • Patent number: 9666285
    Abstract: A mass storage memory system and method of operation are disclosed. The memory system includes an interface adapted to receive data from a host system, a plurality of memory die and a controller, where the controller is configured to read or write data synchronously across a plurality of die connected to different channels based on a first command, and to read or write data asynchronously and independently in different die in the same channel based on a second command. The controller may program data in a maximum unit of programming for a single memory die. The controller may be a plurality of controllers each configured to select which die of an exclusive subset of die to write data based on characteristics of the die in the subset. The plurality of die may be multi-layer, and multi-partition per layer, flash memory die.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 30, 2017
    Assignee: SanDisk Technologies LLC
    Inventors: Alan Welsh Sinclair, Nicholas James Thomas, Barry Wright
  • Publication number: 20160378379
    Abstract: A multi-layer memory and method for operation is disclosed. The memory includes multiple layers, where each layer includes flash memory cells having a greater bit per cell capacity than then prior layer and each layer may include a plurality of partitions having blocks exclusively associated with a particular data type. The method may include the steps of directing host data directly into a particular partition of a particular layer of the multi-layer memory upon receipt depending on a type of the data. The method may also include copying data within the same partition in a respective layer in a data relocation operation to generate more free blocks of memory so that data preferably stays within each layer and in the same partition, as well as transferring data from one layer to the next higher bit per cell layer within a same partition when layer transfer criteria are met.
    Type: Application
    Filed: September 9, 2016
    Publication date: December 29, 2016
    Applicant: SanDisk Technologies LLC
    Inventors: Alan Welsh Sinclair, Nicholas James Thomas, Barry Wright
  • Patent number: 9465731
    Abstract: A multi-layer memory and method for operation is disclosed. The memory includes multiple layers, where each layer includes flash memory cells having a greater bit per cell capacity than the prior layer and each layer may include a plurality of partitions having blocks exclusively associated with a particular data type. The method may include directing host data directly into a particular partition of a particular layer of the multi-layer memory upon receipt depending on a type of the data. The method may also include copying data within the same partition in a respective layer in a data relocation operation to generate more free blocks of memory so that data preferably stays within each layer and in the same partition, as well as transferring data from one layer to the next higher bit per cell layer within a same partition when layer transfer criteria are met.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: October 11, 2016
    Assignee: SanDisk Technologies LLC
    Inventors: Alan Welsh Sinclair, Nicholas James Thomas, Barry Wright
  • Patent number: 9396103
    Abstract: A method and system for storage address re-mapping is disclosed. The method includes allocating logical addresses in blocks of clusters and re-mapping logical addresses into storage address space, where short runs of data dispersed in logical address space are mapped in a contiguous manner into blocks in storage address space. Valid data is flushed from blocks having both valid and obsolete data to make new blocks available for receiving data when an available number of new blocks falls below a desired threshold. The system includes a host file system, processor executable instructions residing on a host separately from the host file system or residing on a flash memory device such as an embedded solid state disk, or a backend memory manager of the flash memory device that is configured to map data from a logical address space to complete blocks in storage address space in a contiguous manner.
    Type: Grant
    Filed: February 22, 2008
    Date of Patent: July 19, 2016
    Assignee: SanDisk Technologies LLC
    Inventors: Alan W. Sinclair, Barry Wright
  • Patent number: 9348746
    Abstract: A multi-later memory and method for operation is disclosed. The memory includes at least one flash memory die having multiple layers and a controller configured to execute block reclaim operations in a layer of the flash memory die until a net gain of at least one additional free block has been made in the layer. The method may include relocating data from reclaim blocks to relocation blocks within the same layer, or within a same partition in the same layer until a net gain of one free block has been achieved and an integer number of relocation blocks has been filled with relocated data. The method may also include moving data from reclaim blocks in a first layer into destination blocks in a second layer until a net gain of at least one free block has been achieved in the first layer.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 24, 2016
    Assignee: SanDisk Technologies
    Inventors: Alan Welsh Sinclair, Nicholas James Thomas, Barry Wright
  • Patent number: 9336133
    Abstract: A system and method for managing program cycles in a multi-layer memory are disclosed. The method includes a controller receiving a request to program data from a host and, in advance of programming data associated with the request, determining a program cycle for programming the data associated with the request. The programming cycle may be a set of a host data write programming operation and any maintenance programming operations on an amount of data already programmed in the plurality of memory layers that is necessary to provide free memory capacity for a subsequent request to program data from the host. The controller programs the data associated with the host request, and the amount of data to be programmed in maintenance operations, in predetermined programming units according to the determined program cycle.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 10, 2016
    Assignee: SanDisk Technologies Inc.
    Inventors: Alan Welsh Sinclair, Nicholas James Thomas, Barry Wright
  • Patent number: 9317204
    Abstract: A system and method for I/O optimization in a multi-queued environment are provided. In one embodiment, a host is provided that sorts commands into a plurality of queues, wherein a command is sorted based on its data characteristic. The host receives a read request from a storage module for commands in the plurality of queues and provides the storage module with the requested commands. In another embodiment, a storage module is provided that processes commands from a host based on the data characteristic of the queue that stored the command on the host. In another embodiment, a storage module sorts command completions into a plurality of queues, wherein a command completion is sorted based on its resulting status code.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: April 19, 2016
    Assignee: SanDisk Technologies Inc.
    Inventors: Judah Gamliel Hahn, Joseph Meza, Vered Kelner, Nicholas Thomas, Barry Wright
  • Patent number: 9223693
    Abstract: A flash memory system having unequal number of memory die and method for operation are disclosed. The memory system includes a plurality of flash memory die distributed unevenly among different control lines, such that there are an unequal number of die between control lines. A total physical capacity of the plurality of flash memory die is greater than a total logical capacity such that the memory system is over provisioned with physical capacity. A logical address splitter directs data received from a host system and associated with host logical block addresses such that each control line only receives data associated with predetermined host logical block address ranges and directs the data such that a ratio of physical capacity to logical capacity is equal among each of the control lines, regardless of the different number of die and associated different physical capacity per control line.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: December 29, 2015
    Assignee: SanDisk Technologies Inc.
    Inventors: Alan Welsh Sinclair, Nicholas James Thomas, Barry Wright
  • Publication number: 20150134857
    Abstract: A system and method for I/O optimization in a multi-queued environment are provided. In one embodiment, a host is provided that sorts commands into a plurality of queues, wherein a command is sorted based on its data characteristic. The host receives a read request from a storage module for commands in the plurality of queues and provides the storage module with the requested commands. In another embodiment, a storage module is provided that processes commands from a host based on the data characteristic of the queue that stored the command on the host. In another embodiment, a storage module sorts command completions into a plurality of queues, wherein a command completion is sorted based on its resulting status code.
    Type: Application
    Filed: February 25, 2014
    Publication date: May 14, 2015
    Applicant: SanDisk Technologies Inc.
    Inventors: Judah Gamliel Hahn, Joseph Meza, Vered Kelner, Nicholas Thomas, Barry Wright
  • Patent number: 8873284
    Abstract: A multi-layer memory and method for operation is disclosed. The memory includes an interface, at least one flash memory die having a plurality of layers and a controller. The controller is configured to select an appropriate one of a predetermined number of program cycles for programming a fixed amount of host data, and for carrying out maintenance operations in one or more of the layers sufficient to permit a next host data write operation. The controller calculates an interleave ratio of maintenance operations to host data programming operations in each of the layers used in the determined programming cycle so that creation of free space is interspersed with host data writes in a steady manner during execution of the determined programming cycle.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: October 28, 2014
    Assignee: SanDisk Technologies Inc.
    Inventors: Alan Welsh Sinclair, Nicholas James Thomas, Barry Wright
  • Publication number: 20140189209
    Abstract: A multi-layer memory and method for operation is disclosed. The memory includes multiple layers, where each layer includes flash memory cells having a greater bit per cell capacity than then prior layer and each layer may include a plurality of partitions having blocks exclusively associated with a particular data type. The method may include the steps of directing host data directly into a particular partition of a particular layer of the multi-layer memory upon receipt depending on a type of the data. The method may also include copying data within the same partition in a respective layer in a data relocation operation to generate more free blocks of memory so that data preferably stays within each layer and in the same partition, as well as transferring data from one layer to the next higher bit per cell layer within a same partition when layer transfer criteria are met.
    Type: Application
    Filed: March 14, 2013
    Publication date: July 3, 2014
    Inventors: Alan Welsh Sinclair, Nicholas James Thomas, Barry Wright
  • Publication number: 20140185376
    Abstract: A mass storage memory system and method of operation is disclosed. The memory includes an interface adapted to receive data from a host, a plurality of flash memory die and a controller, where the controller is configured to receive a first command and read or write data synchronously across the plurality of die based on a first command, and to receive a second command and read or write data asynchronously and independently in each die based on a second command. The controller may program data in a maximum unit of programming for an individual one of the plurality of flash memory die. The controller may be a plurality of controllers each configured to select which die of an exclusive subset of die to write data based on characteristics of the die in the subset. The plurality of die may be multi-layer, and multi-partition per layer, flash memory die.
    Type: Application
    Filed: March 14, 2013
    Publication date: July 3, 2014
    Inventors: Alan Welsh Sinclair, Nicholas James Thomas, Barry Wright
  • Publication number: 20140189205
    Abstract: A system and method for managing program cycles in a multi-layer memory is disclosed. The method includes a controller receiving a request to program data from a host and, in advance of programming data associated with the request, determining a program cycle for programming the data associated with the request and an amount of data already programmed in the plurality of memory layers necessary to be programmed in maintenance operations to provide free memory capacity for a subsequent request to program data from the host. The controller programs the data associated with the request, and the amount of data already programmed to be programmed in maintenance operations, in predetermined programming units according to the determined program cycle.
    Type: Application
    Filed: March 14, 2013
    Publication date: July 3, 2014
    Inventors: Alan Welsh Sinclair, Nicholas James Thomas, Barry Wright
  • Publication number: 20140189208
    Abstract: A multi-layer memory and method for operation is disclosed. The memory includes an interface, at least one flash memory die having a plurality of layers and a controller. The controller is configured to select an appropriate one of a predetermined number of program cycles for programming a fixed amount of host data, and for carrying out maintenance operations in one or more of the layers sufficient to permit a next host data write operation. The controller calculates an interleave ratio of maintenance operations to host data programming operations in each of the layers used in the determined programming cycle so that creation of free space is interspersed with host data writes in a steady manner during execution of the determined programming cycle.
    Type: Application
    Filed: March 14, 2013
    Publication date: July 3, 2014
    Inventors: Alan Welsh Sinclair, Nicholas James Thomas, Barry Wright
  • Publication number: 20140189206
    Abstract: A multi-later memory and method for operation is disclosed. The memory includes at least one flash memory die having multiple layers and a controller configured to execute block reclaim operations in a layer of the flash memory die until a net gain of at least one additional free block has been made in the layer. The method may include relocating data from reclaim blocks to relocation blocks within the same layer, or within a same partition in the same layer until a net gain of one free block has been achieved and an integer number of relocation blocks has been filled with relocated data. The method may also include moving data from reclaim blocks in a first layer into destination blocks in a second layer until a net gain of at least one free block has been achieved in the first layer.
    Type: Application
    Filed: March 14, 2013
    Publication date: July 3, 2014
    Inventors: Alan Welsh Sinclair, Nicholas James Thomas, Barry Wright
  • Publication number: 20140189207
    Abstract: A multi-layer memory and method for performing background maintenance operations are disclosed. The memory includes a plurality of flash memory die having multiple layers, where each layer is made up of flash memory cells having a greater bit per cell storage capacity than then prior layer and each layer may have a plurality of partitions for different data types. A controller managing the flash memory die is configured to identify an idle die and determine if a layer in the die satisfies a background maintenance criterion. Upon identifying a layer satisfying the background maintenance criterion, the valid data from reclaim blocks in the layer is relocated into a relocation block in the same layer until the relocation block is filled and the background maintenance cycle ends.
    Type: Application
    Filed: March 14, 2013
    Publication date: July 3, 2014
    Inventors: Alan Welsh Sinclair, Nicholas James Thomas, Barry Wright
  • Publication number: 20140189210
    Abstract: A flash memory system having unequal number of memory die and method for operation is disclosed. The memory includes a plurality of flash memory die distributed unevenly among different control lines, such that there are an unequal number of die between control lines. A total physical storage capacity of the plurality of flash memory die is greater than a total logical capacity such that the memory system is over provisioned with physical storage capacity. A logical address splitter directs data received from a host system and associated with host logical block addresses such that each control line only receives data associated with predetermined host logical block address ranges and directs the data such that a ratio of physical capacity to logical capacity is equal among each of the control lines, regardless of the different number of die, and associated different physical capacity per control line.
    Type: Application
    Filed: March 14, 2013
    Publication date: July 3, 2014
    Inventors: Alan Welsh Sinclair, Nicholas James Thomas, Barry Wright
  • Patent number: 8537613
    Abstract: A multi-later memory and method for operation is disclosed. The memory includes three or more layers, where each layer is made up of flash memory cells having a greater bit per cell storage capacity than then prior layer. The method may include the steps of directing host data directly into a first or second layer of the multi-layer memory upon receipt depending on a condition of the data. The method may also include copying data within a respective layer in a data relocation operation to generate more free blocks of memory so that data preferably stays within each layer, as well as transferring data from one layer to the next higher bit per cell layer when layer transfer criteria are met.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: September 17, 2013
    Assignee: SanDisk Technologies Inc.
    Inventors: Alan Welsh Sinclair, Nicholas James Thomas, Barry Wright