Abstract: The present invention facilitates efficient and effective device testing and debugging. In one embodiment, a tester system includes: a controller processor, a plurality of programmable accelerator circuits, and a plurality of load boards respectively. The plurality of programmable accelerator circuits providing input test signals and capture output test signals. The plurality of load boards apply the input test signals to a plurality of devices under test (DUTs) and capture the output test signals therefrom. In one exemplary implementation, each of the plurality of load boards includes a first set of connections that transmit input test signals to a respective DUT, a second set of connections that receive output test signals from the respective DUT, and sideband connectors. The sideband connectors receive test related information from the DUT.

Abstract: A scalable test platform can include one or more of a plurality of different device interface boards and a plurality of primitives. The different device interface boards can be configured to provide a uniform interface to couple different types of DUTs and or DUTs with different form factors to the plurality of primitives. The plurality of primitives can be configured to distribute power to the DUTs, and to perform system level testing of the respective DUTs. The plurality of primitives can be configurable by a user to perform any number of system level tests on a number of different types of DUTs and or DUTs with different form factors.

Abstract: A method for monitoring a communication link between a device under test (DUT) and automated test equipment is disclosed. The method comprises monitoring data traffic associated with testing a DUT using a protocol analyzer module, wherein the data traffic comprises a flow of traffic between the DUT and a protocol core of a programmable logic device, wherein the protocol analyzer module is integrated within the programmable logic device, wherein the programmable logic device is controlled by a system controller and is operable to generate commands and data to test the DUT, and wherein the protocol core is operable to generate signals to communicate with the DUT using a protocol associated with the DUT. The method further comprises saving results associated with the monitoring in a memory associated with the protocol analyzer module and transmitting the results upon request to an application program executing on the system controller.

Abstract: A method for diagnosing a root cause of failure using automated test equipment is disclosed. The method comprises monitoring data traffic associated with testing a device under test (DUT) in the automated test equipment using a plurality capture modules, wherein the plurality of capture modules are programmed onto a programmable logic device, wherein the programmable logic device is controlled by a system controller and is operable to generate commands and data to test the DUT, wherein the plurality of capture modules are operable to selectively capture the data traffic to be monitored, and wherein the data traffic monitored comprises a flow of traffic between the DUT and the system controller. The method further comprises saving results associated with the monitoring in respective memories associated with each of the plurality of capture modules. Further, the method comprises transmitting the results upon request to an application program executing on the system controller.

Abstract: The present invention facilitates efficient and effective device testing and debugging. In one embodiment, a tester system includes a controller processor; a plurality of programmable accelerator circuits coupled to and controlled by the controller processor; and a plurality of load boards respectively coupled to the plurality of programmable accelerator circuits. The plurality of load boards can apply the input test signals to a plurality of devices under test (DUTs) and capture the output test signals therefrom. The plurality of programmable accelerator circuits can provide input test signals and capture output test signals. In one exemplary implementation, each of the plurality of load boards comprises: a first set of connections for transmitting input test signals to a respective DUT; a second set of connections for receiving output test signals from the respective DUT; and sideband connectors. The sideband connectors receive test related information from the DUT.

Abstract: The present invention facilitates efficient and effective device testing and debugging. In one embodiment, a tester system includes: a controller processor, a plurality of programmable accelerator circuits, and a plurality of load boards respectively. The plurality of programmable accelerator circuits providing input test signals and capture output test signals. The plurality of load boards apply the input test signals to a plurality of devices under test (DUTs) and capture the output test signals therefrom. In one exemplary implementation, each of the plurality of load boards includes a first set of connections that transmit input test signals to a respective DUT,a second set of connections that receive output test signals from the respective DUT, and sideband connectors. The sideband connectors receive test related information from the DUT.

Abstract: A method for diagnosing a root cause of failure using automated test equipment is disclosed. The method comprises monitoring data traffic associated with testing a device under test (DUT) in the automated test equipment using a plurality capture modules, wherein the plurality of capture modules are programmed onto a programmable logic device, wherein the programmable logic device is controlled by a system controller and is operable to generate commands and data to test the DUT, wherein the plurality of capture modules are operable to selectively capture the data traffic to be monitored, and wherein the data traffic monitored comprises a flow of traffic between the DUT and the system controller. The method further comprises saving results associated with the monitoring in respective memories associated with each of the plurality of capture modules. Further, the method comprises transmitting the results upon request to an application program executing on the system controller.

Abstract: A method for monitoring a communication link between a device under test (DUT) and automated test equipment is disclosed. The method comprises monitoring data traffic associated with testing a DUT using a protocol analyzer module, wherein the data traffic comprises a flow of traffic between the DUT and a protocol core of a programmable logic device, wherein the protocol analyzer module is integrated within the programmable logic device, wherein the programmable logic device is controlled by a system controller and is operable to generate commands and data to test the DUT, and wherein the protocol core is operable to generate signals to communicate with the DUT using a protocol associated with the DUT. The method further comprises saving results associated with the monitoring in a memory associated with the protocol analyzer module and transmitting the results upon request to an application program executing on the system controller.

Abstract: A scalable test platform can include one or more of a plurality of different device interface boards and a plurality of primitives. The different device interface boards can be configured to provide a uniform interface to couple different types of DUTs and or DUTs with different form factors to the plurality of primitives. The plurality of primitives can be configured to distribute power to the DUTs, and to perform system level testing of the respective DUTs. The plurality of primitives can be configurable by a user to perform any number of system level tests on a number of different types of DUTs and or DUTs with different form factors.

Abstract: A method for diagnosing a root cause of failure using automated test equipment (ATE) is disclosed. The method comprises identifying a failing device under test (DUT). Further, the method comprises opening a test program log associated with the failing DUT and determining a time of failure by parsing through the test program log to find an identifier and timestamp associated with the failure. Finally, the method comprises displaying the test program log in a window within a graphical user interface, wherein a relevant section of the test program log associated with the failure is displayed in the window.

Abstract: Presented embodiments facilitate efficient and effective access to a device under test. In one embodiment, a test system comprises: a device interface board (DIB) configured to interface with a device under test (DUT); and a primitive configured to control the device interface board and testing of the device under test. The primitive is an independent self contained test control unit comprising: a backplane interface configured to couple with the device interface board; a power supply component configured to control power to the backplane interface; and a site module configured to control testing signals sent to the device interface board and device under test. The site module is reconfigurable for different test protocols. The primitive can be compatible with a distributed testing infrastructure. In one exemplary implementation, the primitive and device interface board are portable an operable to perform independent testing unfettered by other control components.

Abstract: In an embodiment, a universal test cell includes a plurality of test slots configured to receive a plurality of universal test containers each including similar dimensions. Each universal test container is configured to enclose each of a plurality of different devices to test. Each universal test container includes an external electrical interface configured to couple to each of the plurality of different devices to test. The universal test cell is configured to test the plurality of different devices while each is located within a universal test container of the plurality of universal test containers. The universal test cell includes a plurality of universal electrical interfaces that are each configured to couple with the external electrical interface of each universal test container.

Abstract: Presented embodiments facilitate efficient and effective access to a device under test. In one embodiment, a test system comprises: a device interface board (DIB) configured to interface with a device under test (DUT); and a primitive configured to control the device interface board and testing of the device under test. The primitive is an independent self contained test control unit comprising: a backplane interface configured to couple with the device interface board; a power supply component configured to control power to the backplane interface; and a site module configured to control testing signals sent to the device interface board and device under test. The site module is reconfigurable for different test protocols. The primitive can be compatible with a distributed testing infrastructure. In one exemplary implementation, the primitive and device interface board are portable an operable to perform independent testing unfettered by other control components.

Abstract: The present invention facilitates efficient and effective device testing and debugging. In one embodiment, a tester system comprises: a controller processor; a plurality of programmable accelerator circuits coupled to and controlled by said controller processor, said plurality of programmable accelerator circuits for providing input test signals and for capturing output test signals; and a plurality of load boards respectively coupled to said plurality of programmable accelerator circuits, said plurality of load boards for applying said input test signals to a plurality of devices under test (DUTs) and for capturing said output test signals therefrom. In one exemplary implementation, each of said plurality of load boards comprises: a first set of connections for transmitting input test signals to a respective DUT; a second set of connections for receiving output test signals from said respective DUT; and sideband connectors. The sideband connectors receive test related information from said DUT.

Abstract: In one embodiment, a universal test container can include a universal external electrical interface configured to couple to each of a plurality of different devices to test. In addition, the universal test container is configured to enclose each of the plurality of different devices to test.

Abstract: In an embodiment, a universal test floor system includes a first robot that is configured to pack a plurality of universal test containers each including similar dimensions into a universal bin. Each universal test container is configured to enclose each of a plurality of different devices to test. The universal test floor system includes a universal conveyor configured to transport the universal bin. The first robot is configured to put the universal bin onto the universal conveyor and a second robot is configured to remove it. A universal test cell system is configured to receive the universal bin. The universal test cell system includes a plurality of test slots configured to receive a plurality of universal test containers. The universal test cell system is configured to test the plurality of different devices while each is located within one of the plurality of universal test containers.

Abstract: In an embodiment, a testing system includes a frame, a DUT (device under test) testing module. The frame has at least one aperture extending from a front side of the frame to a rear side of the frame. The DUT testing module is inserted into the at least one aperture. The DUT testing module is operable to receive and hold a DUT receptacle including an electrical interface, an air flow interface, and a DUT coupled to the electrical interface. The DUT receptacle is configured to enclose and hold inside the DUT. Further, the DUT testing module is operable to couple to and to use the electrical interface and the air flow interface to perform a test at a controlled temperature on the DUT that is inside of the DUT receptacle.

Abstract: In an embodiment, a test floor apparatus includes at least one conveyor, a vertical stack buffer, and an automated handling station. The vertical stack buffer is operable to hold a plurality of DUT (device under test) receptacles and operable to place a DUT receptacle on the at least one conveyor to enable a corresponding DUT to be inserted into the DUT receptacle. The automated handling station is operable to access the DUT receptacle from the at least one conveyor and is operable to open the DUT receptacle to position the corresponding DUT in a manner that couples the corresponding DUT to an electrical interface of the DUT receptacle and that encloses the corresponding DUT inside the DUT receptacle to facilitate testing of the corresponding DUT.

Abstract: In an embodiment, a method includes causing a test floor system to insert a DUT (device under test) into a DUT receptacle. This is performed in a manner that couples the DUT to an electrical interface of the DUT receptacle and that encloses the DUT inside the DUT receptacle to facilitate testing of the DUT. Also, the method includes causing the test floor system to transport the DUT receptacle that encloses the DUT to a tester of the test floor system and to insert the DUT receptacle into a DUT testing module of the tester. Further, the method includes causing the test floor system to determine identification information of the DUT. Furthermore, the method includes, based on the identification information, sending a test routine to the DUT testing module to perform on the DUT.

Abstract: In an embodiment, a testing apparatus includes an air mixing chamber, a docking unit, and a DUT (device under test) test execution unit. The air mixing chamber includes a first air inlet operable to receive a first air flow, a second air inlet operable to receive a second air flow, and an air outlet operable to output a mixed air flow. The docking unit is operable to receive and to securely hold a DUT (device under test) receptacle including an electrical interface, an air flow interface, and a DUT coupled to the electrical interface. The DUT receptacle is configured to enclose and hold inside the DUT. The docking unit is operable to couple to the electrical interface and to the air flow interface. The docking unit is operable to receive and to send the mixed air flow to the DUT receptacle. A DUT test execution unit is coupled to the docking unit. The DUT test execution unit is operable to perform a test on the DUT that is inside of the DUT receptacle.