Patents by Inventor Benjamin B. Riordon

Benjamin B. Riordon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190259638
    Abstract: Wafer cassettes and methods of use that provide heating a cooling to a plurality of wafers to decrease time between wafer switching in a processing chamber. Wafers are supported on a wafer lift which can move all wafers together or on independent lift pins which can move individual wafers for heating and cooling.
    Type: Application
    Filed: May 1, 2019
    Publication date: August 22, 2019
    Inventors: Jason M. Schaller, Robert Brent Vopat, Paul E. Pergande, Benjamin B. Riordon, David Blahnik, William T. Weaver
  • Patent number: 10283379
    Abstract: Apparatus and methods for heating and cooling a plurality of substrate wafers are provided. LED lamps are positioned against the back sides of a plurality of cold plates. In some embodiments, wafers are supported on a wafer lift which can move all wafers together. In some embodiments, wafers are supported on independent lift pins which can move individual wafers for heating and cooling. Some embodiments of the disclosure provide for decreased time between wafer switching in a processing chamber.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: May 7, 2019
    Assignee: Applied Materials, Inc.
    Inventors: Jason M. Schaller, Robert Brent Vopat, Paul E. Pergande, Benjamin B. Riordon, David T. Blahnik, William T. Weaver
  • Publication number: 20190019708
    Abstract: Buffer chamber including robots, a carousel and at least one heating module for use with a batch processing chamber are described. Robot configurations for rapid and repeatable movement of wafers into and out of the buffer chamber and cluster tools incorporating the buffer chambers and robots are described.
    Type: Application
    Filed: September 11, 2018
    Publication date: January 17, 2019
    Inventors: William T. Weaver, Jason M. Schaller, Robert Brent Vopat, David Blahnik, Benjamin B. Riordon, Paul E. Pergande
  • Patent number: 10157763
    Abstract: Systems and methods for facilitating expeditious handling and processing of semiconductor substrates with a minimal number of handling devices. Such a system may include an entry load-lock configured to transfer substrates from an atmospheric environment to a vacuum chamber, an alignment station disposed in the vacuum chamber and configured to adjust orientations of substrates, a first vacuum robot configured to move substrates from the entry load-lock to the alignment station, a process station disposed in the vacuum chamber and configured to perform a designated process on substrates, first and second exit load-locks configured to transfer substrates from the vacuum chamber to the atmospheric environment, and a second vacuum robot configured to move substrates from the alignment station to the process station and further configured to move substrates from the process station to the first exit load-lock and to the second exit load-lock in an alternating fashion.
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: December 18, 2018
    Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Robert J. Mitchell, Eric Hermanson, Benjamin B. Riordon
  • Patent number: 10103046
    Abstract: Buffer chamber including robots, a carousel and at least one heating module for use with a batch processing chamber are described. Robot configurations for rapid and repeatable movement of wafers into and out of the buffer chamber and cluster tools incorporating the buffer chambers and robots are described.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: October 16, 2018
    Assignee: APPLIED MATERIALS, INC.
    Inventors: William T. Weaver, Jason M. Schaller, Robert Brent Vopat, David Blahnik, Benjamin B. Riordon, Paul E. Pergande
  • Patent number: 9863032
    Abstract: Herein, an improved technique for processing a substrate is disclosed. In one particular exemplary embodiment, the technique may be achieved using a mask for processing the substrate. The mask may be incorporated into a substrate processing system such as, for example, an ion implantation system. The mask may comprise one or more first apertures disposed in a first row; and one or more second apertures disposed in a second row, each row extending along a width direction of the mask, wherein the one or more first apertures and the one or more second apertures are non-uniform.
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: January 9, 2018
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Kevin M. Daniels, Russell J. Low, Nicholas P. T. Bateman, Benjamin B. Riordon
  • Publication number: 20160307782
    Abstract: Buffer chamber including robots, a carousel and at least one heating module for use with a batch processing chamber are described. Robot configurations for rapid and repeatable movement of wafers into and out of the buffer chamber and cluster tools incorporating the buffer chambers and robots are described.
    Type: Application
    Filed: April 15, 2016
    Publication date: October 20, 2016
    Inventors: William T. Weaver, Jason M. Schaller, Robert Brent Vopat, David Blahnik, Benjamin B. Riordon, Paul E. Pergande
  • Publication number: 20160218028
    Abstract: Wafer cassettes and methods of use that provide heating a cooling to a plurality of wafers to decrease time between wafer switching in a processing chamber. Wafers are supported on a wafer lift which can move all wafers together or on independent lift pins which can move individual wafers for heating and cooling.
    Type: Application
    Filed: January 20, 2016
    Publication date: July 28, 2016
    Inventors: Jason M. Schaller, Robert Brent Vopat, Paul E. Pergande, Benjamin B. Riordon, David T. Blahnik, William T. Weaver
  • Patent number: 9076914
    Abstract: Herein, an improved technique for processing a substrate is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for processing a substrate. The method may comprise directing an ion beam comprising a plurality of ions along an ion beam path, from an ion source to the substrate; disposing at least a portion of a mask in the ion beam path, between the ion source and the substrate; and translating one of the substrate and the mask relative to other one of the substrate and the mask.
    Type: Grant
    Filed: April 7, 2010
    Date of Patent: July 7, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Kevin M. Daniels, Russell L. Low, Benjamin B. Riordon
  • Patent number: 9070535
    Abstract: A proximity mask for ion implantation that is configured to resist thermal deformation in a direction normal to an ion beam projected on and through the mask. The mask may include a frame defining a central aperture and a plurality of ribs disposed within the aperture. The ribs may define a doping pattern and may be configured to deform in a direction normal to an ion beam projected thereon and to resist deformation in a direction orthogonal to an ion beam projected thereon upon being heated. Particularly, at least one of the ribs may include a bridge member, first and second perpendicular support legs extending perpendicularly from the bridge member, and first and second parallel support legs that extend perpendicularly from the first and second perpendicular support legs, respectively. The first and second parallel support legs may be attached to the frame.
    Type: Grant
    Filed: June 25, 2013
    Date of Patent: June 30, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventor: Benjamin B. Riordon
  • Publication number: 20150102237
    Abstract: Herein, an improved technique for processing a substrate is disclosed. In one particular exemplary embodiment, the technique may be achieved using a mask for processing the substrate. The mask may be incorporated into a substrate processing system such as, for example, an ion implantation system. The mask may comprise one or more first apertures disposed in a first row; and one or more second apertures disposed in a second row, each row extending along a width direction of the mask, wherein the one or more first apertures and the one or more second apertures are non-uniform.
    Type: Application
    Filed: November 24, 2014
    Publication date: April 16, 2015
    Inventors: Kevin M. Daniels, Russell J. Low, Nicholas P.T. Bateman, Benjamin B. Riordon
  • Patent number: 9006688
    Abstract: Herein, an improved technique for processing a substrate is disclosed. In one particular exemplary embodiment, the technique may be achieved using a mask for processing the substrate. The mask may be incorporated into a substrate processing system such as, for example, an ion implantation system. The mask may comprise a first base; and a plurality of fingers spaced apart from one another to define one or more gaps.
    Type: Grant
    Filed: April 7, 2010
    Date of Patent: April 14, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Kevin M. Daniels, Russell J. Low, Benjamin B. Riordon
  • Patent number: 9000446
    Abstract: Herein, an improved technique for processing a substrate is disclosed. In one particular exemplary embodiment, the technique may be realized with a system for processing one or more substrates. The system may comprise an ion source for generating ions of desired species, the ions generated from the ion source being directed toward the one or more substrates along an ion beam path; a substrate support for supporting the one or more substrates; a mask disposed between the ion source and the substrate support, the mask comprising a finger defining one or more apertures through which a portion of the ions traveling along the ion beam path pass; and a first detector for detecting ions, the first detector being fixedly positioned relative to the one or more substrates.
    Type: Grant
    Filed: May 20, 2010
    Date of Patent: April 7, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Benjamin B. Riordon, Kevin M. Daniels, William T. Weaver, Steven M. Anella
  • Publication number: 20150063954
    Abstract: Systems and methods for facilitating expeditious handling and processing of semiconductor substrates with a minimal number of handling devices. Such a system may include an entry load-lock configured to transfer substrates from an atmospheric environment to a vacuum chamber, an alignment station disposed in the vacuum chamber and configured to adjust orientations of substrates, a first vacuum robot configured to move substrates from the entry load-lock to the alignment station, a process station disposed in the vacuum chamber and configured to perform a designated process on substrates, first and second exit load-locks configured to transfer substrates from the vacuum chamber to the atmospheric environment, and a second vacuum robot configured to move substrates from the alignment station to the process station and further configured to move substrates from the process station to the first exit load-lock and to the second exit load-lock in an alternating fashion.
    Type: Application
    Filed: August 29, 2013
    Publication date: March 5, 2015
    Applicant: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Robert J. Mitchell, Eric Hermanson, Benjamin B. Riordon
  • Publication number: 20140374626
    Abstract: A proximity mask for ion implantation that is configured to resist thermal deformation in a direction normal to an ion beam projected on and through the mask. The mask may include a frame defining a central aperture and a plurality of ribs disposed within the aperture. The ribs may define a doping pattern and may be configured to deform in a direction normal to an ion beam projected thereon and to resist deformation in a direction orthogonal to an ion beam projected thereon upon being heated. Particularly, at least one of the ribs may include a bridge member, first and second perpendicular support legs extending perpendicularly from the bridge member, and first and second parallel support legs that extend perpendicularly from the first and second perpendicular support legs, respectively. The first and second parallel support legs may be attached to the frame.
    Type: Application
    Filed: June 25, 2013
    Publication date: December 25, 2014
    Inventor: Benjamin B. Riordon
  • Patent number: 8900982
    Abstract: Herein, an improved technique for processing a substrate is disclosed. In one particular exemplary embodiment, the technique may be achieved using a mask for processing the substrate. The mask may be incorporated into a substrate processing system such as, for example, an ion implantation system. The mask may comprise one or more first apertures disposed in a first row; and one or more second apertures disposed in a second row, each row extending along a width direction of the mask, wherein the one or more first apertures and the one or more second apertures are non-uniform.
    Type: Grant
    Filed: April 7, 2010
    Date of Patent: December 2, 2014
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Kevin M. Daniels, Russell L. Low, Nicholas P. T. Bateman, Benjamin B. Riordon
  • Patent number: 8895325
    Abstract: A system and method are disclosed for aligning substrates during successive process steps, such as ion implantation steps, is disclosed. Implanted regions are created on a substrate. After implantation, an image is obtained of the implanted regions, and a fiducial is provided on the substrate in known relation to at least one of the implanted regions. A thermal anneal process is performed on the substrate such that the implanted regions are no longer visible but the fiducial remains visible. The position of the fiducial may be used in downstream process steps to properly align pattern masks over the implanted regions. The fiducial also may be applied to the substrate before any ion implanting of the substrate is performed. The position of the fiducial with respect to an edge or a corner of the substrate may be used for aligning during downstream process steps. Other embodiments are described and claimed.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: November 25, 2014
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: John W. Graff, Benjamin B. Riordon, Nicholas P. T. Bateman
  • Publication number: 20140224310
    Abstract: One method of implanting a workpiece involves implanting the workpiece with an n-type dopant in a first region with center and a periphery. The workpiece also is implanted with a p-type dopant in a second region complementary to the first region. This second region also has a center and a periphery. The periphery of the first region and the periphery of the second region at least partially overlap. A dose at the periphery of the first region or second region is less than a dose at the center of the first region or second region. The region of overlap may function as a junction where charge carriers cannot pass.
    Type: Application
    Filed: April 15, 2014
    Publication date: August 14, 2014
    Inventors: Nicholas P.T. Bateman, Peter F. Kurunczi, Benjamin B. Riordon, John W. Graff
  • Publication number: 20140169402
    Abstract: An ion implant apparatus configured to measure the temperature or monitor the degradation of components in the apparatus is provided. The ion implant apparatus may include a platen configured to move in a first direction, a mask frame to hold one or more masks disposed on the platen, a first optical sensor configured to project an optical beam to a second optical sensor, and a measurement bar disposed on the mask frame, the measurement bar raised above the surface of the mask frame to interrupt the optical beam when the platen moves in the first direction.
    Type: Application
    Filed: December 10, 2013
    Publication date: June 19, 2014
    Applicant: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Aaron P. Webb, Benjamin B. Riordon, Charles T. Carlson, Christopher N. Grant, Luke Bonecutter, William T. Weaver
  • Patent number: 8697559
    Abstract: One method of implanting a workpiece involves implanting the workpiece with an n-type dopant in a first region with center and a periphery. The workpiece also is implanted with a p-type dopant in a second region complementary to the first region. This second region also has a center and a periphery. The periphery of the first region and the periphery of the second region at least partially overlap. A dose at the periphery of the first region or second region is less than a dose at the center of the first region or second region. The region of overlap may function as a junction where charge carriers cannot pass.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: April 15, 2014
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Nicholas P. T. Bateman, Peter L. Kurunczi, Benjamin B. Riordon, John W. Graff