Abstract: A method, structure, system of aligning a substrate to a photomask. The method comprising: directing light through a clear region of the photomask in a photolithography tool, through a lens of the tool and onto a set of at least three diffraction mirror arrays on the substrate, each diffraction mirror array of the set of at least three diffraction mirror arrays comprising a single row of mirrors, all mirrors in any particular diffraction mirror array spaced apart a same distance, mirrors in different diffraction mirror arrays spaced apart different distances; measuring an intensity of light diffracted from the set of at least three diffraction mirror arrays onto an array of photo detectors; and adjusting a temperature of the photomask or photomask and lens based on the measured intensity of light.

Abstract: A method, system and computer program product for partitioning the binary image of a software program, and partially removing code bits to create an encrypted software key, to increase software security. The software program's binary image is partitioned along a random segment length or a byte/nibble segment length, and the code bits removed, and stored, along with their positional data in a software key. The software key is encrypted and is separately distributed from the inoperable binary image to the end user. The encrypted key is stored on a secure remote server. When the end user properly authenticates with the developer's remote servers, the encrypted security key is downloaded from the secure remote server and is locally decrypted. The removed code bits are reinserted into the fractioned binary image utilizing the positional location information. The binary image is then operable to complete execution of the software program.

Abstract: A method and system are provided for coupling a DRAM and a memory controller during driver training to reduce mismatches by controlling impedances within the system environment. A memory device initializes a bit level voltage on a data net. A driver impedance in a driving element in the controller is modified to yield improvements in timing margins.

Abstract: A memory device and memory controller are coupled during driver training to reduce mismatches. The impedances of the system are controlled through a termination at the memory device to yield improvements in timing margins. The coupling of the components on a shared electrical bus through adjustment of the termination values during training removes known offset issues.

Abstract: A memory device is connected through an interface to a memory controller. The memory device's reference voltage is set based on a driver's impedance of the memory device and the controller driver drive strength during driver training. The voltage is applied to a reference resistor pair at the memory device and changed until the voltage level switches. The voltage is then set at the reference resistor pair of the memory device.

Abstract: Advantageous systems and methods are provided for tracking the transportation of passengers. In general, the systems and methods utilize GPS signals associated with each of a passenger and a transportation vehicle to determine at least one of: (i) a start point for the passenger traveling via the transportation vehicle and (ii) an end point for the passenger traveling via the transportation vehicle. The determination of the start and/or end points for the passenger traveling via the transportation vehicle may advantageously facilitate ticketing, e.g., by automatically validating/calculating trip cost, trip duration, trip distance, etc.

Abstract: A method and system are provided for coupling a DRAM and a memory controller during driver training to reduce mismatches by controlling impedances within the system environment. The memory device, which is typically the device initializing a bit level voltage on a data net, is adjusted through altering what appears to be the reference voltage value to the memory device. A current driven to the memory device is varied in small increments while impedance training is rerun until a desired value is achieved to set the 0 level voltage on the data net.

Abstract: A memory device is connected through an interface to a memory controller. The controller's reference voltage is set based on a driver's impendence of the memory device during driver training. The voltage is applied to a reference resistor pair at the controller and changed until the voltage level switches. The voltage is then set at the reference resistor pair of the controller.

Abstract: A memory device is connected through an interface to a memory controller. The memory device's reference voltage is set based on a driver's impedance of the memory device and the controller driver drive strength during driver training. The voltage is applied to a reference resistor pair at the memory device and changed until the voltage level switches. The voltage is then set at the reference resistor pair of the memory device.

Abstract: A method and system are provided for coupling a DRAM and a memory controller during driver training to reduce mismatches by controlling impedances within the system environment. The memory device, which is typically the device initializing a bit level voltage on a data net, is adjusted through altering what appears to be the reference voltage value to the memory device. A current driven to the memory device is varied in small increments while impedance training is rerun until a desired value is achieved to set the 0 level voltage on the data net.

Abstract: A memory device and memory controller are coupled during driver training to reduce mismatches. The impedances of the system are controlled through a termination at the memory device to yield improvements in timing margins. The coupling of the components on a shared electrical bus through adjustment of the termination values during training removes known offset issues.

Abstract: A DRAM and memory controller are coupled during driver training to reduce mismatches. The impedances of the system are controlled through a termination at the controller to yield improvements in timing margins. The coupling of the components on a shared electrical bus through adjustment of the termination values during training removes known offset issues.

Abstract: A method and system are provided for coupling a DRAM and a memory controller during driver training to reduce mismatches by controlling impedances within the system environment. A memory device initializes a bit level voltage on a data net. A driver impedance in a driving element in the controller is modified to yield improvements in timing margins.

Abstract: A method, system and computer program product for partitioning the binary image of a software program, and partially removing code bits to create an encrypted software key, to increase software security. The software program's binary image is partitioned along a random segment length or a byte/nibble segment length, and the code bits removed, and stored, along with their positional data in a software key. The software key is encrypted and is separately distributed from the inoperable binary image to the end user. The encrypted key is stored on a secure remote server. When the end user properly authenticates with the developer's remote servers, the encrypted security key is downloaded from the secure remote server and is locally decrypted. The removed code bits are reinserted into the fractioned binary image utilizing the positional location information. The binary image is then operable to complete execution of the software program.

Abstract: A method, system and computer program product for preventing execution of pirated software. A file is loaded on an end user's computer containing a binary image that is generated by removing one or more code bits from an executable code. A request is sent to a remote server to return a software key required for execution of the executable code from the binary image. The software key is downloaded to the end user's computer on which the binary image is loaded. One or more bits from the software key is inserted into the appropriate location of the binary image to regenerate the executable code. The executable code is enabled for execution on the end user's computer only following the embedding of the one or more bits.

Abstract: A method and structures are provided for implementing customizable dielectric printed circuit card traces. A void is defined near selected signal traces. The void is then filled with a dielectric material having a predefined dielectric property. The dielectric material is selected to alter at least one predefined electrical property of the selected signal traces, such as, coupling, propagation delay and attenuation. In one embodiment, an outer layer of a printed circuit card includes a plurality of signal traces and a mating circuit card layer including a plurality of matching signal traces is attached to the outer layer of the printed circuit card to create a cavity near selected signal traces. The cavity is filled with the selected dielectric material. In another embodiment, dielectric material is selectively removed near signal traces on an outer layer of the printed circuit card to define a void near selected signal traces.

Abstract: A method and structures are provided for implementing customizable dielectric printed circuit card traces. A void is defined near selected signal traces. The void is then filled with a dielectric material having a predefined dielectric property. The dielectric material is selected to alter at least one predefined electrical property of the selected signal traces, such as, coupling, propagation delay and attenuation. In one embodiment, an outer layer of a printed circuit card includes a plurality of signal traces and a mating circuit card layer including a plurality of matching signal traces is attached to the outer layer of the printed circuit card to create a cavity near selected signal traces. The cavity is filled with the selected dielectric material. In another embodiment, dielectric material is selectively removed near signal traces on an outer layer of the printed circuit card to define a void near selected signal traces.