Abstract: A terminal with use with a zero insertion force socket is disclosed which electrically connects a mating connector to a printed circuit board or the like. The terminal has a pin engaging portion which has a pair of contact arms positioned to make electrical engagement with a mating pin. The pin engaging portion has a pair of nonsymmetrical contact arms which are positioned to make electrical engagement with the mating pin. A first contact arm of the pair of contact arms is configured to have a longer electrical path across which signals are transmitted than a second contact arm. The first contact arm also has a reduced cross section compared to the second contact arm, such that the first contact arm is configured to have a matched inductance to the second contact arm. A retention portion extends from the pin engaging portion. Side edges of the retention portion are dimensioned to create a frictional interference with side wall of a cavity of the socket.

Abstract: An electrical connector for terminating flat cable of the type having a plurality of signal and ground conductors in parallel alignment comprises a housing which holds a plurality of signal contacts and a ground bus. Each of the signal contacts has a signal conductor termination slot configured for insulation displacement termination of a respective said signal conductor. The ground bus has a plurality of ground conductor termination slots each configured for insulation displacement termination of a respective said ground conductor, and at least one bypass slot configured to permit at least one of said signal conductors to pass through said ground bus without termination thereto. The signal conductor termination slots, the ground conductor termination slots and the at least one bypass slot are arranged such that the plurality of signal and ground conductors reside in a common plane in the connector after termination thereto.

Abstract: The invention is directed to a dielectric member interposed between two electrical components which have different coefficients of thermal expansion (CTEs). The dielectric member has conductive traces for electrically connecting the electrical components. The traces may be joined by solder balls to a printed circuit board. The dielectric member may include reservoirs for locating the solder balls and receiving solder after reflow of the solder balls. Adhesive layers may be used for bonding the traces to the dielectric member. The dielectric member is made of a material having a selected CTE value which minimizes the CTE mismatch at the electrical interface and effectuates absorption of the thermal expansion and contraction of the system. Stresses induced by thermal expansion and contraction at the electrical interface are thereby reduced, preventing problems such as fractured solder joints.

Abstract: A contact to electrically connect at least one pin of a pin grid array to a printed circuit board is described. The contact comprises a receiving portion having a pair of contact arms, with each contact arm having a curved portion and a straight portion. The contact arms are positioned so that the curved portions form a curved receiving area while the straight portions are substantially parallel to each other to form a contact area. The contact also includes a tail portion having a solder ball receiving portion. The contact further includes a center portion connecting the pin receiving portion to the tail portion.

Abstract: An electrical connector for terminating flat cable of the type having a plurality of signal and ground conductors in parallel alignment comprises a housing which holds a plurality of signal contacts and a ground bus. Each of the signal contacts has a signal conductor termination slot configured for insulation displacement termination of a respective said signal conductor. The ground bus has a plurality of ground conductor termination slots each configured for insulation displacement termination of a respective said ground conductor, and at least one bypass slot configured to permit at least one of said signal conductors to pass through said ground bus without termination thereto. The signal conductor termination slots, the ground conductor termination slots and the at least one bypass slot are arranged such that the plurality of signal and ground conductors reside in a common plane in the connector after termination thereto.

Abstract: An electrical connector for terminating flat cable of the type having a plurality of signal and ground conductors in parallel alignment comprises a housing which holds a plurality of signal contacts and a ground bus. Each of the signal contacts has a signal conductor termination slot configured for insulation displacement termination of a respective said signal conductor. The ground bus has a plurality of ground conductor termination slots each configured for insulation displacement termination of a respective said ground conductor, and at least one bypass slot configured to permit at least one of said signal conductors to pass through said ground bus without termination thereto. The signal conductor termination slots, the ground conductor termination slots and the at least one bypass slot are arranged such that the plurality of signal and ground conductors reside in a common plane in the connector after termination thereto.

Abstract: A circuit is presented which can produce a temperature insensitive, constant current value. The constant current source comprises transistor pairs which mirror a temperature dependent current into a node along with another temperature dependent current. The node thereby receives two temperature dependent currents, wherein one is inversely dependent to that of the other. More specifically, one current increases as temperature increases, whereas the other current decreases as temperature increases. The two currents may thereby be construed to offset one another such that the output of a common node produces a current output which does not change with either an increase or decrease in temperature imputted upon the current source component.

Abstract: A block clock and initialization circuit for a programmable logic block in a complex very high density programmable logic device generates a plurality of block clock signals and block initialization signals for elements in the programmable logic block. The block clock and initialization circuit includes a block clock generator circuit and a block initialization circuit. The block clock generator circuit receives a first set of product terms in a plurality of product terms and a plurality of clock signals as input signals. In response to the input signals, the block clock generator circuit generates output signals on a plurality of block clock lines. The block initialization circuit receives a second set of product terms in the plurality of product terms as input signals. In response to the input signals, the block initialization circuit generates a plurality of output signals on the block initialization lines.

Abstract: A programmable logic device (PLD) is presented having an improved sense amplifier. The sense amplifier comprises a cascode-connected pair of transistors coupled between a sense amplifier output and a virtual ground. According to several embodiments, a clipping transistor and a current-channeling transistor can be provided with the sense amplifier to improve its operation. Further, additional current source and current sink transistors can also be added to the sense amplifier design. The clipping transistor helps ensure that any positive-going noise spikes do not deleteriously effect accurate readings of the true value on the input bit line. The current-channeling transistor helps prevent collapse of the bit line caused by significant conductivity of cells connected to the bit line. The combination of clipping and current-channeling provide a relatively narrow voltage range of the bit line voltage, resulting in fast recovery and high speed sensing thereof.

Abstract: An approximation is made in the equation for the desired vertical profile command signal to control the altitude of a drone traveling towards a target such that simple analog circuitry may be utilized instead of complicated computers.