Patents by Inventor Benjamin L. McClain

Benjamin L. McClain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11705425
    Abstract: A bond tip for thermocompression bonding a bottom surface includes a die contact area and a low surface energy material covering at least a portion of the bottom surface. The low surface energy material may cover substantially all of the bottom surface, or only a peripheral portion surrounding the die contact area. The die contact area may be recessed with respect to the peripheral portion a depth at least as great as a thickness of a semiconductor die to be received in the recessed die contact area. A method of thermocompression bonding is also disclosed.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: July 18, 2023
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Benjamin L. McClain, Brandon P. Wirz, Zhaohui Ma
  • Publication number: 20230197669
    Abstract: A thermocompression bonding (TCB) apparatus can include a wall having a height measured in a first direction and configured to be positioned between a first pressing surface and a second pressing surface of a semiconductor bonding apparatus. The apparatus can include a cavity at least partially surrounded by the wall, the cavity sized to receive a semiconductor substrate and a stack of semiconductor dies positioned between the semiconductor substrate and the first pressing surface, the stack of semiconductor dies and semiconductor substrate having a combined unpressed stack height as measured in the first direction. In some embodiments, the unpressed stack height is greater than the height of the wall, and the wall is configured to be contacted by the first pressing surface to limit movement of the first pressing surface toward the second pressing surface during a semiconductor bonding process.
    Type: Application
    Filed: August 4, 2022
    Publication date: June 22, 2023
    Inventors: Wei Zhou, Bret K. Street, Benjamin L. McClain, Mark E. Tuttle
  • Patent number: 11670612
    Abstract: A semiconductor device assembly that includes a semiconductor device positioned over a substrate with a number of electrical interconnections formed between the semiconductor device and the substrate. The surface of the substrate includes a plurality of discrete solder mask standoffs that extend towards the semiconductor device. A thermal compression bonding process is used to melt solder to form the electrical interconnects, which lowers the semiconductor device to contact and be supported by the plurality of discrete solder mask standoffs. The solder mask standoffs permit the application of a higher pressure during the bonding process than using traditional solder masks. The solder mask standoffs may have various polygonal or non-polygonal shapes and may be positioned in pattern to protect sensitive areas of the semiconductor device and/or the substrate. The solder mask standoffs may be an elongated shape that protects areas of the semiconductor device and/or substrate.
    Type: Grant
    Filed: February 15, 2021
    Date of Patent: June 6, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Brandon P. Wirz, Benjamin L. McClain, Jeremy E. Minnich, Zhaohui Ma
  • Patent number: 11594432
    Abstract: Systems and methods for releasing semiconductor dies during pick and place operations are disclosed. In one embodiment, a system for handling semiconductor dies comprises a support member positioned to carry at least one semiconductor die releasably attached to a support substrate. The system further includes a picking device having a pick head coupleable to a vacuum source and positioned to releasably attach to the semiconductor die at a pick station. The system still further incudes a cooling member coupleable to a cold fluid source and configured to direct a cold fluid supplied by the cold fluid source toward the support substrate at the pick station. The cold fluid cools a die attach region of the substrate where the semiconductor die is attached to the substrate to facilitate removal of the semiconductor die.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: February 28, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Jeremy E. Minnich, Benjamin L. McClain, Travis M. Jensen
  • Patent number: 11410962
    Abstract: A thermocompression bonding (TCB) apparatus can include a wall having a height measured in a first direction and configured to be positioned between a first pressing surface and a second pressing surface of a semiconductor bonding apparatus. The apparatus can include a cavity at least partially surrounded by the wall, the cavity sized to receive a semiconductor substrate and a stack of semiconductor dies positioned between the semiconductor substrate and the first pressing surface, the stack of semiconductor dies and semiconductor substrate having a combined unpressed stack height as measured in the first direction. In some embodiments, the unpressed stack height is greater than the height of the wall, and the wall is configured to be contacted by the first pressing surface to limit movement of the first pressing surface toward the second pressing surface during a semiconductor bonding process.
    Type: Grant
    Filed: November 16, 2020
    Date of Patent: August 9, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Wei Zhou, Bret K. Street, Benjamin L. McClain, Mark E. Tuttle
  • Patent number: 11410963
    Abstract: A thermocompression bonding (TCB) apparatus can include a wall having a height measured in a first direction and configured to be positioned between a first pressing surface and a second pressing surface of a semiconductor bonding apparatus. The apparatus can include a cavity at least partially surrounded by the wall, the cavity sized to receive a semiconductor substrate and a stack of semiconductor dies positioned between the semiconductor substrate and the first pressing surface, the stack of semiconductor dies and semiconductor substrate having a combined unpressed stack height as measured in the first direction. In some embodiments, the unpressed stack height is greater than the height of the wall, and the wall is configured to be contacted by the first pressing surface to limit movement of the first pressing surface toward the second pressing surface during a semiconductor bonding process.
    Type: Grant
    Filed: November 16, 2020
    Date of Patent: August 9, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Wei Zhou, Bret K. Street, Benjamin L. McClain, Mark E. Tuttle
  • Publication number: 20210233887
    Abstract: A bond tip for thermocompression bonding a bottom surface includes a die contact area and a low surface energy material covering at least a portion of the bottom surface. The low surface energy material may cover substantially all of the bottom surface, or only a peripheral portion surrounding the die contact area. The die contact area may be recessed with respect to the peripheral portion a depth at least as great as a thickness of a semiconductor die to be received in the recessed die contact area. A method of thermocompression bonding is also disclosed.
    Type: Application
    Filed: April 15, 2021
    Publication date: July 29, 2021
    Inventors: Benjamin L. McClain, Brandon P. Wirz, Zhaohui Ma
  • Publication number: 20210225672
    Abstract: Systems and methods for releasing semiconductor dies during pick and place operations are disclosed. In one embodiment, a system for handling semiconductor dies comprises a support member positioned to carry at least one semiconductor die releasably attached to a support substrate. The system further includes a picking device having a pick head coupleable to a vacuum source and positioned to releasably attach to the semiconductor die at a pick station. The system still further incudes a cooling member coupleable to a cold fluid source and configured to direct a cold fluid supplied by the cold fluid source toward the support substrate at the pick station. The cold fluid cools a die attach region of the substrate where the semiconductor die is attached to the substrate to facilitate removal of the semiconductor die.
    Type: Application
    Filed: April 9, 2021
    Publication date: July 22, 2021
    Inventors: Jeremy E. Minnich, Benjamin L. McClain, Travis M. Jensen
  • Publication number: 20210193606
    Abstract: A semiconductor device assembly is provided. The assembly includes a first package element and a second package element disposed over the first package element. The assembly further includes a plurality of die support structures between the first and second package elements, wherein each of the plurality of die support structures has a first height, a lower portion surface-mounted to the first package element and an upper portion in contact with the second package element. The assembly further includes a plurality of interconnects between the first and second package elements, wherein each of the plurality of interconnects includes a conductive pillar having a second height, a conductive pad, and a bond material with a solder joint thickness between the conductive pillar and the conductive pad. The first height is about equal to a sum of the solder joint thickness and the second height.
    Type: Application
    Filed: March 10, 2021
    Publication date: June 24, 2021
    Inventors: Brandon P. Wirz, Benjamin L. McClain
  • Publication number: 20210183802
    Abstract: A semiconductor device assembly that includes a semiconductor device positioned over a substrate with a number of electrical interconnections formed between the semiconductor device and the substrate. The surface of the substrate includes a plurality of discrete solder mask standoffs that extend towards the semiconductor device. A thermal compression bonding process is used to melt solder to form the electrical interconnects, which lowers the semiconductor device to contact and be supported by the plurality of discrete solder mask standoffs. The solder mask standoffs permit the application of a higher pressure during the bonding process than using traditional solder masks. The solder mask standoffs may have various polygonal or non-polygonal shapes and may be positioned in pattern to protect sensitive areas of the semiconductor device and/or the substrate. The solder mask standoffs may be an elongated shape that protects areas of the semiconductor device and/or substrate.
    Type: Application
    Filed: February 15, 2021
    Publication date: June 17, 2021
    Inventors: BRANDON P. WIRZ, BENJAMIN L. MCCLAIN, JEREMY E. MINNICH, ZHAOHUI MA
  • Patent number: 11024595
    Abstract: A bond tip for thermocompression bonding a bottom surface includes a die contact area and a low surface energy material covering at least a portion of the bottom surface. The low surface energy material may cover substantially all of the bottom surface, or only a peripheral portion surrounding the die contact area. The die contact area may be recessed with respect to the peripheral portion a depth at least as great as a thickness of a semiconductor die to be received in the recessed die contact area. A method of thermocompression bonding is also disclosed.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: June 1, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Benjamin L. McClain, Brandon P. Wirz, Zhaohui Ma
  • Patent number: 10998208
    Abstract: Systems and methods for releasing semiconductor dies during pick and place operations are disclosed. In one embodiment, a system for handling semiconductor dies comprises a support member positioned to carry at least one semiconductor die releasably attached to a support substrate. The system further includes a picking device having a pick head coupleable to a vacuum source and positioned to releasably attach to the semiconductor die at a pick station. The system still further includes a cooling member coupleable to a cold fluid source and configured to direct a cold fluid supplied by the cold fluid source toward the support substrate at the pick station. The cold fluid cools a die attach region of the substrate where the semiconductor die is attached to the substrate to facilitate removal of the semiconductor die.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: May 4, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Jeremy E. Minnich, Benjamin L. McClain, Travis M. Jensen
  • Publication number: 20210111132
    Abstract: A semiconductor device, semiconductor device assembly, and method of forming a semiconductor device assembly that includes moisture impermeable layer. The assembly includes a first substrate and a second substrate electrically connected to a surface of the first substrate. The assembly includes a layer between the two substrates with the moisture impermeable layer between the layer and the surface of the first substrate. The layer may be non-conductive film, die attach film, capillary underfill, or the like. A portion of the surface of the first substrate may include a solder mask between the moisture impermeable layer and the first substrate. The moisture impermeable layer prevents, or at least inhibits, moisture within the first substrate from potentially creating voids in the layer. The moisture impermeably layer may be a polyimide, a polyimide-like material, an epoxy, an epoxy-acrylate, parylene, vinyltriethoxysilane, or combination thereof.
    Type: Application
    Filed: December 22, 2020
    Publication date: April 15, 2021
    Inventors: BRANDON P. WIRZ, BENJAMIN L. MCCLAIN, JEREMY E. MINNICH
  • Publication number: 20210091037
    Abstract: A thermocompression bonding (TCB) apparatus can include a wall having a height measured in a first direction and configured to be positioned between a first pressing surface and a second pressing surface of a semiconductor bonding apparatus. The apparatus can include a cavity at least partially surrounded by the wall, the cavity sized to receive a semiconductor substrate and a stack of semiconductor dies positioned between the semiconductor substrate and the first pressing surface, the stack of semiconductor dies and semiconductor substrate having a combined unpressed stack height as measured in the first direction. In some embodiments, the unpressed stack height is greater than the height of the wall, and the wall is configured to be contacted by the first pressing surface to limit movement of the first pressing surface toward the second pressing surface during a semiconductor bonding process.
    Type: Application
    Filed: November 16, 2020
    Publication date: March 25, 2021
    Inventors: Wei Zhou, Bret K. Street, Benjamin L. McClain, Mark E. Tuttle
  • Patent number: 10952333
    Abstract: Semiconductor devices, semiconductor device assemblies, and methods of making such semiconductor devices and semiconductor device assemblies. Material may be removed from a semiconductor device having a first thickness to obtain a second thickness and a carrier may be attached to the semiconductor device having a third thickness with the third thickness plus the second thickness substantially equaling the first thickness. The carrier has a coefficient of thermal expansion (CTE) that differs from the CTE of the semiconductor device. The addition of the carrier to the semiconductor device may change the overall warpage or CTE of a semiconductor device assembly. The semiconductor device assembly be include a redistribution layer between the semiconductor device and a substrate. A material may encapsulate the carrier and the semiconductor device. The carrier may provide electromagnetic shielding.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: March 16, 2021
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Benjamin L. McClain, Xiao Li
  • Patent number: 10950568
    Abstract: A semiconductor device assembly is provided. The assembly includes a first package element and a second package element disposed over the first package element. The assembly further includes a plurality of die support structures between the first and second package elements, wherein each of the plurality of die support structures has a first height, a lower portion surface-mounted to the first package element and an upper portion in contact with the second package element. The assembly further includes a plurality of interconnects between the first and second package elements, wherein each of the plurality of interconnects includes a conductive pillar having a second height, a conductive pad, and a bond material with a solder joint thickness between the conductive pillar and the conductive pad. The first height is about equal to a sum of the solder joint thickness and the second height.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: March 16, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Brandon P. Wirz, Benjamin L. McClain
  • Publication number: 20210074671
    Abstract: A thermocompression bonding (TCB) apparatus can include a wall having a height measured in a first direction and configured to be positioned between a first pressing surface and a second pressing surface of a semiconductor bonding apparatus. The apparatus can include a cavity at least partially surrounded by the wall, the cavity sized to receive a semiconductor substrate and a stack of semiconductor dies positioned between the semiconductor substrate and the first pressing surface, the stack of semiconductor dies and semiconductor substrate having a combined unpressed stack height as measured in the first direction. In some embodiments, the unpressed stack height is greater than the height of the wall, and the wall is configured to be contacted by the first pressing surface to limit movement of the first pressing surface toward the second pressing surface during a semiconductor bonding process.
    Type: Application
    Filed: November 16, 2020
    Publication date: March 11, 2021
    Inventors: Wei Zhou, Bret K. Street, Benjamin L. McClain, Mark E. Tuttle
  • Patent number: 10879195
    Abstract: A semiconductor device, semiconductor device assembly, and method of forming a semiconductor device assembly that includes moisture impermeable layer. The assembly includes a first substrate and a second substrate electrically connected to a surface of the first substrate. The assembly includes a layer between the two substrates with the moisture impermeable layer between the layer and the surface of the first substrate. The layer may be non-conductive film, die attach film, capillary underfill, or the like. A portion of the surface of the first substrate may include a solder mask between the moisture impermeable layer and the first substrate. The moisture impermeable layer prevents, or at least inhibits, moisture within the first substrate from potentially creating voids in the layer. The moisture impermeably layer may be a polyimide, a polyimide-like material, an epoxy, an epoxy-acrylate, parylene, vinyltriethoxysilane, or combination thereof.
    Type: Grant
    Filed: February 15, 2018
    Date of Patent: December 29, 2020
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Brandon P. Wirz, Benjamin L. McClain, Jeremy E. Minnich
  • Patent number: 10840210
    Abstract: A thermocompression bonding (TCB) apparatus can include a wall having a height measured in a first direction and configured to be positioned between a first pressing surface and a second pressing surface of a semiconductor bonding apparatus. The apparatus can include a cavity at least partially surrounded by the wall, the cavity sized to receive a semiconductor substrate and a stack of semiconductor dies positioned between the semiconductor substrate and the first pressing surface, the stack of semiconductor dies and semiconductor substrate having a combined unpressed stack height as measured in the first direction. In some embodiments, the unpressed stack height is greater than the height of the wall, and the wall is configured to be contacted by the first pressing surface to limit movement of the first pressing surface toward the second pressing surface during a semiconductor bonding process.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: November 17, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Wei Zhou, Bret K. Street, Benjamin L. McClain, Mark E. Tuttle
  • Patent number: 10840209
    Abstract: A thermocompression bonding (TCB) apparatus can include a wall having a height measured in a first direction and configured to be positioned between a first pressing surface and a second pressing surface of a semiconductor bonding apparatus. The apparatus can include a cavity at least partially surrounded by the wall, the cavity sized to receive a semiconductor substrate and a stack of semiconductor dies positioned between the semiconductor substrate and the first pressing surface, the stack of semiconductor dies and semiconductor substrate having a combined unpressed stack height as measured in the first direction. In some embodiments, the unpressed stack height is greater than the height of the wall, and the wall is configured to be contacted by the first pressing surface to limit movement of the first pressing surface toward the second pressing surface during a semiconductor bonding process.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: November 17, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Wei Zhou, Bret K. Street, Benjamin L. McClain, Mark E. Tuttle