Patents by Inventor Benjamin L. McClain

Benjamin L. McClain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200212000
    Abstract: A thermocompression bonding (TCB) apparatus can include a wall having a height measured in a first direction and configured to be positioned between a first pressing surface and a second pressing surface of a semiconductor bonding apparatus. The apparatus can include a cavity at least partially surrounded by the wall, the cavity sized to receive a semiconductor substrate and a stack of semiconductor dies positioned between the semiconductor substrate and the first pressing surface, the stack of semiconductor dies and semiconductor substrate having a combined unpressed stack height as measured in the first direction. In some embodiments, the unpressed stack height is greater than the height of the wall, and the wall is configured to be contacted by the first pressing surface to limit movement of the first pressing surface toward the second pressing surface during a semiconductor bonding process.
    Type: Application
    Filed: December 28, 2018
    Publication date: July 2, 2020
    Inventors: Wei Zhou, Bret K. Street, Benjamin L. McClain, Mark E. Tuttle
  • Publication number: 20200211999
    Abstract: A thermocompression bonding (TCB) apparatus can include a wall having a height measured in a first direction and configured to be positioned between a first pressing surface and a second pressing surface of a semiconductor bonding apparatus. The apparatus can include a cavity at least partially surrounded by the wall, the cavity sized to receive a semiconductor substrate and a stack of semiconductor dies positioned between the semiconductor substrate and the first pressing surface, the stack of semiconductor dies and semiconductor substrate having a combined unpressed stack height as measured in the first direction. In some embodiments, the unpressed stack height is greater than the height of the wall, and the wall is configured to be contacted by the first pressing surface to limit movement of the first pressing surface toward the second pressing surface during a semiconductor bonding process.
    Type: Application
    Filed: December 28, 2018
    Publication date: July 2, 2020
    Inventors: Wei Zhou, Bret K. Street, Benjamin L. McClain, Mark E. Tuttle
  • Patent number: 10700038
    Abstract: Methods and systems for inhibiting bonding materials from entering a vacuum system of a semiconductor processing tool are disclosed herein. A semiconductor processing tool configured in accordance with a particular embodiment includes a bondhead having a first port, a second port, a first channel fluidly coupled to the first port, and a second channel fluidly coupled to the second port. The first port and first channel together comprise a first opening extending through the bondhead, and the second port and second channel together comprise a second opening extending through the bondhead. The second opening at least partially surrounds the first opening. A first flow unit is coupled to the first port and is configured to withdraw air from the first opening. A second flow unit is coupled to the second port and is configured to provide fluid to or withdraw fluid from the second opening.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: June 30, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Benjamin L. McClain, Jeremy E. Minnich
  • Publication number: 20200113067
    Abstract: Semiconductor devices, semiconductor device assemblies, and methods of making such semiconductor devices and semiconductor device assemblies. Material may be removed from a semiconductor device having a first thickness to obtain a second thickness and a carrier may be attached to the semiconductor device having a third thickness with the third thickness plus the second thickness substantially equaling the first thickness. The carrier has a coefficient of thermal expansion (CTE) that differs from the CTE of the semiconductor device. The addition of the carrier to the semiconductor device may change the overall warpage or CTE of a semiconductor device assembly. The semiconductor device assembly be include a redistribution layer between the semiconductor device and a substrate. A material may encapsulate the carrier and the semiconductor device. The carrier may provide electromagnetic shielding.
    Type: Application
    Filed: December 9, 2019
    Publication date: April 9, 2020
    Inventors: Benjamin L. McClain, Xiao Li
  • Patent number: 10548230
    Abstract: Semiconductor devices, semiconductor device assemblies, and methods of making such semiconductor devices and semiconductor device assemblies. Material may be removed from a semiconductor device having a first thickness to obtain a second thickness and a carrier may be attached to the semiconductor device having a third thickness with the third thickness plus the second thickness substantially equaling the first thickness. The carrier has a coefficient of thermal expansion (CTE) that differs from the CTE of the semiconductor device. The addition of the carrier to the semiconductor device may change the overall warpage or CTE of a semiconductor device assembly. The semiconductor device assembly be include a redistribution layer between the semiconductor device and a substrate. A material may encapsulate the carrier and the semiconductor device. The carrier may provide electromagnetic shielding.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: January 28, 2020
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Benjamin L. McClain, Xiao Li
  • Publication number: 20190326142
    Abstract: Systems and methods for releasing semiconductor dies during pick and place operations are disclosed. In one embodiment, a system for handling semiconductor dies comprises a support member positioned to carry at least one semiconductor die releasably attached to a support substrate. The system further includes a picking device having a pick head coupleable to a vacuum source and positioned to releasably attach to the semiconductor die at a pick station. The system still further includes a cooling member coupleable to a cold fluid source and configured to direct a cold fluid supplied by the cold fluid source toward the support substrate at the pick station. The cold fluid cools a die attach region of the substrate where the semiconductor die is attached to the substrate to facilitate removal of the semiconductor die.
    Type: Application
    Filed: July 2, 2019
    Publication date: October 24, 2019
    Inventors: Jeremy E. Minnich, Benjamin L. McClain, Travis M. Jensen
  • Patent number: 10410891
    Abstract: Systems and methods for releasing semiconductor dies during pick and place operations are disclosed. In one embodiment, a system for handling semiconductor dies comprises a support member positioned to carry at least one semiconductor die releasably attached to a support substrate. The system further includes a picking device having a pick head coupleable to a vacuum source and positioned to releasably attach to the semiconductor die at a pick station. The system still further includes a cooling member coupleable to a cold fluid source and configured to direct a cold fluid supplied by the cold fluid source toward the support substrate at the pick station. The cold fluid cools a die attach region of the substrate where the semiconductor die is attached to the substrate to facilitate removal of the semiconductor die.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: September 10, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Jeremy E. Minnich, Benjamin L. McClain, Travis M. Jensen
  • Publication number: 20190252330
    Abstract: A semiconductor device, semiconductor device assembly, and method of forming a semiconductor device assembly that includes moisture impermeable layer. The assembly includes a first substrate and a second substrate electrically connected to a surface of the first substrate. The assembly includes a layer between the two substrates with the moisture impermeable layer between the layer and the surface of the first substrate. The layer may be non-conductive film, die attach film, capillary underfill, or the like. A portion of the surface of the first substrate may include a solder mask between the moisture impermeable layer and the first substrate. The moisture impermeable layer prevents, or at least inhibits, moisture within the first substrate from potentially creating voids in the layer. The moisture impermeably layer may be a polyimide, a polyimide-like material, an epoxy, an epoxy-acrylate, parylene, vinyltriethoxysilane, or combination thereof.
    Type: Application
    Filed: February 15, 2018
    Publication date: August 15, 2019
    Inventors: BRANDON P. WIRZ, BENJAMIN L. MCCLAIN, JEREMY E. MINNICH
  • Publication number: 20190208647
    Abstract: Semiconductor devices, semiconductor device assemblies, and methods of making such semiconductor devices and semiconductor device assemblies. Material may be removed from a semiconductor device having a first thickness to obtain a second thickness and a carrier may be attached to the semiconductor device having a third thickness with the third thickness plus the second thickness substantially equaling the first thickness. The carrier has a coefficient of thermal expansion (CTE) that differs from the CTE of the semiconductor device. The addition of the carrier to the semiconductor device may change the overall warpage or CTE of a semiconductor device assembly. The semiconductor device assembly be include a redistribution layer between the semiconductor device and a substrate. A material may encapsulate the carrier and the semiconductor device. The carrier may provide electromagnetic shielding.
    Type: Application
    Filed: January 4, 2018
    Publication date: July 4, 2019
    Inventors: Benjamin L. McClain, Xiao Li
  • Publication number: 20190131272
    Abstract: A semiconductor device, semiconductor device assembly, and method of forming a semiconductor device assembly that includes a barrier on a pillar. The semiconductor device assembly includes a semiconductor device disposed over another semiconductor device. At least one pillar extends from one semiconductor device towards a pad on the other semiconductor device. The barrier on the exterior of the pillar may be a standoff to control a bond line between the semiconductor devices. The barrier may reduce solder bridging and may prevent reliability and electromigration issues that can result from the IMC formation between the solder and copper portions of a pillar. The barrier may help align the pillar with a pad when forming a semiconductor device assembly and may reduce misalignment due to lateral movement of the semiconductor devices. Windows or slots in the barrier may permit the expansion of solder in predetermined directions while preventing bridging in other directions.
    Type: Application
    Filed: October 30, 2017
    Publication date: May 2, 2019
    Inventors: Brandon P. Wirz, Benjamin L. McClain, C. Alexander Ernst, Jeremy E. Minnich
  • Patent number: 10276539
    Abstract: A semiconductor device, semiconductor device assembly, and method of forming a semiconductor device assembly that includes a barrier on a pillar. The semiconductor device assembly includes a semiconductor device disposed over another semiconductor device. At least one pillar extends from one semiconductor device towards a pad on the other semiconductor device. The barrier on the exterior of the pillar may be a standoff to control a bond line between the semiconductor devices. The barrier may reduce solder bridging and may prevent reliability and electromigration issues that can result from the IMC formation between the solder and copper portions of a pillar. The barrier may help align the pillar with a pad when forming a semiconductor device assembly and may reduce misalignment due to lateral movement of the semiconductor devices. Windows or slots in the barrier may permit the expansion of solder in predetermined directions while preventing bridging in other directions.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: April 30, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Brandon P. Wirz, Benjamin L. McClain, C. Alexander Ernst, Jeremy E. Minnich
  • Publication number: 20190067053
    Abstract: Systems and methods for releasing semiconductor dies during pick and place operations are disclosed. In one embodiment, a system for handling semiconductor dies comprises a support member positioned to carry at least one semiconductor die releasably attached to a support substrate. The system further includes a picking device having a pick head coupleable to a vacuum source and positioned to releasably attach to the semiconductor die at a pick station. The system still further includes a cooling member coupleable to a cold fluid source and configured to direct a cold fluid supplied by the cold fluid source toward the support substrate at the pick station. The cold fluid cools a die attach region of the substrate where the semiconductor die is attached to the substrate to facilitate removal of the semiconductor die.
    Type: Application
    Filed: June 27, 2018
    Publication date: February 28, 2019
    Inventors: Jeremy E. Minnich, Benjamin L. McClain, Travis M. Jensen
  • Publication number: 20190067232
    Abstract: A semiconductor device assembly that includes a semiconductor device positioned over a substrate with a number of electrical interconnections formed between the semiconductor device and the substrate. The surface of the substrate includes a plurality of discrete solder mask standoffs that extend towards the semiconductor device. A thermal compression bonding process is used to melt solder to form the electrical interconnects, which lowers the semiconductor device to contact and be supported by the plurality of discrete solder mask standoffs. The solder mask standoffs permit the application of a higher pressure during the bonding process than using traditional solder masks. The solder mask standoffs may have various polygonal or non-polygonal shapes and may be positioned in pattern to protect sensitive areas of the semiconductor device and/or the substrate. The solder mask standoffs may be an elongated shape that protects areas of the semiconductor device and/or substrate.
    Type: Application
    Filed: August 31, 2017
    Publication date: February 28, 2019
    Inventors: BRANDON P. WIRZ, BENJAMIN L. MCCLAIN, JEREMY E. MINNICH, ZHAOHUI MA
  • Publication number: 20190067238
    Abstract: Methods and systems for inhibiting bonding materials from entering a vacuum system of a semiconductor processing tool are disclosed herein. A semiconductor processing tool configured in accordance with a particular embodiment includes a bondhead having a first port, a second port, a first channel fluidly coupled to the first port, and a second channel fluidly coupled to the second port. The first port and first channel together comprise a first opening extending through the bondhead, and the second port and second channel together comprise a second opening extending through the bondhead. The second opening at least partially surrounds the first opening. A first flow unit is coupled to the first port and is configured to withdraw air from the first opening. A second flow unit is coupled to the second port and is configured to provide fluid to or withdraw fluid from the second opening.
    Type: Application
    Filed: August 25, 2017
    Publication date: February 28, 2019
    Inventors: Benjamin L. McClain, Jeremy E. Minnich
  • Publication number: 20180366434
    Abstract: A bond tip for thermocompression bonding a bottom surface includes a die contact area and a low surface energy material covering at least a portion of the bottom surface. The low surface energy material may cover substantially all of the bottom surface, or only a peripheral portion surrounding the die contact area. The die contact area may be recessed with respect to the peripheral portion a depth at least as great as a thickness of a semiconductor die to be received in the recessed die contact area. A method of thermocompression bonding is also disclosed.
    Type: Application
    Filed: June 16, 2017
    Publication date: December 20, 2018
    Inventors: Benjamin L. McClain, Brandon P. Wirz, Zhaohui Ma
  • Publication number: 20180342476
    Abstract: A semiconductor device assembly is provided. The assembly includes a first package element and a second package element disposed over the first package element. The assembly further includes a plurality of die support structures between the first and second package elements, wherein each of the plurality of die support structures has a first height, a lower portion surface-mounted to the first package element and an upper portion in contact with the second package element. The assembly further includes a plurality of interconnects between the first and second package elements, wherein each of the plurality of interconnects includes a conductive pillar having a second height, a conductive pad, and a bond material with a solder joint thickness between the conductive pillar and the conductive pad. The first height is about equal to a sum of the solder joint thickness and the second height.
    Type: Application
    Filed: May 23, 2017
    Publication date: November 29, 2018
    Inventors: Brandon P. Wirz, Benjamin L. McClain
  • Patent number: 10090177
    Abstract: Systems and methods for releasing semiconductor dies during pick and place operations are disclosed. In one embodiment, a system for handling semiconductor dies comprises a support member positioned to carry at least one semiconductor die releasably attached to a support substrate. The system further includes a picking device having a pick head coupleable to a vacuum source and positioned to releasably attach to the semiconductor die at a pick station. The system still further includes a cooling member coupleable to a cold fluid source and configured to direct a cold fluid supplied by the cold fluid source toward the support substrate at the pick station. The cold fluid cools a die attach region of the substrate where the semiconductor die is attached to the substrate to facilitate removal of the semiconductor die.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: October 2, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Jeremy E. Minnich, Benjamin L. McClain, Travis M. Jensen