Abstract: In one embodiment, a sequencing system includes a plurality of integrated circuits connected in a daisy chain arrangement, where each integrated circuit has an LED load connection. The system includes a diagnostic circuit which signals to the control unit that an open circuit condition has been detected, thereby turning off all LED loads.

Abstract: In one embodiment, a sequencing system includes a plurality of integrated circuits connected in a daisy chain arrangement, where each integrated circuit has an LED load connection. The system includes a diagnostic circuit which signals to the control unit that an open circuit condition has been detected, thereby turning off all LED loads.

Abstract: A control circuit for a switching regulator includes a clock circuit, a pulsewidth modulation (PWM) circuit, and a reduction monitor. The clock circuit provides a clock signal at a variable frequency. The PWM circuit produces a drive signal of at least a first predetermined duration once every period of the clock signal. The reduction monitor controls the clock circuit to reduce the variable frequency in response to a sense signal that indicates that at least one of a voltage and a current is outside a limit during the first predetermined duration of said drive signal.

Abstract: A method for mitigating aliasing effects in a single phase power converter and mitigating aliasing effects and inhibiting thermal run-away in a multi-phase power converter at varying load transition rates. A single phase or multi-phase power converter having an on-time is provided and the frequency of the power converter is adjusted so that a load step period and the on time of the single phase power converter are in a temporal relationship. Alternatively, a load step rate is inhibited from locking onto a phase current of the single phase power converter by suspending an oscillator signal. In accordance with another alternative, a load step rate is inhibited from locking onto a phase current of the single phase power converter by suspending an oscillator signal and dithering an input signal to the oscillator.

Abstract: A control circuit for a switching regulator includes a clock circuit, a pulsewidth modulation (PWM) circuit, and a reduction monitor. The clock circuit provides a clock signal at a variable frequency. The PWM circuit produces a drive signal of at least a first predetermined duration once every period of the clock signal. The reduction monitor controls the clock circuit to reduce the variable frequency in response to a sense signal that indicates that at least one of a voltage and a current is outside a limit during the first predetermined duration of said drive signal.

Abstract: A device and method for regulating the output of a power circuit is provided, which in one embodiment includes a pulsewidth modulation (PWM) circuit that produces pulses each having a period of at least a minimum duration, a comparator circuit that produces a control signal, a timer initiated at the output of each pulse and operable to expire no later than expiration of twice the minimum pulsewidth duration, and wherein the PWM circuit is operable to reduce the frequency of outputted pulses in response to receiving the control signal having a first state at expiration of the first timer initiated at the output of a first pulse.

Abstract: A device and method for regulating the output of a power circuit is provided, which in one embodiment includes a pulsewidth modulation (PWM) circuit that produces pulses each having a period of at least a minimum duration, a comparator circuit that produces a control signal, a timer initiated at the output of each pulse and operable to expire no later than expiration of twice the minimum pulsewidth duration, and wherein the PWM circuit is operable to reduce the frequency of outputted pulses in response to receiving the control signal having a first state at expiration of the first timer initiated at the output of a first pulse.

Abstract: A method for method for inhibiting thermal run-away in a multi-phase power converter at varying load transition rates. A multi-phase power converter having an on-time is provided and the frequency of the multi-phase power converter is adjusted so that a load step period and the on time of the multi-phase power converter are in a temporal relationship. Alternatively, a load step rate is inhibited from locking onto a phase current of the multi-phase power converter by suspending an oscillator signal. In accordance with another alternative, a load step rate is inhibited from locking onto a phase current of the multi-phase power converter by suspending an oscillator signal and dithering an input signal to the oscillator.

Abstract: A method for mitigating aliasing effects in a single phase power converter and mitigating aliasing effects and inhibiting thermal run-away in a multi-phase power converter at varying load transition rates. A single phase or multi-phase power converter having an on-time is provided and the frequency of the power converter is adjusted so that a load step period and the on time of the single phase power converter are in a temporal relationship. Alternatively, a load step rate is inhibited from locking onto a phase current of the single phase power converter by suspending an oscillator signal. In accordance with another alternative, a load step rate is inhibited from locking onto a phase current of the single phase power converter by suspending an oscillator signal and dithering an input signal to the oscillator.

Abstract: A method for method for inhibiting thermal run-away in a multi-phase power converter at varying load transition rates. A multi-phase power converter having an on-time is provided and the frequency of the multi-phase power converter is adjusted so that a load step period and the on time of the multi-phase power converter are in a temporal relationship. Alternatively, a load step rate is inhibited from locking onto a phase current of the multi-phase power converter by suspending an oscillator signal. In accordance with another alternative, a load step rate is inhibited from locking onto a phase current of the multi-phase power converter by suspending an oscillator signal and dithering an input signal to the oscillator.

Abstract: In one embodiment, an error amplifier of a power supply controller is configured to receive a current sense signal prior to the current sense signal undergoing amplification.

Abstract: In one embodiment, a power supply controller is configured to use a plurality of ramp signals to generate a plurality of PWM control signals.

Abstract: In one embodiment, an error amplifier of a power supply controller is configured to receive a current sense signal prior to the current sense signal undergoing amplification.

Abstract: A method for method for inhibiting thermal run-away in a multi-phase power converter at varying load transition rates. A multi-phase power converter having an on-time is provided and the frequency of the multi-phase power converter is adjusted so that a load step period and the on time of the multi-phase power converter are in a temporal relationship. Alternatively, a load step rate is inhibited from locking onto a phase current of the multi-phase power converter by suspending an oscillator signal. In accordance with another alternative, a load step rate is inhibited from locking onto a phase current of the multi-phase power converter by suspending an oscillator signal and dithering an input signal to the oscillator.

Abstract: In one embodiment, a multiphase power control system uses two control lines from a PWM section to control the switch controllers of the system. The two control signals contain power control information in addition to timing information. The switch controller uses the two control signals to facilitate enabling and disabling a power switch of the multiphase power control system.

Abstract: In one embodiment, a power supply controller has a plurality of PWM control channels. The PWM control signals of the PWM control channels are selectively alternated among the outputs of the power supply controller.

Abstract: In one embodiment, an error amplifier of a power supply controller forms differential error signals that are used to set an active and inactive state of a power switch.

Abstract: A method of forming a power device (10) includes forming a power transistor (27) and a pull-down transistor (28) on a semiconductor die (36). The pull-down transistor (28) is enabled to rapidly and predictably disable the power transistor (27). The pull-down transistor (28) remains enabled for a first time period during the enabling of the power transistor (27) to facilitate rapidly and predictably enabling the power transistor (27).

Abstract: A method of forming a power supply timing controller circuit (10, 80, 90) includes forming a bi-directional synchronization oscillator controller (11, 81, 91) to oscillate at an internal frequency. The bi-directional synchronization oscillator controller (11, 81, 91) receives an external sync signal, suspends the oscillation, begins operating at the forced frequency of the external sync signal, and begins a delay period. If another external sync signal is not received before the end of the delay period, the controller resets and once again begins oscillating at the internal frequency.

Abstract: A method of forming a power device (10) includes forming a power transistor (27) and a pull-down transistor (28) on a semiconductor die (36). The pull-down transistor (28) is enabled to rapidly and predictably disable the power transistor (27). The pull-down transistor (28) remains enabled for a first time period during the enabling of the power transistor (27) to facilitate rapidly and predictably enabling the power transistor (27).