Abstract: A table searching system for facilitating high speed linear searching of a table of information by a plurality of searching agents is provided. The system includes: a memory unit for storing a table of information including a plurality of data entries each having data contents; a plurality of searching agents each being communicatively coupled with the memory unit, and having a port for receiving an associated search key value; and a memory controller unit providing a centralized interface between the memory unit and each of the agents, the controller unit being operative to control the memory unit to provide the contents of a current one of the table entries to each of the agents during each of a plurality of cycles of operation. Each of the searching agents is operative to determine an associated best matching one of the data entries based on comparisons between the associated key value and the contents of the data entries provided by the memory unit.

Abstract: A method and apparatus is disclosed herein for wireless communication with adaptive beamforming. In one embodiment, the apparatus comprises a processor, a radio frequency (RF) transmitter having a digitally controlled phased array antenna coupled to and controlled by the processor to transmit content using adaptive beamforming, and an interface to a wireless communication channel coupled to the processor to communicate antenna information relating to the use of the phased array antenna and to communicate information to facilitate playing the content at another location.

Abstract: A table searching system for facilitating high speed linear searching of a table of information by a plurality of searching agents is provided. The system includes: a memory unit for storing a table of information including a plurality of data entries each having data contents; a plurality of searching agents each being communicatively coupled with the memory unit, and having a port for receiving an associated search key value; and a memory controller unit providing a centralized interface between the memory unit and each of the agents, the controller unit being operative to control the memory unit to provide the contents of a current one of the table entries to each of the agents during each of a plurality of cycles of operation. Each of the searching agents is operative to determine an associated best matching one of the data entries based on comparisons between the associated key value and the contents of the data entries provided by the memory unit.

Abstract: A shared buffer packet switching device is provided for receiving data packets via associated ones of a plurality of receive ports, and for transmitting data packets via associated selected ones of a plurality of transmit port.

Abstract: A shared buffer packet switching device is provided for receiving data packets via associated ones of a plurality of receive ports, and for transmitting data packets via associated selected ones of a plurality of transmit port.

Abstract: A table searching system for facilitating high speed linear searching of a table of information by a plurality of searching agents is provided. The system includes: a memory unit for storing a table of information including a plurality of data entries each having data contents; a plurality of searching agents each being communicatively coupled with the memory unit, and having a port for receiving an associated search key value; and a memory controller unit providing a centralized interface between the memory unit and each of the agents, the controller unit being operative to control the memory unit to provide the contents of a current one of the table entries to each of the agents during each of a plurality of cycles of operation. Each of the searching agents is operative to determine an associated best matching one of the data entries based on comparisons between the associated key value and the contents of the data entries provided by the memory unit.

Abstract: A table searching system for facilitating high speed linear searching of a table of information by a plurality of searching agents is provided. The system includes: a memory unit for storing a table of information including a plurality of data entries each having data contents; a plurality of searching agents each being communicatively coupled with the memory unit, and having a port for receiving an associated search key value; and a memory controller unit providing a centralized interface between the memory unit and each of the agents, the controller unit being operative to control the memory unit to provide the contents of a current one of the table entries to each of the agents during each of a plurality of cycles of operation. Each of the searching agents is operative to determine an associated best matching one of the data entries based on comparisons between the associated key value and the contents of the data entries provided by the memory unit.

Abstract: The present invention provides a method and a system of packet communication queuing and selective pushout. In the packet communication module, the quasi-longest-queue pointer is set up to point to the quasi-longest queue within the shared buffer to implement selective pushout. When an in-coming packet enters its destination queue, or an out-going packets leaves one of the output queues, the quasi-longest-queue pointer is maintained by comparing the length of the quasi-longest queue and that of the destination or output queue, respectively. The longer one of the current quasi-longest queue and the length-varied queue becomes the new quasi-longest queue.

Abstract: In decoding an received codeword encoded for error correction purposes, a method for computing error locator polynomial and error evaluator polynomial in the key equation solving step is presented whereby the polynomials are generated through a number of intermediate steps that can be implemented with minimal amount of hardware circuitry. The number of intermediate steps requires a corresponding number of cycles to complete the calculation of the polynomials. Depending on the selected (N, K) code, the number of cycles required for the calculation of the polynomials would be within the time required for the calculation of up-stream data. More specifically, an efficient scheduling of a small number of finite-field multipliers (FFM's) without the need of finite-field inverters (FFI's) is disclosed. Using these new methods, an area-efficient architecture that uses only three FFM's and no FFI's is presented to implement a method derived from the inversionless Berlekamp-Massey algorithm.