Abstract: A method for driving a plurality of circuit units to be controlled includes applying a control signal to a control signal connection unit and an activation signal to an activation connection unit. A hold signal is the generated on the in response to the activation signal. This hold signal is combined with the control signal to obtain a modified control signal, which is then made available at an output.

Abstract: The invention relates to a circuit module with high-frequency input/output interfaces, and in particular to a circuit realized on a chip, principally a monolithic integrated circuit having a phase-regulated circuit which is fed by externally applied voltages and an internal operating voltage generated on the basis of a trimmable internal reference voltage. According to the invention, each further internal operating voltage is derived from an individual reference voltage on the basis of an external voltage. An adjusting circuit is provided which adjusts the individual reference voltage using the trimmable internal reference voltage and then freezes it.

Abstract: An integrated memory has a memory cell array, which is subdivided into a plurality of separate segments. A first and a second local word line in different segments together form a common global word line. The global word line is decoded via a row decoder. The first and second local word lines are connected to a column decoder in such a way that they can be decoded individually and segment by segment in a manner dependent on a column address. The memory thus allows fast and current-saving activation of a word line.

Abstract: The data processing device has a processor with a cache memory, a system memory that can be connected to the processor, and a translation unit that can convert an external instruction or a group of external instructions into internal instructions by a translation process. The translation unit is formed by a computing unit assigned to the system memory, for carrying out the translation processes using the system memory.

Abstract: A memory module is described which, externally, has the functionality of DDR SDRAMs and contains two groups of conventional SDRAMs. A conversion device provides for the conversion of clock signals, commands, and data. The conversion device contains a changeover switch, a delay locked loop and buffer memory for addresses and commands and also for the data, which are driven in a suitable manner by the delay locked loop.

Abstract: A measurement probe for detecting electrical signals in an integrated circuit on a semiconductor chip has a lever arm and a probe tip which is configured on the lever arm. The lever arm is made of a highly conductive material that is covered by an extremely thin insulator layer. The probe tip has a window in the insulator layer at the apex point, and the lever arm makes contact through the insulator layer. This measurement probe can be operated in a force mode and in a tunneling mode, in order to move to a measurement point on the integrated circuit with high positioning accuracy, and to detect the electrical signals at this measurement point.

Abstract: A measuring device has a needle-board circuit board carrying a large number of contact-making needles for contacting connecting areas on an IC circuit. The measuring device has lines for feeding test signals at a high clock frequency to the contact-making needles, and for carrying measured signals away from the contact-making needles. The needles have a shank part with a length L2 and a tip part 14 adjacent thereto with a length L1. For optimally transmitting signals in terms of impedance, the lines are formed as dual-transmission conductor tracks, the shank parts of the contact-making needles each contact a section of the conductor tracks, and the overall length of the contact-making needles satisfies: L1+L2<&lgr;/2, where &lgr; is the maximum wavelength of the signal that is transmitted via a respective line.

Abstract: Data in a memory unit are processed with one of a variety of access strategies. Parallel to the execution of a task according to a first access strategy, the time is calculated that would be required for the processing of the task according to a second access strategy. If the second access strategy is faster than the first access strategy, in the future the second access strategy is used for the execution of that task. In this way, a faster data access, adapted to various tasks, is achieved.

Abstract: A monolithically integrable inductor containing a layer sequence of conductive layers and insulating layers that are stacked mutually alternately above one another is described. The conductive layers are configured in such a way that they form a coil-type structure around a central region, in which giant magnetic resistance materials can be provided.