Patents by Inventor Bert Jongbloed
Bert Jongbloed has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250129473Abstract: Methods and apparatuses for deposition of thin films are provided. A deposition reactor is provided comprising: a first station configured to contain a substrate, the first station comprising a first heating element; a second station configured to contain the substrate, the second station comprising a second heating element, wherein the first station is configured to contact the substrate with a first reactant in the first station in substantial isolation from the second station such that a layer of the first reactant is deposited on the substrate, wherein the first heating element is configured to heat the first station to a first station temperature during contacting of the substrate with the first reactant, wherein the second station is configured to contact the substrate with a second reactant in the second station substantially in the absence of the first reactant.Type: ApplicationFiled: November 1, 2024Publication date: April 24, 2025Inventors: Bert Jongbloed, Delphine Longrie, Robin Roelofs, Lucian Jdira, Suvi Haukka, Antti Juhani Niskanen, Jun Kawahara, Yukihiro Mori
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Publication number: 20250079159Abstract: The technology of the present disclosure generally relates to the field of semiconductor devices. More particularly, semiconductor structures, systems, and methods for producing the same, comprising surface-modified silicon layers formed by reacting a deposited silicon layer with a halide reactant. The system comprising one or more reaction chamber constructed and arranged to hold a substrate; a silicon precursor vessel constructed and arranged to contain and evaporate a silicon precursor; a halide reactant vessel constructed and arranged to contain and evaporate a halide reactant; an exhaust source; and a controller; wherein the controller is configured to control the flow of said silicon precursor and said halide reactant into said reaction chamber, thereby forming a surface-modified silicon layer on said substrate.Type: ApplicationFiled: August 26, 2024Publication date: March 6, 2025Inventors: Dieter Pierreux, Steven Van Aerde, Kelly Houben, Bert Jongbloed
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Publication number: 20240420971Abstract: A vertical furnace and a method for processing a plurality of substrates in said vertical furnace is disclosed. Embodiments of the presently described vertical furnace comprise a process chamber, a heating element configured to provide the heat to reach the desired process temperature for the processing of the plurality of substrates. The vertical furnace may further comprise heat distributing member for distributing the heat provided by the heating element. Embodiments of the presently described method comprise processing the plurality of substrates in a vertical furnace described herein.Type: ApplicationFiled: June 12, 2024Publication date: December 19, 2024Inventors: Subir Parui, Kelly Houben, Theodorus Oosterlaken, Herbert Terhorst, Bert Jongbloed
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Publication number: 20240392435Abstract: A chemical vapor deposition furnace for depositing silicon nitride films is disclosed. The furnace includes a process chamber elongated in a substantially vertical direction and a wafer boat for supporting a plurality of wafers in the process chamber. A process gas injector inside the process chamber is provided with vertically spaced gas injection holes to provide gas introduced at a feed end in an interior of the process gas injector to the process chamber. A valve system connected to the feed end of the process gas injector is being constructed and arranged to connect a source of a silicon precursor and a nitrogen precursor to the feed end for depositing silicon nitride layers. The valve system may connect the feed end of the process gas injector to a cleaning gas system to provide a cleaning gas to remove silicon nitride from the process gas injector and/or the process chamber.Type: ApplicationFiled: July 31, 2024Publication date: November 28, 2024Inventors: Dieter Pierreux, Theodorus G.M. Oosterlaken, Herbert Terhorst, Lucian Jdira, Bert Jongbloed
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Publication number: 20240304477Abstract: Aspects of the disclosure relate to a substrate processing system having a controlled environment comprising one or more FOUPs configured to hold one or more substrates, a substrate processing chamber configured to process the substrate(s), a substrate handling and transporting system configured to receive the FOUP(s) and transfer the substrate(s) to and from the substrate processing chamber, an environmental sensor configured to measure one or more environmental parameters of the substrate handling and transporting system, and a controller communicatively coupled to the environmental sensor configured to track one or more positions of the substrate(s) within the substrate handling and transporting system, determine one or more environmental parameters of the substrate handling and transporting system, determine whether the environmental parameter(s) are within threshold limits at the one or more position of the substrate(s), and indicate an alert if the environmental parameter(s) are determined to not be witType: ApplicationFiled: March 5, 2024Publication date: September 12, 2024Inventors: Gido van der Star, Bert Jongbloed
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Patent number: 12077854Abstract: A chemical vapor deposition furnace for depositing silicon nitride films is disclosed. The furnace includes a process chamber elongated in a substantially vertical direction and a wafer boat for supporting a plurality of wafers in the process chamber. A process gas injector inside the process chamber is provided with vertically spaced gas injection holes to provide gas introduced at a feed end in an interior of the process gas injector to the process chamber. A valve system connected to the feed end of the process gas injector is being constructed and arranged to connect a source of a silicon precursor and a nitrogen precursor to the feed end for depositing silicon nitride layers. The valve system may connect the feed end of the process gas injector to a cleaning gas system to provide a cleaning gas to remove silicon nitride from the process gas injector and/or the process chamber.Type: GrantFiled: July 5, 2022Date of Patent: September 3, 2024Assignee: ASM IP Holding B.V.Inventors: Dieter Pierreux, Theodorus G. M. Oosterlaken, Herbert Terhorst, Lucian Jdira, Bert Jongbloed
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Patent number: 12040229Abstract: A method for forming a structure with a hole on a substrate is disclosed. The method may comprise: depositing a first structure on the substrate; etching a first part of the hole in the first structure; depositing a plug fill in the first part of the hole; depositing a second structure on top of the first structure; etching a second part of the hole substantially aligned with the first part of the hole in the second structure; and, etching the plug fill of the first part of the hole and thereby opening up the hole by dry etching. In this way 3-D NAND device may be provided.Type: GrantFiled: November 18, 2022Date of Patent: July 16, 2024Assignee: ASM IP Holding B.V.Inventors: Dieter Pierreux, Steven van Aerde, Bert Jongbloed
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Patent number: 12000042Abstract: A sequential infiltration synthesis apparatus comprising: a reaction chamber constructed and arranged to hold at least a first substrate; a precursor distribution and removal system to provide to and remove from the reaction chamber a vaporized first or second precursor; and, a sequence controller operably connected to the precursor distribution and removal system and comprising a memory provided with a program to execute infiltration of an infiltrateable material provided on the substrate when run on the sequence controller by: activating the precursor distribution and removal system to provide and maintain the first precursor for a first period T1 in the reaction chamber; activating the precursor distribution and removal system to remove a portion of the first precursor from the reaction chamber for a second period T2; and, activating the precursor distribution and removal system to provide and maintain the second precursor for a third period T3 in the reaction chamber.Type: GrantFiled: August 11, 2022Date of Patent: June 4, 2024Assignee: ASM IP Holding B.V.Inventors: Jan Willem Maes, Werner Knaepen, Krzysztof Kamil Kachel, David Kurt De Roest, Bert Jongbloed, Dieter Pierreux
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Publication number: 20240167157Abstract: A gas injector and a semiconductor processing apparatus comprising the gas injector is disclosed. Embodiments of the presently described gas injector comprise an injector tube to inject a process gas to a process chamber of the semiconductor processing apparatus. The gas injector further comprises a cooling fluid conduit constructed and arranged to cool the injector tube.Type: ApplicationFiled: November 14, 2023Publication date: May 23, 2024Inventors: Theodorus G.M. Oosterlaken, Bert Jongbloed, Radko Bankras, Bart Lindeboom
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Patent number: 11990333Abstract: There is provided a method of filling one or more gaps by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant on a first area; introducing a second reactant to the substrate with a second dose, thereby forming no more than about one monolayer by the second reactant on a second area of the surface, wherein the first and the second areas overlap in an overlap area where the first and second reactants react and leave an initially unreacted area where the first and the second areas do not overlap; and, introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant remaining on the initially unreacted area.Type: GrantFiled: June 12, 2023Date of Patent: May 21, 2024Assignee: ASM IP Holding B.V.Inventors: Viljami Pore, Werner Knaepen, Bert Jongbloed, Dieter Pierreux, Gido van Der Star, Toshiya Suzuki
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Publication number: 20240150892Abstract: The current disclosure relates to methods of forming a vanadium nitride-containing layer. The method comprises providing a substrate within a reaction chamber of a reactor and depositing a vanadium nitride-containing layer onto a surface of the substrate, wherein the deposition process comprises providing a vanadium precursor to the reaction chamber and providing a nitrogen precursor to the reaction chamber. The disclosure further relates to structures and devices comprising the vanadium nitride-containing layer.Type: ApplicationFiled: January 5, 2024Publication date: May 9, 2024Inventors: Pia Homm Jara, Werner Knaepen, Dieter Pierreux, Bert Jongbloed, Panagiota Arnou, Ren-Jie Chang, Qi Xie, Giuseppe Alessio Verni, Gido van der Star
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Patent number: 11898243Abstract: Methods of forming a vanadium nitride-containing layer comprise providing a substrate within a reaction chamber of a reactor and depositing a vanadium nitride-containing layer onto a surface of the substrate, wherein the deposition process comprises providing a vanadium precursor to the reaction chamber and providing a nitrogen precursor to the reaction chamber.Type: GrantFiled: December 7, 2020Date of Patent: February 13, 2024Assignee: ASM IP Holding B.V.Inventors: Pia Homm Jara, Werner Knaepen, Dieter Pierreux, Bert Jongbloed, Panagiota Arnou, Ren-Jie Chang, Qi Xie, Giuseppe Alessio Verni, Gido van der Star
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Publication number: 20240044003Abstract: A wafer boat and a method for forming a layer on a plurality of substrates that are provided in the wafer boat is disclosed. Aspects of the presently described wafer boat comprise at least two wafer boat rods, each of which including at least a first set of slots for holding a plurality of substrates. The wafer boat further includes a plurality of plates, whereby at least one slot of the at least first set of slots is provided in between two neighboring plates.Type: ApplicationFiled: July 31, 2023Publication date: February 8, 2024Inventors: Dieter Pierreux, Bert Jongbloed, Didem Ernur
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Patent number: 11887857Abstract: Disclosed are methods and systems for depositing layers comprising vanadium, nitrogen, and element selected from the list consisting of molybdenum, tantalum, niobium, aluminum, and silicon. The layers are deposited onto a surface of a substrate. The deposition process may be a cyclical deposition process. Exemplary structures in which the layers may be incorporated include field effect transistors, VNAND cells, metal-insulator-metal (MIM) structures, and DRAM capacitors.Type: GrantFiled: April 21, 2021Date of Patent: January 30, 2024Assignee: ASM IP Holding B.V.Inventors: Dieter Pierreux, Bert Jongbloed, Qi Xie, Giuseppe Alessio Verni
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Patent number: 11851755Abstract: A sequential infiltration synthesis apparatus comprising: a reaction chamber constructed and arranged to hold at least a first substrate; a precursor distribution and removal system to provide to and remove from the reaction chamber a vaporized first or second precursor; and, a sequence controller operably connected to the precursor distribution and removal system and comprising a memory provided with a program to execute infiltration of an infiltrateable material provided on the substrate when run on the sequence controller by: activating the precursor distribution and removal system to provide and maintain the first precursor for a first period T1 in the reaction chamber; activating the precursor distribution and removal system to remove a portion of the first precursor from the reaction chamber for a second period T2; and, activating the precursor distribution and removal system to provide and maintain the second precursor for a third period T3 in the reaction chamber.Type: GrantFiled: November 19, 2020Date of Patent: December 26, 2023Assignee: ASM IP Holding B.V.Inventors: Jan Willem Maes, Werner Knaepen, Krzysztof Kamil Kachel, David Kurt de Roest, Bert Jongbloed, Dieter Pierreux
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Publication number: 20230360905Abstract: A method for forming a silicon-comprising layer on a substrate may comprise providing the substrate to a process chamber, the process chamber being comprised in a low pressure chemical vapor deposition (LPCVD) furnace. A repetitive deposition cycle is performed. The deposition cycle comprises a first deposition pulse and a second deposition pulse comprising a provision, into the process chamber, of a first precursor and a second precursor, respectively. The deposition cycle further comprises a first purge pulse and a second purge pulse for removing, from the process chamber, a portion of the first precursor and a portion of the second precursor, respectively. The process chamber is maintained, during the deposition cycle, at a process temperature in a range from about 400° C. to about 650° C. and at a first pressure being different from a second pressure, during the first deposition pulse and during the second deposition pulse, respectively.Type: ApplicationFiled: May 4, 2023Publication date: November 9, 2023Inventors: Werner Knaepen, Arjen Klaver, Dieter Pierreux, Bert Jongbloed
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Publication number: 20230335397Abstract: There is provided a method of filling one or more gaps by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant on a first area; introducing a second reactant to the substrate with a second dose, thereby forming no more than about one monolayer by the second reactant on a second area of the surface, wherein the first and the second areas overlap in an overlap area where the first and second reactants react and leave an initially unreacted area where the first and the second areas do not overlap; and, introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant remaining on the initially unreacted area.Type: ApplicationFiled: June 12, 2023Publication date: October 19, 2023Inventors: Viljami Pore, Werner Knaepen, Bert Jongbloed, Dieter Pierreux, Gido van Der Star, Toshiya Suzuki
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Publication number: 20230230833Abstract: A method for forming layers with silicon is disclosed. The layers may be created by positioning a substrate within a processing chamber, heating the substrate to a first temperature between 300 and 500° C. and introducing a first precursor into the processing chamber to deposit a first layer. The substrate may be heated to a second temperature between 400 and 600° C.; and, a second precursor may be introduced into the processing chamber to deposit a second layer. The first and second precursor may comprise silicon atoms and the first precursor may have more silicon atoms per molecule than the second precursor.Type: ApplicationFiled: March 28, 2023Publication date: July 20, 2023Inventors: Dieter Pierreux, Steven van Aerde, Bert Jongbloed, Kelly Houben, Werner Knaepen, Wilco Verweij
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Publication number: 20230223255Abstract: A method and a wafer processing furnace for forming an epitaxial stack on a plurality of substrates is provided. In a preferred embodiment, the method comprises providing the plurality of substrates to a process chamber. A plurality of deposition cycles is executed, thereby forming the epitaxial stack on the plurality of substrates. The epitaxial stack comprises a plurality of epitaxial pairs, wherein the epitaxial pairs each comprises a first epitaxial layer and a second epitaxial layer, the second epitaxial layer being different from the first epitaxial layer. Each deposition cycle comprises a first deposition pulse and a second deposition pulse. The first deposition pulse comprises a provision of a first reaction gas mixture to the process chamber, thereby forming the first epitaxial layer. The second deposition pulse comprises a provision of a second reaction gas mixture to the process chamber, thereby forming the second epitaxial layer.Type: ApplicationFiled: January 11, 2023Publication date: July 13, 2023Inventors: Steven Van Aerde, Wilco Verweij, Bert Jongbloed, Dieter Pierreux, Kelly Houben, Rami Khazaka, Frederick Aryeetey, Peter Westrom, Omar Elleuch, Caleb Miskin
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Publication number: 20230220588Abstract: A method of forming an epitaxial stack on a plurality of substrates is provided. In a preferred embodiment, the method comprises providing a semiconductor processing apparatus. This semiconductor processing apparatus comprises a process chamber and a carousel for stationing a wafer boat before or after processing in the process chamber. The method further comprises loading the wafer boat into the process chamber, the wafer boat comprising the plurality of substrates. The method further comprises processing the plurality of substrates in the process chamber, thereby forming, on the plurality of substrates, the epitaxial stack. This epitaxial stack has a pre-determined thickness. The processing comprises unloading the wafer boat, one or more times, from the process chamber to the carousel until the epitaxial stack reaches the pre-determined thickness.Type: ApplicationFiled: January 11, 2023Publication date: July 13, 2023Inventors: Steven Van Aerde, Wilco Verweij, Dieter Pierreux, Kelly Houben, Bert Jongbloed, Peter Westrom