Abstract: Disclosed herein are related to systems and methods for correcting non-linearity due to duty cycle error. In one aspect, a system includes a mixer configured to up-convert transmission (Tx) data, a coefficient calibrator configured to select a target value of a coefficient based on a measurement of an interference signal due to non-linearity of the mixer, and an interference canceller coupled to the coefficient calibrator and the mixer. In some embodiments, the interference canceller is configured to generate compensated Tx data based on the Tx data and the selected target value of the coefficient and provide the compensated Tx data to the mixer. In some embodiments, the compensated Tx data corrects for the non-linearity of the mixer.

Abstract: Disclosed herein are related to systems and methods for correcting non-linearity due to duty cycle error. In one aspect, a system includes a mixer configured to up-convert transmission (Tx) data, a coefficient calibrator configured to select a target value of a coefficient based on a measurement of an interference signal due to non-linearity of the mixer, and an interference canceller coupled to the coefficient calibrator and the mixer. In some embodiments, the interference canceller is configured to generate compensated Tx data based on the Tx data and the selected target value of the coefficient and provide the compensated Tx data to the mixer. In some embodiments, the compensated Tx data corrects for the non-linearity of the mixer.

Abstract: Disclosed herein are related to systems and methods for selectively disabling current steering circuitries. In one aspect, the system includes a balun including a first inductor and a second inductor, a first current steering circuit coupled to the first inductor, a second current steering circuit coupled to the first inductor, and a controller coupled to the first current steering circuit and the second current steering circuit. In one aspect, the controller is configured to, based on input data having a first state, apply a first signal and a second signal having a first level to the first current steering circuit and a third signal and a fourth signal having the first level to the second current steering circuit to disable a first current through the second inductor, a second current through the first current steering circuit, and a third current through the second current steering circuit.

Abstract: Disclosed herein are related to systems and methods for correcting non-linearity due to duty cycle error. In one aspect, a system includes a mixer configured to up-convert transmission (Tx) data, a coefficient calibrator configured to select a target value of a coefficient based on a measurement of an interference signal due to non-linearity of the mixer, and an interference canceller coupled to the coefficient calibrator and the mixer. In some embodiments, the interference canceller is configured to generate compensated Tx data based on the Tx data and the selected target value of the coefficient and provide the compensated Tx data to the mixer. In some embodiments, the compensated Tx data corrects for the non-linearity of the mixer.

Abstract: Disclosed herein are related to systems and methods for selectively disabling current steering circuitries. In one aspect, the system includes a balun including a first inductor and a second inductor, a first current steering circuit coupled to the first inductor, a second current steering circuit coupled to the first inductor, and a controller coupled to the first current steering circuit and the second current steering circuit. In one aspect, the controller is configured to, based on input data having a first state, apply a first signal and a second signal having a first level to the first current steering circuit and a third signal and a fourth signal having the first level to the second current steering circuit to disable a first current through the second inductor, a second current through the first current steering circuit, and a third current through the second current steering circuit.

Abstract: A system and apparatus is provided to reduce signal routing, area and signal loss in double-pole, double-throw (DPDT) switch implementations in wireless and millimeter-wave front ends. A cyclic staggered arrangement of receivers, transmitters and antenna ports connecting with DPDT switches reduce signal cross-over and allow for compact, low-loss multi-antenna configurations.

Abstract: Systems and methods are provided for millimeter-wave (MMW) communication, the system includes a transceiver chip to generate and to receive signals. An interface is used to communicate the signals between the transceiver chip and one or more active antenna modules. The signals include modulated MMW signals and control signals. The transceiver chip includes baseband circuitry, up and down conversion mixers, and RF front-end circuitry. An active antenna module receives a first modulated MMW signal from the interface for transmission via antennas and to receive a second modulated MMW signal from the antennas for transmission through the interface to the transceiver chip.

Abstract: Systems and methods are provided for millimeter-wave (MMW) communication, the system includes a transceiver chip to generate and to receive signals. An interface is used to communicate the signals between the transceiver chip and one or more active antenna modules. The signals include modulated MMW signals and control signals. The transceiver chip includes baseband circuitry, up and down conversion mixers, and RF front-end circuitry. An active antenna module receives a first modulated MMW signal from the interface for transmission via antennas and to receive a second modulated MMW signal from the antennas for transmission through the interface to the transceiver chip.

Abstract: Systems and methods are provided for millimeter-wave (MMW) communication, the system includes a transceiver chip to generate and to receive signals. An interface is used to communicate the signals between the transceiver chip and one or more active antenna modules. The signals include modulated MMW signals and control signals. The transceiver chip includes baseband circuitry, up and down conversion mixers, and RF front-end circuitry. An active antenna module receives a first modulated MMW signal from the interface for transmission via antennas and to receive a second modulated MMW signal from the antennas for transmission through the interface to the transceiver chip.

Abstract: A bidirectional time-division duplexing transceiver circuit includes a first and a second bidirectional phase-shift circuit, and a bidirectional amplifier circuit including a first amplifier circuit and a second amplifier circuit. The first amplifier circuit and the second amplifier circuit are coupled via double-pole-double-throw (DPDT) switches to radio-frequency (RF) antennas and the first and the second bidirectional phase-shift circuits. The (DPDT) switches enable the first amplifier circuit and the second amplifier circuit to be operable simultaneously as transmit (TX) path amplifiers in a first time slot and as a receive (RX) path amplifiers in a second time slot.

Abstract: A system and apparatus is provided to reduce signal routing, area and signal loss in double-pole, double-throw (DPDT) switch implementations in wireless and millimeter-wave front ends. A cyclic staggered arrangement of receivers, transmitters and antenna ports connecting with DPDT switches reduce signal cross-over and allow for compact, low-loss multi-antenna configurations.

Abstract: A system and apparatus is provided to reduce signal routing, area and signal loss in double-pole, double-throw (DPDT) switch implementations in wireless and millimeter-wave front ends. A staggered arrangement of receivers, transmitters and antenna ports connecting with DPDT switches reduce signal cross-over and allow for compact, low-loss multi-antenna configurations.

Abstract: Systems and methods are provided for millimeter-wave (MMW) communication, the system includes a transceiver chip to generate and to receive signals. An interface is used to communicate the signals between the transceiver chip and one or more active antenna modules. The signals include modulated MMW signals and control signals. The transceiver chip includes baseband circuitry, up and down conversion mixers, and RF front-end circuitry. An active antenna module receives a first modulated MMW signal from the interface for transmission via antennas and to receive a second modulated MMW signal from the antennas for transmission through the interface to the transceiver chip.

Abstract: A bidirectional time-division duplexing transceiver circuit includes a first and a second bidirectional phase-shift circuit, and a bidirectional amplifier circuit including a first amplifier circuit and a second amplifier circuit. The first amplifier circuit and the second amplifier circuit are coupled via double-pole-double-throw (DPDT) switches to radio-frequency (RF) antennas and the first and the second bidirectional phase-shift circuits. The (DPDT) switches enable the first amplifier circuit and the second amplifier circuit to be operable simultaneously as transmit (TX) path amplifiers in a first time slot and as a receive (RX) path amplifiers in a second time slot.

Abstract: A system and apparatus is provided to reduce signal routing, area and signal loss in double-pole, double-throw (DPDT) switch implementations in wireless and millimeter-wave front ends. A staggered arrangement of receivers, transmitters and antenna ports connecting with DPDT switches reduce signal cross-over and allow for compact, low-loss multi-antenna configurations.

Abstract: A TX/RX switch includes a first switching device connectable with a power amplifier and a second switching device connectable with a low noise amplifier. Both the first switching device and the second switching device are operating in an ON state in transmit mode to provide substantial linearity including no significant alternating current signal swing across any two nodes of the first switching device and the second switching device in the ON state.

Abstract: A TX/RX switch includes a first switching device connectable with a power amplifier and a second switching device connectable with a low noise amplifier. Both the first switching device and the second switching device are operating in an ON state in transmit mode to provide substantial linearity including no significant alternating current signal swing across any two nodes of the first switching device and the second switching device in the ON state.

Abstract: A first system and method relates to an analog current-mode method using branch systems. In the analog current-mode implementation, multiple branches systems can be scaled according to filter coefficients and switched using known data points. Positive coefficients can add current to the summing node, while negative coefficients can remove current from the summing node. Switches can be implemented with quick charge/discharge paths in order to operate at very high data rates. A second system and method relates to a digital look-up table based high-speed implementation. In the digital implementation, outputs can be pre-calculated as an n-bit output word that drives an n-bit DAC. Each bit of the n-bit word can then described as an independent function of the known data points. Each such function can be implemented as a high-speed combinational logic block. Both systems and methods enable the implementation of pulse shaping filters for multi-gigabit per second data transmission.

Abstract: An analog multi-gigabit receiver and/or transceiver can be implemented for the reception and demodulation of multi-gigabits quadrature phase shift keying (QPSK) modulated using a CMOS (complementary metal-oxide semiconductor) process. Further, an analog multi-gigabit receiver and/or transceiver can be implemented for the reception and demodulation of multi-gigabits binary phase shift keying (BPSK), minimum shift keying (MSK), and/or amplitude shift keying (ASK) signal modulated in CMOS processes.

Abstract: An analog multi-gigabit receiver and/or transceiver can be implemented for the reception and demodulation of multi-gigabits quadrature phase shift keying (QPSK) modulated using a CMOS (complementary metal-oxide semiconductor) process. Further, an analog multi-gigabit receiver and/or transceiver can be implemented for the reception and demodulation of multi-gigabits binary phase shift keying (BPSK), minimum shift keying (MSK), and/or amplitude shift keying (ASK) signal modulated in CMOS processes.