Patents by Inventor Bill Phan

Bill Phan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7936023
    Abstract: A diode, includes a semiconductor substrate, a first region doped with a first dopant type in the substrate, a second region doped with a second dopant type in the substrate, a first well of the first dopant type in the substrate and surrounding the first region and the second region, and a second well of the second dopant type in the substrate connecting the first region and the second region. The first dopant type is opposite the second dopant type.
    Type: Grant
    Filed: September 25, 2007
    Date of Patent: May 3, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: Jaejune Jang, Bill Phan, Helmut Puchner
  • Publication number: 20110094574
    Abstract: A polarization resistant solar cell is provided. The solar cell uses a dual layer dielectric stack disposed on the front surface of the cell. The dielectric stack consists of a passivation layer disposed directly on the front cell surface and comprised of either SiOx or SiON, and an outer AR coating comprised of SiCN.
    Type: Application
    Filed: December 24, 2009
    Publication date: April 28, 2011
    Applicant: Calisolar Inc.
    Inventors: Renhua Zhang, Bill Phan, John Gorman, Alain Paul Blosse, Martin Kaes
  • Publication number: 20110094575
    Abstract: A polarization resistant solar cell using an oxygen-rich interface layer is provided. The oxygen-rich interface layer may be comprised of SiOxNy, which may have a graded profile that varies between oxygen-rich proximate to the solar cell to nitrogen-rich distal to the solar cell. A silicon oxide passivation layer may be interposed between the solar cell and the SiOxNy graded dielectric layer. The graded SiOxNy dielectric layer may be replaced with a non-graded SiOxNy dielectric layer and a SiN AR coating.
    Type: Application
    Filed: December 24, 2009
    Publication date: April 28, 2011
    Applicant: Calisolar Inc.
    Inventors: Bill Phan, Renhua Zhang, John Gorman, Omar Sidelkheir, Jean Patrice Rakotoniaina, Alain Paul Blosse, Martin Kaes
  • Patent number: 7768068
    Abstract: A semiconductor topography and a method for forming a drain extended metal oxide semiconductor (DEMOS) transistor is provided. The semiconductor topography includes at least a portion of an extended drain contact region formed within a well region and a plurality of dielectrically spaced extension regions interposed between the well region and a channel region underlying a gate structure of the topography. The channel region of a first conductivity type and the well region of a second conductivity type opposite of the first conductivity type. In addition, the plurality of dielectrically spaced extension regions and the extended drain contact region are of the second conductivity type. Each of the plurality of dielectrically spaced extension regions has a lower net concentration of electrically active impurities than the well region. Moreover, the extended drain contact region has a greater net concentration of electrically active impurities than the well region.
    Type: Grant
    Filed: June 5, 2007
    Date of Patent: August 3, 2010
    Assignee: Cypress Semiconductor Corporation
    Inventors: Kevin Jang, Bill Phan, Helmut Puchner