Abstract: A process for fabricating a three dimensional molded feed structure is provided. In one embodiment, the invention relates to a process for fabricating a three dimensional radio frequency (RF) antenna structure, the process including providing a flexible circuit substrate, forming a first preselected pattern of channels in the flexible circuit substrate, depositing a conductive layer on the formed flexible substrate, and removing portions of the conductive layer to form a plurality of conductive traces.

Abstract: A hermetically sealed package includes a lid (14) hermetically bonded to a wafer or substrate (12), with a chamber therebetween defined by a recess (16) in the lid. A circuit device (26) such as MEMS device is provided within the chamber on the substrate. A plurality of vias (41-46) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.

Abstract: According to one embodiment, a pattern forming system includes a patterning tool, a multi-axis robot, and a simulation tool that are coupled to a pattern forming tool that is executed on a suitable computing system. The pattern forming tool receives a contour measurement from the patterning tool and transmits the measured contour to the simulation tool to model the electrical characteristics of a conductive pattern or a dielectric pattern on the measured contour. Upon receipt of the modeled characteristics, the pattern forming system may adjust one or more dimensions of the pattern according to the model, and subsequently create, using the patterning tool, the corrected pattern on the surface.

Abstract: A process for fabricating a three dimensional molded feed structure is provided. In one embodiment, the invention relates to a process for fabricating a three dimensional radio frequency (RF) antenna structure, the process including providing a flexible circuit substrate, forming a first preselected pattern of channels in the flexible circuit substrate, depositing a conductive layer on the formed flexible substrate, and removing portions of the conductive layer to form a plurality of conductive traces.

Abstract: A hermetically sealed package includes a lid (14) hermetically bonded to a wafer or substrate (12), with a chamber therebetween defined by a recess (16) in the lid. A circuit device (26) such as MEMS device is provided within the chamber on the substrate. A plurality of vias (41-46) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.

Abstract: A hermetically sealed package includes a lid (14) hermetically bonded to a wafer or substrate (12), with a chamber therebetween defined by a recess (16) in the lid. A circuit device (26) such as MEMS device is provided within the chamber on the substrate. A plurality of vias (41-46) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.

Abstract: An method for building multi-layer circuits without post process via fills is disclosed. The method includes aligning a first contact on a first substrate layer with a second contact on a second substrate layer; and fusion bonding the first contact to the second contact. A multilayer circuit is also disclosed. The multilayer circuit includes a first substrate layer including a first contact. The multilayer circuit also includes a second substrate layer including a second contact that is fusion bonded to the first contact such that the first and second contacts are aligned.

Abstract: A hermetically sealed package includes a lid (14) hermetically bonded to a wafer or substrate (12), with a chamber therebetween defined by a recess (16) in the lid. A circuit device (26) such as MEMS device is provided within the chamber on the substrate. A plurality of vias (41-46) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.

Abstract: A hermetically sealed package includes a lid (14) hermetically bonded to a wafer or substrate (12), with a chamber therebetween defined by a recess (16) in the lid. A circuit device (26) such as MEMS device is provided within the chamber on the substrate. A plurality of vias (41-46) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.

Abstract: According to one embodiment, a pattern forming system includes a patterning tool, a multi-axis robot, and a simulation tool that are coupled to a pattern forming tool that is executed on a suitable computing system. The pattern forming tool receives a contour measurement from the patterning tool and transmits the measured contour to the simulation tool to model the electrical characteristics of a conductive pattern or a dielectric pattern on the measured contour. Upon receipt of the modeled characteristics, the pattern forming system may adjust one or more dimensions of the pattern according to the model, and subsequently create, using the patterning tool, the corrected pattern on the surface.

Abstract: According to one embodiment of the invention, a method for sealing one or more vias comprises providing a first substrate having vias, forming an adhesion layer on an inner surface of the vias, sandwiching a solder layer between the first substrate and a second substrate, and elevating of the first substrate, second substrate, and solder layer to a temperature above a eutectic point and below a melting point of the solder layer. The act of elevating the solder layer to a temperature above the eutectic point and below the melting point causes the solder layer to flow into the vias in a generally consistent manner.

Abstract: RF MicroElectroMechanical Systems (MEMS) circuitry (15) on a first high resistivity substrate (17) is combined with circuitry (11) on a second low resistivity substrate (13) by overlapping the first high resistivity substrate (17) and MEMS circuitry (15) with the low resistivity substrate (13) and circuitry (11) with the MEMS circuitry (15) facing the second circuitry (11). A dielectric lid (19) is placed over the MEMS circuitry (15) and between the first substrate (17) and second substrate (13) with an inert gas in a gap (21) over the MEMS circuitry (15). Interconnecting conductors (25,31,35,37,39,41) extend perpendicular and through the high resistivity substrate (17) and through the dielectric lid (19) to make electrical connection with the low resistivity substrate (13).

Abstract: RF MicroElectroMechanical Systems (MEMS) circuitry (15) on a first high resistivity substrate (17) is combined with circuitry (11) on a second low resistivity substrate (13) by overlapping the first high resistivity substrate (17) and MEMS circuitry (15) with the low resistivity substrate (13) and circuitry (11) with the MEMS circuitry (15) facing the second circuitry (11). A dielectric lid (19) is placed over the MEMS circuitry (15) and between the first substrate (17) and second substrate (13) with an inert gas in a gap (21) over the MEMS circuitry (15). Interconnecting conductors (25, 31, 35, 37, 39, 41) extend perpendicular and through the high resistivity substrate (17) and through the dielectric lid (19) to make electrical connection with the low resistivity substrate (13).

Abstract: RF MicroElectroMechanical Systems (MEMs) circuitry(15) on a first high resistivity substrate (17)is combined with circuitry (11) onsecond low-resisitivity substrate (13) by overlapping the first high resisitivity substrate (17)and MEMs circuitry (15) with the low resisitivity substrate(13) and circuitry (11) with the MEMs circuitry (15)facing the second circuitry (11). A dielectric lid (19) is placed over the MEMs circuitry (15)and between the first substrate (17)and second substrate (13)with an inert gas in a gap (21)over the MEMs circuitry (15). Interconnecting conductors (25,31,35,37,39,41) extend perpendicular and through the high resistivity substrate (17)and through the dielectric lid (19) to make electrical connection with the low resisitivity substrate (13).

Abstract: RF MicroElectroMechanical Systems (MEMs) circuitry(15) on a first high resistivity substrate (17)is combined with circuitry (11) onsecond low-resisitivity substrate (13) by overlapping the first high resisitivity substrate (17)and MEMs circuitry (15) with the low resisitivity substrate(13) and circuitry (11) with the MEMs circuitry (15)facing the second circuitry (11). A dielectric lid (19) is placed over the MEMs circuitry (15)and between the first substrate (17)and second substrate (13)with an inert gas in a gap (21)over the MEMs circuitry (15). Interconnecting conductors (25,31,35,37,39,41) extend perpendicular and through the high resistivity substrate (17)and through the dielectric lid (19) to make electrical connection with the low resisitivity substrate (13).

Abstract: First and second electronic devices interconnected by a nonconductive nanoporous film, said film having metal-filled pores extending through the thickness of the film, such that each of said devices is contacted by the metal in at least several pores, wherein said film comprises a silicone polymer.