Method and Apparatus for Building Multilayer Circuits
An method for building multi-layer circuits without post process via fills is disclosed. The method includes aligning a first contact on a first substrate layer with a second contact on a second substrate layer; and fusion bonding the first contact to the second contact. A multilayer circuit is also disclosed. The multilayer circuit includes a first substrate layer including a first contact. The multilayer circuit also includes a second substrate layer including a second contact that is fusion bonded to the first contact such that the first and second contacts are aligned.
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This disclosure relates in general to semiconductor devices and more particularly, to building multilayer circuits
BACKGROUNDMultilayer electronic circuits are built with a sequential build up of dielectric and metal layers. For instance, once a dielectric layer is formed, a conductor layer may be formed on top of the dielectric layer by depositing traces of conductive material in desired patterns on a surface of the dielectric. Additional layers may be added by sequentially attaching subsequent dielectric and metal layers to existing layers.
Forming electrical connections between dielectric and metal layers on the z-axis has included the need for plating vias after lamination to form electrical connections between layers or the need to cut holes in multilayer boards and fill the holes with solder to electrically connect layers in the z-axis. These methods require additional metallization and dielectric processing after layers are bonded. These additional steps make the formation of three-dimensional multilayer circuits more difficult.
SUMMARYA method for building multi-layer circuits is disclosed. The method includes aligning a first contact on a first substrate layer with a second contact on a second substrate layer. The method also includes fusion bonding the first contact to the second contact.
A multilayer circuit is also disclosed. The multilayer circuit includes a first substrate layer including a first contact. The multilayer circuit also includes a second substrate layer including a second contact that is fusion bonded to the first contact such that the first and second contacts are aligned.
Various embodiments of the present disclosure may benefit from numerous advantages. It should be noted that one or more embodiments may benefit from some, none, or all of the advantages discussed below. One advantage of certain embodiments is that z-axis connections between layers in a multilayer circuit may be formed without additional metallization or dielectric processes after dielectric layers are bonded. Another advantage of certain embodiments is that the multilayer circuit may be formed into three-dimensional structures without complications from metallization processes.
Other advantages will be readily apparent to one having ordinary skill in the art from the following FIGURES, descriptions, and claims.
For a more complete understanding of the present disclosure and for further features and advantages, reference is now made to the following description, taken in conjunction with the accompanying drawings, in which:
Example embodiments of the present disclosure and their advantages are best understood by referring now to
According to some embodiments of the present disclosure, a fusion bonding procedure that forms a conductor to conductor, or metal to metal connection or electrical path without the use of a solder joint, wire bond, or ribbon bond can be used to create circuits between multiple layers of a printed circuit board. A procedure for using a fusion bonding method to create these circuit connections between multiple layers of a printed circuit board is disclosed. Liquid crystal polymers (LCPs) having coefficients of thermal expansion close to one another are chosen. These LCPs have interconnect traces or contact patterns on their surfaces such that desired circuits or microelectronic component connections can be made. For instance, it may be desirable to connect an electronic component on one LCP or substrate layer to another electronic component on a different substrate or LCP layer.
According to some embodiments of the present disclosure, traces or contacts are deposited on the surface of the first substrate layer that may connect to an electronic component on the first layer. Traces or contacts are also deposited on the surface of the second substrate layer that may connect to a component on the second layer. These traces or contacts can be made of any conductive material, such as copper, gold, silver, platinum, or aluminum. The traces are made such that they align at desirable connection points when the surfaces of the two substrates are placed together. Once contacts are aligned and substrates are placed together, the two substrates are subjected to standard autoclave procedures such that the substrate layers are fusion bonded, as well as the metal contacts. For instance, the aligned substrate and LCP are placed in an autoclave and processed at the appropriate temperature and pressure to bond the LCP surfaces and to capture the contacts and interconnects such that the contacts and interconnects between the LCP and the substrate bond. For example, pressures between 50 and 100 PSI and temperatures between 200 and 290 degrees Celsius may be used to bond the contacts and substrate surfaces.
LCPs having coefficients of thermal expansion close to one another may be chosen so that the contacts remain aligned during any expansion by the substrates. In this way, multiple layers of LCPs and/or substrates can be bonded together while at the same time contacts or traces on one layer and contacts or traces on another layer can also be bonded creating circuits and connections that traverse the Z-axis between layers in addition to the X and Y axis within an individual layer. This fusion bonding technique can be used to create and/or connect multilayer circuits, antenna structures, resonators, cooling channels, microprocessors, or any of a number of electronic components known in the art.
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According to an embodiment of the present disclosure, the top surface of layer 102 is aligned with the bottom surface of layer 101 such that the interconnects are aligned together. For example, interconnect 201 on layer 102 aligns to interconnect 213 and layer 101. In essence the bottom surface of layer 101 as shown on the right hand side of
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Although an embodiment of the disclosure and its advantages are described in detail, a person skilled in the art could make various alterations, additions, and omissions without departing from the spirit and scope of the present disclosure as defined by the appended claims.
Claims
1. A method for connecting contacts comprising:
- aligning a first contact on a first substrate layer with a second contact on a second substrate layer; and
- fusion bonding the first contact on the first substrate layer to the second contact on the second substrate layer.
2. The method of claim 1 wherein the first and second substrate layers have the same coefficient of thermal expansion.
3. The method of claim 1 wherein the substrate layers comprise liquid crystal polymer.
4. The method of claim 1 wherein the first contact and second contact each comprise a material selected from the group consisting of gold, copper, silver, aluminum, and platinum.
5. The method of claim 1 further comprising connecting the first contact to the second contact without plating the contacts.
6. The method of claim 1 wherein the bonded first contact and second contact form a member selected from the group consisting of circuits, antennas, resonators, cooling channels, and chip packages.
7. The method of claim 1 further comprising placing the combined substrate layers in a mold to form a shape.
8. A multilayer circuit comprising:
- a first substrate layer comprising a first contact;
- a second substrate layer comprising a second contact fusion bonded to the first contact of the first substrate layer such that the first and second contacts are aligned.
9. The multilayer circuit of claim 8 wherein the first and second substrate layers have the same coefficient of thermal expansion.
10. The multilayer circuit of claim 8 wherein the substrate layers comprise liquid crystal polymer.
11. The multilayer circuit of claim 8 wherein the first contact and second contact each comprise a material selected from the group consisting of gold, copper, silver, aluminum, and platinum.
12. The multilayer circuit of claim 8 wherein the fusion bonded first and second contact are not plated.
13. The multilayer circuit of claim 8 wherein the bonded first contact and second contact form a member selected from the group consisting of circuits, antennas, resonators, cooling channels, chip packages.
14. The multilayer circuit of claim 8 wherein the multilayer circuit is bent along the z-axis.
15. A method for building a multi-layer circuit comprising:
- aligning a first contact on a first substrate layer with a second contact on a second substrate layer wherein each substrate layer has a length, width, and thickness, and wherein the first and second contacts are on surfaces defined by each substrate's length and width; and
- creating a multi-layer circuit by fusion bonding the first contact on the first substrate to the second contact on the second substrate by applying pressure and heat to the first and second substrate layers.
16. The method of claim 15 wherein the first and second substrate layers have the same coefficient of thermal expansion.
17. The method of claim 15 wherein the first contact and second contact each comprise a material selected from the group consisting of gold, copper, silver, aluminum, and platinum.
18. The method of claim 15 further comprising creating a multi-layer circuit by fusing the first and second contacts without plating the contacts.
19. The method of claim 15 wherein the bonded first contact and second contact form a member selected from the group consisting of circuits, antennas, resonators, cooling channels, chip package.
20. The method of claim 15 further comprising placing the combined substrate layers in a mold to form a shape.
Type: Application
Filed: May 27, 2009
Publication Date: Dec 2, 2010
Applicant: Raytheon Company (Waltham, MA)
Inventors: Billy D. Ables (Richardson, TX), Sankerlingam Rajendran (Plano, TX), Premjeet Chahal (Gurnee, IL)
Application Number: 12/473,044
International Classification: H05K 1/09 (20060101); B23K 31/02 (20060101); H05K 1/00 (20060101);