Patents by Inventor Bin Zhao

Bin Zhao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250256424
    Abstract: A tearing apparatus includes a mounting bracket, a movement mechanism, and a clamping mechanism. The movement mechanism includes a first movement assembly and a second movement assembly. The first movement assembly is arranged on the mounting bracket. The first movement assembly is configured to drive the second movement assembly to move along a first direction. The clamping mechanism includes a connecting bracket and a clamping assembly. The second movement assembly is configured to drive the connecting bracket to move along a second direction. The clamping assembly is connected to the connecting bracket, and a clamping piece of the clamping assembly can move along a third direction. The clamping piece is configured to clamp a target piece of a material for tearing. The first direction, the second direction, and the third direction intersect with one another.
    Type: Application
    Filed: April 30, 2025
    Publication date: August 14, 2025
    Applicant: CONTEMPORARY AMPEREX TECHNOLOGY (HONG KONG) LIMITED
    Inventors: Lili WANG, Shiping QIU, Mingjin LONG, Jiasong DU, Yanlin SUN, Yang LIU, Bin ZHAO
  • Publication number: 20250254310
    Abstract: To achieve better tradeoffs between bitrate and quality in video encoding, an improved scalar quantizer can use distortion-aware rounding offsets based on estimated distortion levels from one or more distortion contributions. A polynomial function can be used to associate distortion level to rounding offset to provide a larger range of rounding offsets. Potentially different functions can be used to define relations in segments of a range of the distortion level. Potentially different functions can be used for different scenarios (e.g., color channels, different ranges of the distortion level). In some embodiments, a group of integer errors can be used to produce more candidate rounding offsets based on the initial rounding offset. The group of candidate rounding offsets can be used to determine a group of candidate integer levels of quantized coefficient and add more flexibility to adjust the quantization error and achieve better tradeoffs between bitrate and quality.
    Type: Application
    Filed: April 28, 2025
    Publication date: August 7, 2025
    Applicant: Intel Corporation
    Inventors: Bin Zhao, Dmitry E. Ryzhov, Iole Moccagatta, Yi-jen Chiu, Keith W. Rowe
  • Publication number: 20250251628
    Abstract: A display panel and a display device are provided. A display panel includes a first substrate, a second substrate and a photo spacer disposed between the first substrate and the second substrate. The first substrate includes a first base and a first alignment layer. The first alignment layer includes a first portion and a second portion. The second portion surrounds the first portion. One end of the photo spacer is connected to the second substrate, and the other end of the photo spacer corresponds to the first portion. A distance between the first portion and the second substrate is different from a distance between the second portion and the second substrate.
    Type: Application
    Filed: October 31, 2023
    Publication date: August 7, 2025
    Applicant: Guangzhou China Star Optoelectronics Semiconductor Display Technology Co., LTd.
    Inventors: Bin ZHAO, Juncheng XIAO, Shan LI, Kuhuang LAI, Wei LIU, Huaipei WANG
  • Patent number: 12360872
    Abstract: Methods, systems, and devices for performance benchmark for host performance booster are described. The memory system may receive a plurality of read commands from a host system. The memory system may detect a pattern of random physical addresses as part of the plurality of read commands and increase an amount of space in a cache of the memory system based on the detected pattern. In some cases, the amount of space may be used for mapping between logical block addresses and physical addresses. The memory system may determine, for a different plurality of read commands, whether a rate of cache hits for a portion of the mapping satisfies a threshold. In some cases, the memory system may determine whether to activate a host performance booster mode based on determining whether the rate of cache hits satisfies the threshold.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: July 15, 2025
    Assignee: Micron Technology, Inc.
    Inventors: Bin Zhao, Lingyun Wang
  • Publication number: 20250219223
    Abstract: A boxing device, which is configured to place an article to be boxed into a box, with an opening of the box facing downwards is described. The boxing device includes: a bearing portion, wherein the bearing portion extends in a first direction and is located under the article to be boxed so as to bear the article to be boxed; a guiding portion, wherein the guiding portion extends in a second direction and is configured to limit the article to be boxed in a third direction; and a pressurizing portion, wherein the pressurizing portion is configured to limit the article to be boxed in the first direction, and the first direction, the second direction, and the third direction are perpendicular to one another.
    Type: Application
    Filed: March 18, 2025
    Publication date: July 3, 2025
    Applicant: CONTEMPORARY AMPEREX TECHNOLOGY (HONG KONG) LIMITED
    Inventors: Yudong QIU, Weidong ZHAO, Gui LIANG, Bin ZHAO
  • Publication number: 20250208457
    Abstract: A display module and a seamless splicing display device are disclosed. The display module includes a display panel including a central display area and a bezel area adjacent to the central display area, where the display panel is provided with a bezel driving circuit and an array substrate driving circuit; a compensation display component disposed on the display panel, located in the bezel area, and electrically connected with the bezel driving circuit; and a metal wiring located on a lateral surface of the display panel and connected with the bezel driving circuit and the array substrate driving circuit, where the bezel driving circuit includes a driving part configured for driving the compensation display component, where the bezel driving circuit extends to and is aligned with the lateral surface of the display panel, the driving part extends to a lateral surface of an array substrate of the display panel.
    Type: Application
    Filed: March 17, 2025
    Publication date: June 26, 2025
    Applicant: TCL China Star Optoelectronics Technology Co., Ltd.
    Inventors: Juncheng XIAO, Bin ZHAO, Ji LI, Hongquan WEI
  • Publication number: 20250208995
    Abstract: Methods, systems, and devices for managing regions of a memory system are described. A memory system may include a non-volatile memory device and may receive a host performance booster (HPB) command (e.g., a read command) associated with one or more regions of the non-volatile memory device. The memory system may determine whether the region(s) associated with the HPB command are active. In instances where one or more of the associated regions are inactive, the memory system may activate the region(s) and deactivate one or more other regions based on a recency parameter (e.g., a timing parameter). The memory system may process the received HPB command based on the associated region(s) being active.
    Type: Application
    Filed: December 26, 2024
    Publication date: June 26, 2025
    Inventors: Bin Zhao, Lingyun Wang
  • Patent number: 12341010
    Abstract: A preparation method for a semiconductor structure and a semiconductor structure are provided. Herein, the preparation method comprises: providing a structure to be processed, wherein the structure to be processed comprises a substrate, and an etching target layer, a bottom mask layer and a first mask layer stacked on the substrate; patterning the first mask layer to form a first pattern, the first pattern exposing parts of the bottom mask layer; forming spacers with vertical sidewall morphology on sidewalls of the first mask layer; removing the first mask layer; filling a gap between the spacers with a filling layer, in which a material of the spacers to a material of the filling layer has a high etching selectivity ratio; and removing the spacers.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: June 24, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Longyang Chen, Shijie Bai, Zhongming Liu, Yexiao Yu, Xianguo Zhou, Bin Zhao
  • Publication number: 20250189587
    Abstract: The present application provides a communication module and a wireless test system and test method for a battery. The communication module includes a wireless communication interface and a wired communication interface. The communication module is in wireless and is connected to a battery under test through the wired communication interface. The communication module is configured to receive instruction data sent by the test terminal, and send a test instruction corresponding to the instruction data to the battery under test; and receive a corresponding battery parameter generated according to the test instruction and sent by the battery under test, and send, to the test terminal, test data corresponding to the battery parameter returned by the battery under test.
    Type: Application
    Filed: January 27, 2025
    Publication date: June 12, 2025
    Applicant: Contemporary Amperex Technology (Hong Kong) Limited
    Inventors: Dengwei LIAN, Tong ZHAO, Chen CHEN, Yanghu LI, Bin ZHAO
  • Patent number: 12327607
    Abstract: Methods, systems, and devices for mitigating memory die misalignment are described. A memory system may receive a command to write data to a memory device including a memory die. The memory system may determine whether the data indicated by the command (e.g., a first set of data) satisfies a threshold size. If the first set of data satisfies the threshold size, the memory system may determine whether data currently in a write buffer aligns with a boundary of the memory die. For example, depending on the data currently in the buffer, adding the first set of data to the buffer may result in die misalignment for the first set of data. To mitigate die misalignment, the memory system may pad data (e.g., add dummy data) to the write buffer, such that the padding aligns the data with the die boundary.
    Type: Grant
    Filed: March 22, 2024
    Date of Patent: June 10, 2025
    Assignee: Micron Technology, Inc.
    Inventors: Jie Yang, Xu Zhang, Bin Zhao
  • Patent number: 12324291
    Abstract: A light-emitting substrate and a manufacturing method thereof are disclosed. In the embodiment of the present disclosure, by providing a groove on a base plate in the manufacturing method of the light-emitting substrate, the accuracy of coating the solder resist ink layer can be improved so as to reduce a distance between the solder resist ink layer and the pad assembly and avoid poor soldering or soldering failure caused by the overflow of the solder resist ink onto the pad.
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: June 3, 2025
    Assignee: TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Huajun Lu, Bin Zhao, Juncheng Xiao
  • Publication number: 20250176263
    Abstract: A display panel and a manufacturing method thereof are provided by the present disclosure. The display panel includes a substrate, a first device layer, a second device layer and a third device layer stacked sequentially. The first device layer includes a gate. The second device layer includes an active part and a pixel electrode disposed on a side of the gate away from a substrate. The third device layer includes a source disposed on a side of the active part away from the gate. The source is connected to the active part.
    Type: Application
    Filed: December 26, 2023
    Publication date: May 29, 2025
    Inventors: Bin ZHAO, Juncheng XIAO, Shan LI, Hang WANG
  • Publication number: 20250172836
    Abstract: A spliced display panel and a spliced display device are provided. In the spliced display panel, a second display module is disposed on a non-display surface of a first display module and corresponding to a spliced region.
    Type: Application
    Filed: January 23, 2025
    Publication date: May 29, 2025
    Applicant: TCL China Star Optoelectronics Technology Co., Ltd.
    Inventors: Jun ZHAO, Bin ZHAO, Juncheng XIAO, Hongyuan XU, Feng ZHENG, Wenxue HUO
  • Publication number: 20250172624
    Abstract: The present application provides a battery, an electrical apparatus, a battery testing system and a battery testing method. The battery includes a battery module and a wireless management module. The wireless management module is configured to provide a function of communication between the battery module and an external device; that is, the wireless management module receives command data sent by the external device, sends command parameters corresponding to the command data to the battery module, receives battery parameters sent by the battery module, and sends battery data corresponding to the battery parameters to the external device. The embodiments of the present application provide the battery with a wireless communication function, such that the battery can send the battery data to the external device through wireless communication, thereby improving convenience of transmission of the battery parameters.
    Type: Application
    Filed: January 27, 2025
    Publication date: May 29, 2025
    Applicant: Contemporary Amperex Technology (Hong Kong) Limited
    Inventors: Dengwei LIAN, Tong ZHAO, Chen CHEN, Yanghu LI, Bin ZHAO
  • Patent number: 12314577
    Abstract: Methods, systems, and devices for dynamic memory management operation are described. A memory system may store data in a first block that includes a first type of memory cells configured to store a single bit of information (e.g., single level cells (SLCs)). The memory system may set a flag associated with the data indicating whether the data includes secure information and is to remain in a block that includes SLCs after a memory management operation (e.g., a garbage collection operation). The memory system may store, as part of the memory management operation for the first block and based on the flag, valid data of the first block in a second block that includes SLCs or a third block that includes a second type of memory cells configured to store two or more bits of information.
    Type: Grant
    Filed: March 13, 2024
    Date of Patent: May 27, 2025
    Assignee: Micron Technology, Inc.
    Inventors: Xing Wang, Liu Yang, Xiaolai Zhu, Bin Zhao
  • Publication number: 20250144830
    Abstract: An oscillating tool includes a housing; a motor in the housing; a first blade clamp; a blade clamp shaft; and a second blade clamp on the blade clamp shaft. The blade clamp shaft includes a latching portion to engage a seat. The oscillating tool also includes a blade clamp spring configured to bias the latching portion into engagement with the seat.
    Type: Application
    Filed: October 23, 2024
    Publication date: May 8, 2025
    Applicant: Black & Decker Inc.
    Inventors: Nicholas A MONDICH, Bin ZHAO, Jiang Feng WANG
  • Patent number: 12294009
    Abstract: A display panel and a method for manufacturing the same are provided. The display panel includes a first bonding area and a second bonding area connected to the first bonding area. The display panel further includes a substrate and a bonding wiring layer. A thickness of a part of the substrate in the second bonding area is less than a thickness of a part of the substrate in the first bonding area. The bonding wiring layer is disposed on surfaces of the parts of the substrate in the first bonding area and the second bonding area. A side surface of the bonding wiring layer away from the first bonding area and a side surface of the substrate away from the first bonding area are located on a same plane.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: May 6, 2025
    Assignees: Huizhou China Star Optoelectronics Display Co., Ltd., TCL China Star Optoelectronics Technology Co., Ltd.
    Inventors: Bin Zhao, Juncheng Xiao, Xiaodan Lin
  • Patent number: 12286414
    Abstract: The present invention provides, a novel method for producing a compound represented by formula (I) and a novel method for producing a compound represented by formula (B) or a salt thereof, which are intermediates in the production of formula (I).
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: April 29, 2025
    Assignee: MOCHIDA PHARMACEUTICAL CO., LTD.
    Inventors: Hideharu Uchida, Tsutomu Satoh, Bin Zhao, Xiaomin Gu, Jian Luo, Chuan Chen, Xiaofei Cai, Jiajie Ye, Jie Li, Fenglai Sun
  • Publication number: 20250130689
    Abstract: A notification message processing method and a device are provided. The method includes: an electronic device obtains a target notification message of a target application, wherein the target notification message includes first rich media information, and the first rich media information includes one or more of voice information, video information, or an animated image; the electronic device displays a first interface, where the first interface includes notification messages of at least two applications, the at least two applications include the target application, and the notification messages of the at least two applications include the target notification message; and the electronic device plays the first rich media information in the target notification message in response to a trigger operation performed by a user on the target notification message.
    Type: Application
    Filed: August 19, 2022
    Publication date: April 24, 2025
    Inventors: Bin Zhao, Zhanwei Guo, Ankun Gao, Qiliang Chen, Shaohang Song
  • Patent number: 12284829
    Abstract: An array substrate and a display panel are disclosed. The display panel includes the array substrate. An ion injection stopper layer and an active layer of the array substrate correspond to at least part of the channel part. The ion injection stopper layer blocks ions from being injected into the channel part. Therefore, an effective channel length of oxide TFTs is reduced. A width of a channel of the oxide TFTs can be reduced without changing a width-length ratio of the oxide TFTs. As such, a size of the oxide TFTs can be reduced, and an aperture ratio of the display panel is increased.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: April 22, 2025
    Assignee: GUANGZHOU CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Jun Zhao, Wei Wu, Bin Zhao, Juncheng Xiao